[renesas-devel:renesas-arm-dt-for-v5.8 13/13] arch/arm/boot/dts/r8a7742.dtsi:8:10: fatal error: dt-bindings/clock/r8a7742-cpg-mssr.h: No such file or directory

[renesas-devel:renesas-arm-dt-for-v5.8 13/13] arch/arm/boot/dts/r8a7742.dtsi:8:10: fatal error: dt-bindings/clock/r8a7742-cpg-mssr.h: No such file or directory

[kbuild test robot]

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git renesas-arm-dt-for-v5.8
head:   727f9cb4eb753ff60fe94da26603f677663430ca
commit: 727f9cb4eb753ff60fe94da26603f677663430ca [13/13] ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H
config: arm-shmobile_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 727f9cb4eb753ff60fe94da26603f677663430ca
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   In file included from arch/arm/boot/dts/r8a7742-iwg21m.dtsi:8,
                    from arch/arm/boot/dts/r8a7742-iwg21d-q7.dts:9:
>> arch/arm/boot/dts/r8a7742.dtsi:8:10: fatal error: dt-bindings/clock/r8a7742-cpg-mssr.h: No such file or directory
    #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   compilation terminated.

vim +8 arch/arm/boot/dts/r8a7742.dtsi

eb2250f54814501 Lad Prabhakar 2020-05-03  @8  #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
eb2250f54814501 Lad Prabhakar 2020-05-03   9  #include <dt-bindings/interrupt-controller/arm-gic.h>
eb2250f54814501 Lad Prabhakar 2020-05-03  10  #include <dt-bindings/interrupt-controller/irq.h>
eb2250f54814501 Lad Prabhakar 2020-05-03  11  #include <dt-bindings/power/r8a7742-sysc.h>
eb2250f54814501 Lad Prabhakar 2020-05-03  12  

:::::: The code at line 8 was first introduced by commit
:::::: eb2250f548145012d5c8c4c0abc8ec17e9465664 ARM: dts: r8a7742: Initial SoC device tree

:::::: TO: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
:::::: CC: Geert Uytterhoeven <geert+renesas@glider.be>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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