* [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins
@ 2021-03-08 15:59 Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 1/4] pinctrl: renesas: r8a77951: " Niklas Söderlund
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Niklas Söderlund @ 2021-03-08 15:59 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund
Hello,
This series adds support for the vin{4,5}_high8 pins to R-Car r8a77951 (H3)
r8a7796 (M3-W), r8a77990 (E3) and r8a77965 (M3-N).
It is tested on-top of v5.12-rc2.
Niklas Söderlund (4):
pinctrl: renesas: r8a77951: Add vin{4,5}_high8 pins
pinctrl: renesas: r8a7796: Add vin{4,5}_high8 pins
pinctrl: renesas: r8a77990: Add vin{4,5}_high8 pins
pinctrl: renesas: r8a77965: Add vin{4,5}_high8 pins
drivers/pinctrl/renesas/pfc-r8a77951.c | 30 ++++++++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a7796.c | 30 ++++++++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a77965.c | 34 +++++++++++++++++++++++++-
drivers/pinctrl/renesas/pfc-r8a77990.c | 34 +++++++++++++++++++++++++-
4 files changed, 124 insertions(+), 4 deletions(-)
--
2.30.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/4] pinctrl: renesas: r8a77951: Add vin{4,5}_high8 pins
2021-03-08 15:59 [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins Niklas Söderlund
@ 2021-03-08 15:59 ` Niklas Söderlund
2021-03-09 8:26 ` Geert Uytterhoeven
2021-03-08 15:59 ` [PATCH v2 2/4] pinctrl: renesas: r8a7796: " Niklas Söderlund
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Niklas Söderlund @ 2021-03-08 15:59 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund, Jacopo Mondi
This patch adds VIN{4,5}_high8 support to the R8A77951 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
* Changes since v1
- Rename g8 to high8 per Geerts suggestion.
- Rebase to renesas-pinctrl.
---
drivers/pinctrl/renesas/pfc-r8a77951.c | 30 +++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
index bdd605e41303bf3a..84ae1263dda9762d 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77951.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
@@ -4126,6 +4126,18 @@ static const union vin_data vin4_data_b_mux = {
VI4_DATA22_MARK, VI4_DATA23_MARK,
},
};
+static const unsigned int vin4_high8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_high8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
static const unsigned int vin4_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4180,6 +4192,18 @@ static const union vin_data16 vin5_data_mux = {
VI5_DATA14_MARK, VI5_DATA15_MARK,
},
};
+static const unsigned int vin5_high8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_high8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
static const unsigned int vin5_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4210,7 +4234,7 @@ static const unsigned int vin5_clk_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[326];
+ struct sh_pfc_pin_group common[328];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_pin_group automotive[30];
#endif
@@ -4530,6 +4554,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_high8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4538,6 +4563,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_high8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5097,6 +5123,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_high8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -5108,6 +5135,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_high8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.30.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/4] pinctrl: renesas: r8a7796: Add vin{4,5}_high8 pins
2021-03-08 15:59 [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 1/4] pinctrl: renesas: r8a77951: " Niklas Söderlund
@ 2021-03-08 15:59 ` Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 3/4] pinctrl: renesas: r8a77990: " Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 4/4] pinctrl: renesas: r8a77965: " Niklas Söderlund
3 siblings, 0 replies; 6+ messages in thread
From: Niklas Söderlund @ 2021-03-08 15:59 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund, Jacopo Mondi
This patch adds VIN{4,5}_high8 support to the R8A7796 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
* Changes since v1
- Rename g8 to high8 per Geerts suggestion.
- Rebase to renesas-pinctrl.
---
drivers/pinctrl/renesas/pfc-r8a7796.c | 30 ++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index 96b5b1509bb70d16..a150c7253bd16d67 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -4100,6 +4100,18 @@ static const union vin_data vin4_data_b_mux = {
VI4_DATA22_MARK, VI4_DATA23_MARK,
},
};
+static const unsigned int vin4_high8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_high8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
static const unsigned int vin4_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
@@ -4154,6 +4166,18 @@ static const union vin_data16 vin5_data_mux = {
VI5_DATA14_MARK, VI5_DATA15_MARK,
},
};
+static const unsigned int vin5_high8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_high8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
static const unsigned int vin5_sync_pins[] = {
/* HSYNC#, VSYNC# */
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
@@ -4184,7 +4208,7 @@ static const unsigned int vin5_clk_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[322];
+ struct sh_pfc_pin_group common[324];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_pin_group automotive[30];
#endif
@@ -4500,6 +4524,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_high8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4508,6 +4533,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_high8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5054,6 +5080,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_high8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -5065,6 +5092,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_high8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.30.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/4] pinctrl: renesas: r8a77990: Add vin{4,5}_high8 pins
2021-03-08 15:59 [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 1/4] pinctrl: renesas: r8a77951: " Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 2/4] pinctrl: renesas: r8a7796: " Niklas Söderlund
@ 2021-03-08 15:59 ` Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 4/4] pinctrl: renesas: r8a77965: " Niklas Söderlund
3 siblings, 0 replies; 6+ messages in thread
From: Niklas Söderlund @ 2021-03-08 15:59 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund, Jacopo Mondi
This patch adds VIN{4,5}_high8 support to the R8A77990 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
* Changes since v1
- Rename g8 to high8 per Geerts suggestion.
- Rebase to renesas-pinctrl.
---
drivers/pinctrl/renesas/pfc-r8a77990.c | 34 +++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index 0a32e3c317c1a0c5..479dd6e9ed540abb 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -3697,6 +3697,20 @@ static const union vin_data vin4_data_b_mux = {
},
};
+static const unsigned int vin4_high8_pins[] = {
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+ RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 10),
+ RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 14),
+};
+
+static const unsigned int vin4_high8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+
static const unsigned int vin4_sync_pins[] = {
/* HSYNC, VSYNC */
RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 24),
@@ -3771,6 +3785,20 @@ static const unsigned int vin5_data8_b_mux[] = {
VI5_DATA6_B_MARK, VI5_DATA7_B_MARK,
};
+static const unsigned int vin5_high8_pins[] = {
+ RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+ RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 11),
+ RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 10),
+ RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+};
+
+static const unsigned int vin5_high8_mux[] = {
+ VI5_DATA8_A_MARK, VI5_DATA9_A_MARK,
+ VI5_DATA10_A_MARK, VI5_DATA11_A_MARK,
+ VI5_DATA12_A_MARK, VI5_DATA13_A_MARK,
+ VI5_DATA14_A_MARK, VI5_DATA15_A_MARK,
+};
+
static const unsigned int vin5_sync_a_pins[] = {
/* HSYNC_N, VSYNC_N */
RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9),
@@ -3813,7 +3841,7 @@ static const unsigned int vin5_clk_b_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[253];
+ struct sh_pfc_pin_group common[255];
#ifdef CONFIG_PINCTRL_PFC_R8A77990
struct sh_pfc_pin_group automotive[21];
#endif
@@ -4058,6 +4086,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_high8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4067,6 +4096,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 12, _a),
VIN_DATA_PIN_GROUP(vin5_data, 16, _a),
SH_PFC_PIN_GROUP(vin5_data8_b),
+ SH_PFC_PIN_GROUP(vin5_high8),
SH_PFC_PIN_GROUP(vin5_sync_a),
SH_PFC_PIN_GROUP(vin5_field_a),
SH_PFC_PIN_GROUP(vin5_clkenb_a),
@@ -4516,6 +4546,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_high8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -4528,6 +4559,7 @@ static const char * const vin5_groups[] = {
"vin5_data12_a",
"vin5_data16_a",
"vin5_data8_b",
+ "vin5_high8",
"vin5_sync_a",
"vin5_field_a",
"vin5_clkenb_a",
--
2.30.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 4/4] pinctrl: renesas: r8a77965: Add vin{4,5}_high8 pins
2021-03-08 15:59 [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins Niklas Söderlund
` (2 preceding siblings ...)
2021-03-08 15:59 ` [PATCH v2 3/4] pinctrl: renesas: r8a77990: " Niklas Söderlund
@ 2021-03-08 15:59 ` Niklas Söderlund
3 siblings, 0 replies; 6+ messages in thread
From: Niklas Söderlund @ 2021-03-08 15:59 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: linux-renesas-soc, Niklas Söderlund, Jacopo Mondi
This patch adds VIN{4,5}_high8 support to the R8A77965 SoC.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
* Changes since v1
- Rename g8 to high8 per Geerts suggestion.
- Rebase to renesas-pinctrl.
---
drivers/pinctrl/renesas/pfc-r8a77965.c | 34 +++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index f15e29383d9b54fe..c27b7f7e9f08c879 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -4337,6 +4337,20 @@ static const union vin_data vin4_data_b_mux = {
},
};
+static const unsigned int vin4_high8_pins[] = {
+ RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+
+static const unsigned int vin4_high8_mux[] = {
+ VI4_DATA8_MARK, VI4_DATA9_MARK,
+ VI4_DATA10_MARK, VI4_DATA11_MARK,
+ VI4_DATA12_MARK, VI4_DATA13_MARK,
+ VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+
static const unsigned int vin4_sync_pins[] = {
/* VSYNC_N, HSYNC_N */
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18),
@@ -4397,6 +4411,20 @@ static const union vin_data16 vin5_data_mux = {
},
};
+static const unsigned int vin5_high8_pins[] = {
+ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+ RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+
+static const unsigned int vin5_high8_mux[] = {
+ VI5_DATA8_MARK, VI5_DATA9_MARK,
+ VI5_DATA10_MARK, VI5_DATA11_MARK,
+ VI5_DATA12_MARK, VI5_DATA13_MARK,
+ VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
+
static const unsigned int vin5_sync_pins[] = {
/* VSYNC_N, HSYNC_N */
RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 10),
@@ -4431,7 +4459,7 @@ static const unsigned int vin5_clk_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[324];
+ struct sh_pfc_pin_group common[326];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_pin_group automotive[30];
#endif
@@ -4749,6 +4777,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin4_data18_b),
VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+ SH_PFC_PIN_GROUP(vin4_high8),
SH_PFC_PIN_GROUP(vin4_sync),
SH_PFC_PIN_GROUP(vin4_field),
SH_PFC_PIN_GROUP(vin4_clkenb),
@@ -4757,6 +4786,7 @@ static const struct {
VIN_DATA_PIN_GROUP(vin5_data, 10),
VIN_DATA_PIN_GROUP(vin5_data, 12),
VIN_DATA_PIN_GROUP(vin5_data, 16),
+ SH_PFC_PIN_GROUP(vin5_high8),
SH_PFC_PIN_GROUP(vin5_sync),
SH_PFC_PIN_GROUP(vin5_field),
SH_PFC_PIN_GROUP(vin5_clkenb),
@@ -5307,6 +5337,7 @@ static const char * const vin4_groups[] = {
"vin4_data18_b",
"vin4_data20_b",
"vin4_data24_b",
+ "vin4_high8",
"vin4_sync",
"vin4_field",
"vin4_clkenb",
@@ -5318,6 +5349,7 @@ static const char * const vin5_groups[] = {
"vin5_data10",
"vin5_data12",
"vin5_data16",
+ "vin5_high8",
"vin5_sync",
"vin5_field",
"vin5_clkenb",
--
2.30.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/4] pinctrl: renesas: r8a77951: Add vin{4,5}_high8 pins
2021-03-08 15:59 ` [PATCH v2 1/4] pinctrl: renesas: r8a77951: " Niklas Söderlund
@ 2021-03-09 8:26 ` Geert Uytterhoeven
0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2021-03-09 8:26 UTC (permalink / raw)
To: Niklas Söderlund; +Cc: Linux-Renesas, Jacopo Mondi
Hi Niklas,
On Mon, Mar 8, 2021 at 5:00 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> This patch adds VIN{4,5}_high8 support to the R8A77951 SoC.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> * Changes since v1
> - Rename g8 to high8 per Geerts suggestion.
> - Rebase to renesas-pinctrl.
Thanks for the update!
> --- a/drivers/pinctrl/renesas/pfc-r8a77951.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
> @@ -4126,6 +4126,18 @@ static const union vin_data vin4_data_b_mux = {
> VI4_DATA22_MARK, VI4_DATA23_MARK,
> },
> };
> +static const unsigned int vin4_high8_pins[] = {
> + RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
> + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin4_high8_mux[] = {
> + VI4_DATA8_MARK, VI4_DATA9_MARK,
> + VI4_DATA10_MARK, VI4_DATA11_MARK,
> + VI4_DATA12_MARK, VI4_DATA13_MARK,
> + VI4_DATA14_MARK, VI4_DATA15_MARK,
> +};
I think for vin4, you should keep on calling them "vin4_g8", as vin4
supports 24-bit RGB, and "high8" would mean lines 16-23, not 8-15.
Same comment for the other patches, obviously.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-03-09 8:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-08 15:59 [PATCH v2 0/4] pinctrl: renesas: Add vin{4,5}_high8 pins Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 1/4] pinctrl: renesas: r8a77951: " Niklas Söderlund
2021-03-09 8:26 ` Geert Uytterhoeven
2021-03-08 15:59 ` [PATCH v2 2/4] pinctrl: renesas: r8a7796: " Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 3/4] pinctrl: renesas: r8a77990: " Niklas Söderlund
2021-03-08 15:59 ` [PATCH v2 4/4] pinctrl: renesas: r8a77965: " Niklas Söderlund
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