* [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support
@ 2022-08-31 8:26 Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking Tomi Valkeinen
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Tomi Valkeinen @ 2022-08-31 8:26 UTC (permalink / raw)
To: Douglas Anderson, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc
Cc: Tomi Valkeinen
Hi,
v5 of the series can be found from:
https://lore.kernel.org/all/20220824130034.196041-1-tomi.valkeinen@ideasonboard.com/
Changes to v5:
- Drop the broken "check AUX errors better" patch
- Fix sync pulse widths in "Reject modes with too large blanking"
- Drop the text about eDP, detect and get_edid from the desc of
"Implement bridge connector operations"
Tomi
Laurent Pinchart (2):
drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode
drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP
Tomi Valkeinen (1):
drm/bridge: ti-sn65dsi86: Reject modes with too large blanking
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 72 +++++++++++++++++++++++++--
1 file changed, 69 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking
2022-08-31 8:26 [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Tomi Valkeinen
@ 2022-08-31 8:26 ` Tomi Valkeinen
2022-09-01 11:54 ` Robert Foss
2022-08-31 8:26 ` [PATCH v6 2/3] drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode Tomi Valkeinen
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Tomi Valkeinen @ 2022-08-31 8:26 UTC (permalink / raw)
To: Douglas Anderson, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc
Cc: Tomi Valkeinen
From: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
The front and back porch registers are 8 bits, and pulse width registers
are 15 bits, so reject any modes with larger periods.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 90bbabde1595..09d3c65fa2ba 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -747,6 +747,29 @@ ti_sn_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->clock > 594000)
return MODE_CLOCK_HIGH;
+ /*
+ * The front and back porch registers are 8 bits, and pulse width
+ * registers are 15 bits, so reject any modes with larger periods.
+ */
+
+ if ((mode->hsync_start - mode->hdisplay) > 0xff)
+ return MODE_HBLANK_WIDE;
+
+ if ((mode->vsync_start - mode->vdisplay) > 0xff)
+ return MODE_VBLANK_WIDE;
+
+ if ((mode->hsync_end - mode->hsync_start) > 0x7fff)
+ return MODE_HSYNC_WIDE;
+
+ if ((mode->vsync_end - mode->vsync_start) > 0x7fff)
+ return MODE_VSYNC_WIDE;
+
+ if ((mode->htotal - mode->hsync_end) > 0xff)
+ return MODE_HBLANK_WIDE;
+
+ if ((mode->vtotal - mode->vsync_end) > 0xff)
+ return MODE_VBLANK_WIDE;
+
return MODE_OK;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 2/3] drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode
2022-08-31 8:26 [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking Tomi Valkeinen
@ 2022-08-31 8:26 ` Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 3/3] drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP Tomi Valkeinen
2022-09-01 12:02 ` [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Robert Foss
3 siblings, 0 replies; 6+ messages in thread
From: Tomi Valkeinen @ 2022-08-31 8:26 UTC (permalink / raw)
To: Douglas Anderson, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc
Cc: Laurent Pinchart, Tomi Valkeinen
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Despite the SN65DSI86 being an eDP bridge, on some systems its output is
routed to a DisplayPort connector. Enable DisplayPort mode when the next
component in the display pipeline is detected as a DisplayPort
connector, and disable eDP features in that case.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reworked to set bridge type based on the next bridge/connector.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
--
Changes since v1/RFC:
- Rebased on top of "drm/bridge: ti-sn65dsi86: switch to
devm_drm_of_get_bridge"
- eDP/DP mode determined from the next bridge connector type.
Changes since v2:
- Remove setting of Standard DP Scrambler Seed. (It's read-only).
- Prevent setting DP_EDP_CONFIGURATION_SET in
ti_sn_bridge_atomic_enable()
- Use Doug's suggested text for disabling ASSR on DP mode.
Changes since v3:
- Remove ASSR_CONTROL definition
Changes since v4:
- Refactor code to configure the DP/eDP scrambler in one place.
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 09d3c65fa2ba..6e053e2af229 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -92,6 +92,8 @@
#define SN_DATARATE_CONFIG_REG 0x94
#define DP_DATARATE_MASK GENMASK(7, 5)
#define DP_DATARATE(x) ((x) << 5)
+#define SN_TRAINING_SETTING_REG 0x95
+#define SCRAMBLE_DISABLE BIT(4)
#define SN_ML_TX_MODE_REG 0x96
#define ML_TX_MAIN_LINK_OFF 0
#define ML_TX_NORMAL_MODE BIT(0)
@@ -1070,12 +1072,23 @@ static void ti_sn_bridge_atomic_enable(struct drm_bridge *bridge,
/*
* The SN65DSI86 only supports ASSR Display Authentication method and
- * this method is enabled by default. An eDP panel must support this
+ * this method is enabled for eDP panels. An eDP panel must support this
* authentication method. We need to enable this method in the eDP panel
* at DisplayPort address 0x0010A prior to link training.
+ *
+ * As only ASSR is supported by SN65DSI86, for full DisplayPort displays
+ * we need to disable the scrambler.
*/
- drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET,
- DP_ALTERNATE_SCRAMBLER_RESET_ENABLE);
+ if (pdata->bridge.type == DRM_MODE_CONNECTOR_eDP) {
+ drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET,
+ DP_ALTERNATE_SCRAMBLER_RESET_ENABLE);
+
+ regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG,
+ SCRAMBLE_DISABLE, 0);
+ } else {
+ regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG,
+ SCRAMBLE_DISABLE, SCRAMBLE_DISABLE);
+ }
bpp = ti_sn_bridge_get_bpp(connector);
/* Set the DP output format (18 bpp or 24 bpp) */
@@ -1241,6 +1254,8 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
pdata->bridge.funcs = &ti_sn_bridge_funcs;
pdata->bridge.of_node = np;
+ pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort
+ ? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
drm_bridge_add(&pdata->bridge);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v6 3/3] drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP
2022-08-31 8:26 [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 2/3] drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode Tomi Valkeinen
@ 2022-08-31 8:26 ` Tomi Valkeinen
2022-09-01 12:02 ` [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Robert Foss
3 siblings, 0 replies; 6+ messages in thread
From: Tomi Valkeinen @ 2022-08-31 8:26 UTC (permalink / raw)
To: Douglas Anderson, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc
Cc: Laurent Pinchart, Tomi Valkeinen
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Implement the bridge connector-related .get_edid() and .detect()
operations for full DP mode, and report the related bridge capabilities
and type.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
---
Changes since v1:
- The connector .get_modes() operation doesn't rely on EDID anymore,
__ti_sn_bridge_get_edid() and ti_sn_bridge_get_edid() got merged
together
- Fix on top of Sam Ravnborg's DRM_BRIDGE_STATE_OPS
Changes since v2: [Kieran]
- Only support EDID on DRM_MODE_CONNECTOR_DisplayPort modes.
Changes since v3: [Kieran]
- Remove PM calls in ti_sn_bridge_get_edid() and simplify
Changes since v4:
- Add .detect()
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 28 +++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 6e053e2af229..3c3561942eb6 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -29,6 +29,7 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_bridge_connector.h>
+#include <drm/drm_edid.h>
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_of.h>
#include <drm/drm_panel.h>
@@ -68,6 +69,7 @@
#define BPP_18_RGB BIT(0)
#define SN_HPD_DISABLE_REG 0x5C
#define HPD_DISABLE BIT(0)
+#define HPD_DEBOUNCED_STATE BIT(4)
#define SN_GPIO_IO_REG 0x5E
#define SN_GPIO_INPUT_SHIFT 4
#define SN_GPIO_OUTPUT_SHIFT 0
@@ -1158,10 +1160,33 @@ static void ti_sn_bridge_atomic_post_disable(struct drm_bridge *bridge,
pm_runtime_put_sync(pdata->dev);
}
+static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
+{
+ struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
+ int val = 0;
+
+ pm_runtime_get_sync(pdata->dev);
+ regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
+ pm_runtime_put_autosuspend(pdata->dev);
+
+ return val & HPD_DEBOUNCED_STATE ? connector_status_connected
+ : connector_status_disconnected;
+}
+
+static struct edid *ti_sn_bridge_get_edid(struct drm_bridge *bridge,
+ struct drm_connector *connector)
+{
+ struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
+
+ return drm_get_edid(connector, &pdata->aux.ddc);
+}
+
static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
.attach = ti_sn_bridge_attach,
.detach = ti_sn_bridge_detach,
.mode_valid = ti_sn_bridge_mode_valid,
+ .get_edid = ti_sn_bridge_get_edid,
+ .detect = ti_sn_bridge_detect,
.atomic_pre_enable = ti_sn_bridge_atomic_pre_enable,
.atomic_enable = ti_sn_bridge_atomic_enable,
.atomic_disable = ti_sn_bridge_atomic_disable,
@@ -1257,6 +1282,9 @@ static int ti_sn_bridge_probe(struct auxiliary_device *adev,
pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort
? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
+ if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort)
+ pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
+
drm_bridge_add(&pdata->bridge);
ret = ti_sn_attach_host(pdata);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking
2022-08-31 8:26 ` [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking Tomi Valkeinen
@ 2022-09-01 11:54 ` Robert Foss
0 siblings, 0 replies; 6+ messages in thread
From: Robert Foss @ 2022-09-01 11:54 UTC (permalink / raw)
To: Tomi Valkeinen
Cc: Douglas Anderson, Andrzej Hajda, Neil Armstrong,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc,
Tomi Valkeinen
On Wed, 31 Aug 2022 at 10:27, Tomi Valkeinen
<tomi.valkeinen@ideasonboard.com> wrote:
>
> From: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
>
> The front and back porch registers are 8 bits, and pulse width registers
> are 15 bits, so reject any modes with larger periods.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index 90bbabde1595..09d3c65fa2ba 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -747,6 +747,29 @@ ti_sn_bridge_mode_valid(struct drm_bridge *bridge,
> if (mode->clock > 594000)
> return MODE_CLOCK_HIGH;
>
> + /*
> + * The front and back porch registers are 8 bits, and pulse width
> + * registers are 15 bits, so reject any modes with larger periods.
> + */
> +
> + if ((mode->hsync_start - mode->hdisplay) > 0xff)
> + return MODE_HBLANK_WIDE;
> +
> + if ((mode->vsync_start - mode->vdisplay) > 0xff)
> + return MODE_VBLANK_WIDE;
> +
> + if ((mode->hsync_end - mode->hsync_start) > 0x7fff)
> + return MODE_HSYNC_WIDE;
> +
> + if ((mode->vsync_end - mode->vsync_start) > 0x7fff)
> + return MODE_VSYNC_WIDE;
> +
> + if ((mode->htotal - mode->hsync_end) > 0xff)
> + return MODE_HBLANK_WIDE;
> +
> + if ((mode->vtotal - mode->vsync_end) > 0xff)
> + return MODE_VBLANK_WIDE;
> +
> return MODE_OK;
> }
>
> --
> 2.34.1
>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support
2022-08-31 8:26 [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Tomi Valkeinen
` (2 preceding siblings ...)
2022-08-31 8:26 ` [PATCH v6 3/3] drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP Tomi Valkeinen
@ 2022-09-01 12:02 ` Robert Foss
3 siblings, 0 replies; 6+ messages in thread
From: Robert Foss @ 2022-09-01 12:02 UTC (permalink / raw)
To: Tomi Valkeinen
Cc: Douglas Anderson, Andrzej Hajda, Neil Armstrong,
Laurent Pinchart, Kieran Bingham, dri-devel, linux-renesas-soc
On Wed, 31 Aug 2022 at 10:27, Tomi Valkeinen
<tomi.valkeinen@ideasonboard.com> wrote:
>
> Hi,
>
> v5 of the series can be found from:
>
> https://lore.kernel.org/all/20220824130034.196041-1-tomi.valkeinen@ideasonboard.com/
>
> Changes to v5:
> - Drop the broken "check AUX errors better" patch
> - Fix sync pulse widths in "Reject modes with too large blanking"
> - Drop the text about eDP, detect and get_edid from the desc of
> "Implement bridge connector operations"
>
> Tomi
>
> Laurent Pinchart (2):
> drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode
> drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP
>
> Tomi Valkeinen (1):
> drm/bridge: ti-sn65dsi86: Reject modes with too large blanking
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 72 +++++++++++++++++++++++++--
> 1 file changed, 69 insertions(+), 3 deletions(-)
>
> --
> 2.34.1
>
Applied to drm-misc-next.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-09-01 12:03 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2022-08-31 8:26 [PATCH v6 0/3] drm/bridge: ti-sn65dsi86: Basic DP support Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 1/3] drm/bridge: ti-sn65dsi86: Reject modes with too large blanking Tomi Valkeinen
2022-09-01 11:54 ` Robert Foss
2022-08-31 8:26 ` [PATCH v6 2/3] drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode Tomi Valkeinen
2022-08-31 8:26 ` [PATCH v6 3/3] drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP Tomi Valkeinen
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