* [PATCH] clk: renesas: rzg2l: Support sd clk mux round operation
@ 2022-09-19 8:41 Biju Das
2022-09-26 12:23 ` Geert Uytterhoeven
0 siblings, 1 reply; 2+ messages in thread
From: Biju Das @ 2022-09-19 8:41 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd
Cc: Biju Das, Geert Uytterhoeven, linux-renesas-soc, linux-clk,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Currently, determine_rate() is not doing any round operation
and due to this it always selects a lower clock source compared
to the closest higher one.
Support sd clk mux round operation by passing
CLK_MUX_ROUND_CLOSEST flag to clk_mux_determine_rate_flags().
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/clk/renesas/rzg2l-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 3ff6ecd61756..5dfe3624f681 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -182,7 +182,7 @@ rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
static int rzg2l_cpg_sd_clk_mux_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
- return clk_mux_determine_rate_flags(hw, req, 0);
+ return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
}
static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] clk: renesas: rzg2l: Support sd clk mux round operation
2022-09-19 8:41 [PATCH] clk: renesas: rzg2l: Support sd clk mux round operation Biju Das
@ 2022-09-26 12:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 2+ messages in thread
From: Geert Uytterhoeven @ 2022-09-26 12:23 UTC (permalink / raw)
To: Biju Das
Cc: Michael Turquette, Stephen Boyd, linux-renesas-soc, linux-clk,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad, Wolfram Sang
CC wsa
On Mon, Sep 19, 2022 at 10:41 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Currently, determine_rate() is not doing any round operation
> and due to this it always selects a lower clock source compared
> to the closest higher one.
>
> Support sd clk mux round operation by passing
> CLK_MUX_ROUND_CLOSEST flag to clk_mux_determine_rate_flags().
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v6.2.
> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -182,7 +182,7 @@ rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
> static int rzg2l_cpg_sd_clk_mux_determine_rate(struct clk_hw *hw,
> struct clk_rate_request *req)
> {
> - return clk_mux_determine_rate_flags(hw, req, 0);
> + return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
> }
>
> static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-09-19 8:41 [PATCH] clk: renesas: rzg2l: Support sd clk mux round operation Biju Das
2022-09-26 12:23 ` Geert Uytterhoeven
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