[PATCH 0/3] Add PWC, uSD and eMMC support to RZ/V2M EVK

[PATCH 0/3] Add PWC, uSD and eMMC support to RZ/V2M EVK

[Fabrizio Castro]

Dear All,

this series aims at adding uSD and eMMC support to the RZ/V2M EVK.
The uSD card bus voltage is controlled via one of GPIOs from the
PWC, therefore this series takes care of adding SoC specific
and board specific PWC support, too.

Thanks,
Fab

Fabrizio Castro (3):
  arm64: dts: renesas: r9a09g011: Add PWC support
  arm64: dts: renesas: v2mevk2: Add PWC support
  arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

 .../boot/dts/renesas/r9a09g011-v2mevk2.dts    | 127 ++++++++++++++++++
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi    |   8 ++
 2 files changed, 135 insertions(+)

-- 
2.34.1

[PATCH 1/3] arm64: dts: renesas: r9a09g011: Add PWC support

[Fabrizio Castro]

The RZ/V2M SoC contains an External Power Sequence Controller (PWC)
module. This module provides an external power supply on/off
sequence, on/off signal for the LPDDR4 core power supply, General
Purpose Outputs, and key input signals.

This patch adds PWC support to the SoC specific device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
index b0c066c5e0ba..b5d6f7701ef1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
@@ -178,6 +178,14 @@ cpg: clock-controller@a3500000 {
 			#power-domain-cells = <0>;
 		};
 
+		pwc: pwc@a3700000 {
+			compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
+			reg = <0 0xa3700000 0 0x800>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
 		sys: system-controller@a3f03000 {
 			compatible = "renesas,r9a09g011-sys";
 			reg = <0 0xa3f03000 0 0x400>;
-- 
2.34.1

[PATCH 2/3] arm64: dts: renesas: v2mevk2: Add PWC support

[Fabrizio Castro]

The RZ/V2M EVK uses the PWC IP to control external power supplies
and the I/O voltage for the uSD card.

This patch enables the PWC node, and it also enables the poweroff
features since PWC is actually used to control the board power
rails.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
index 11e1d51c7c0e..d6737395df67 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
@@ -80,6 +80,11 @@ i2c2_pins: i2c2 {
 	};
 };
 
+&pwc {
+	renesas,rzv2m-pwc-power;
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
-- 
2.34.1

[PATCH 3/3] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

[Fabrizio Castro]

The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
Add support for the both of them.

Please note that the pinctrl driver for RZ/V2M doesn't support
interrupts yet, therefore the card detect pin has been connected
to the SDHI IP directly in this patch.
We'll connect the card detect pin to its corresponding GPIO when
we'll have driver support for interrupts in the RZ/V2M pinctrl
driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
---
 .../boot/dts/renesas/r9a09g011-v2mevk2.dts    | 122 ++++++++++++++++++
 1 file changed, 122 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
index d6737395df67..75ded4680dba 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include "r9a09g011.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
 
 / {
@@ -35,6 +36,36 @@ memory@180000000 {
 		device_type = "memory";
 		reg = <0x1 0x80000000 0x0 0x80000000>;
 	};
+
+	reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vccq_sdhi0: regulator-vccq-sdhi0 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI0 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&pwc 0 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 0>, <1800000 1>;
+	};
 };
 
 &avb {
@@ -50,6 +81,22 @@ phy0: ethernet-phy@0 {
 	};
 };
 
+&emmc {
+	pinctrl-0 = <&emmc_pins>;
+	pinctrl-1 = <&emmc_pins>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3v3>;
+	vqmmc-supply = <&reg_1v8>;
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	fixed-emmc-driver-type = <1>;
+	max-frequency = <200000000>;
+	status = "okay";
+};
+
+
 &extal_clk {
 	clock-frequency = <48000000>;
 };
@@ -78,6 +125,68 @@ i2c2_pins: i2c2 {
 		pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
 			 <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
 	};
+
+	sdhi0_pins: sd0 {
+		sd0_data {
+			pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
+				 <RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
+				 <RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
+				 <RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
+			power-source = <3300>;
+		};
+
+		sd0_ctrl {
+			pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
+				 <RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
+			power-source = <3300>;
+		};
+
+		sd0_cd {
+			pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
+			power-source = <3300>;
+		};
+	};
+
+	sdhi0_pins_uhs: sd0_uhs {
+		sd0_data_uhs {
+			pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
+				 <RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
+				 <RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
+				 <RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
+			power-source = <1800>;
+		};
+
+		sd0_ctrl_uhs {
+			pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
+				 <RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
+			power-source = <1800>;
+		};
+
+		sd0_cd_uhs {
+			pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
+			power-source = <1800>;
+		};
+	};
+
+	emmc_pins: emmc {
+		emmc_pins_data {
+			pinmux = <RZV2M_PORT_PINMUX(0, 0, 2)>, /* MMDAT0 */
+				 <RZV2M_PORT_PINMUX(0, 1, 2)>, /* MMDAT1 */
+				 <RZV2M_PORT_PINMUX(0, 2, 2)>, /* MMDAT2 */
+				 <RZV2M_PORT_PINMUX(0, 3, 2)>, /* MMDAT3 */
+				 <RZV2M_PORT_PINMUX(0, 4, 2)>, /* MMDAT4 */
+				 <RZV2M_PORT_PINMUX(0, 5, 2)>, /* MMDAT5 */
+				 <RZV2M_PORT_PINMUX(0, 6, 2)>, /* MMDAT6 */
+				 <RZV2M_PORT_PINMUX(0, 7, 2)>; /* MMDAT7 */
+			power-source = <1800>;
+		};
+
+		emmc_pins_ctrl {
+			pinmux = <RZV2M_PORT_PINMUX(0, 10, 2)>, /* MMCMD */
+				 <RZV2M_PORT_PINMUX(0, 11, 2)>; /* MMCLK */
+			power-source = <1800>;
+		};
+	};
 };
 
 &pwc {
@@ -85,6 +194,19 @@ &pwc {
 	status = "okay";
 };
 
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-1 = <&sdhi0_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3v3>;
+	vqmmc-supply = <&vccq_sdhi0>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
-- 
2.34.1

Re: [PATCH 1/3] arm64: dts: renesas: r9a09g011: Add PWC support

[Geert Uytterhoeven]

On Wed, Jan 18, 2023 at 3:48 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> The RZ/V2M SoC contains an External Power Sequence Controller (PWC)
> module. This module provides an external power supply on/off
> sequence, on/off signal for the LPDDR4 core power supply, General
> Purpose Outputs, and key input signals.
>
> This patch adds PWC support to the SoC specific device tree.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.3.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/3] arm64: dts: renesas: v2mevk2: Add PWC support

[Geert Uytterhoeven]

On Wed, Jan 18, 2023 at 3:48 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> The RZ/V2M EVK uses the PWC IP to control external power supplies
> and the I/O voltage for the uSD card.
>
> This patch enables the PWC node, and it also enables the poweroff
> features since PWC is actually used to control the board power
> rails.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.3.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

[Geert Uytterhoeven]

Hi Fabrizio,

On Wed, Jan 18, 2023 at 3:48 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
> Add support for the both of them.
>
> Please note that the pinctrl driver for RZ/V2M doesn't support
> interrupts yet, therefore the card detect pin has been connected
> to the SDHI IP directly in this patch.
> We'll connect the card detect pin to its corresponding GPIO when
> we'll have driver support for interrupts in the RZ/V2M pinctrl
> driver.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts

> @@ -50,6 +81,22 @@ phy0: ethernet-phy@0 {
>         };
>  };
>
> +&emmc {
> +       pinctrl-0 = <&emmc_pins>;
> +       pinctrl-1 = <&emmc_pins>;
> +       pinctrl-names = "default", "state_uhs";
> +
> +       vmmc-supply = <&reg_3v3>;
> +       vqmmc-supply = <&reg_1v8>;
> +       bus-width = <8>;
> +       mmc-hs200-1_8v;
> +       non-removable;

Does this need "no-sd" and "no-sdio"?

> +       fixed-emmc-driver-type = <1>;
> +       max-frequency = <200000000>;
> +       status = "okay";
> +};
> +
> +
>  &extal_clk {
>         clock-frequency = <48000000>;
>  };
> @@ -78,6 +125,68 @@ i2c2_pins: i2c2 {
>                 pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
>                          <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
>         };
> +
> +       sdhi0_pins: sd0 {

[...]

> +       };
> +
> +       sdhi0_pins_uhs: sd0_uhs {

[...]

> +       };
> +
> +       emmc_pins: emmc {

Please move up to preserve sort order.

The rest LGTM, so with the above clarified/fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>


Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH 3/3] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

[Fabrizio Castro]

Hi Geert,

Thanks for your feedback!

> 
> Hi Fabrizio,
> 
> On Wed, Jan 18, 2023 at 3:48 PM Fabrizio Castro
> <fabrizio.castro.jz@renesas.com> wrote:
> > The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
> > Add support for the both of them.
> >
> > Please note that the pinctrl driver for RZ/V2M doesn't support
> > interrupts yet, therefore the card detect pin has been connected
> > to the SDHI IP directly in this patch.
> > We'll connect the card detect pin to its corresponding GPIO when
> > we'll have driver support for interrupts in the RZ/V2M pinctrl
> > driver.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
> 
> > @@ -50,6 +81,22 @@ phy0: ethernet-phy@0 {
> >         };
> >  };
> >
> > +&emmc {
> > +       pinctrl-0 = <&emmc_pins>;
> > +       pinctrl-1 = <&emmc_pins>;
> > +       pinctrl-names = "default", "state_uhs";
> > +
> > +       vmmc-supply = <&reg_3v3>;
> > +       vqmmc-supply = <&reg_1v8>;
> > +       bus-width = <8>;
> > +       mmc-hs200-1_8v;
> > +       non-removable;
> 
> Does this need "no-sd" and "no-sdio"?

I totally missed that.
I'll add those, retest, and I'll update the patch.

> 
> > +       fixed-emmc-driver-type = <1>;
> > +       max-frequency = <200000000>;
> > +       status = "okay";
> > +};
> > +
> > +
> >  &extal_clk {
> >         clock-frequency = <48000000>;
> >  };
> > @@ -78,6 +125,68 @@ i2c2_pins: i2c2 {
> >                 pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
> >                          <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
> >         };
> > +
> > +       sdhi0_pins: sd0 {
> 
> [...]
> 
> > +       };
> > +
> > +       sdhi0_pins_uhs: sd0_uhs {
> 
> [...]
> 
> > +       };
> > +
> > +       emmc_pins: emmc {
> 
> Please move up to preserve sort order.

I'll fix that in the new version of the patch.

Thanks,
Fab

> 
> The rest LGTM, so with the above clarified/fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a
> hacker. But
> when I'm talking to journalists I just say "programmer" or something
> like that.
>                                 -- Linus Torvalds