* [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3
@ 2022-06-13 13:49 Wolfram Sang
2022-06-13 13:49 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SCIF 0 node Wolfram Sang
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Wolfram Sang @ 2022-06-13 13:49 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index ebc4a052207a..c872030ec4fe 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -314,6 +314,9 @@ scif3: serial@e6c50000 {
<&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x57>, <&dmac0 0x56>,
+ <&dmac1 0x57>, <&dmac1 0x56>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
--
2.35.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SCIF 0 node
2022-06-13 13:49 [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Wolfram Sang
@ 2022-06-13 13:49 ` Wolfram Sang
2022-06-13 13:49 ` [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector Wolfram Sang
2022-06-15 8:59 ` [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Geert Uytterhoeven
2 siblings, 0 replies; 5+ messages in thread
From: Wolfram Sang @ 2022-06-13 13:49 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Linh Phung, Wolfram Sang, Geert Uytterhoeven, Magnus Damm,
Rob Herring, Krzysztof Kozlowski, devicetree, linux-kernel
From: Linh Phung <linh.phung.jy@renesas.com>
Extracted from a bigger patch in the BSP, rebased, reg length corrected,
and DMA properties added. SCIF0 works fine, SCIF1+4 skipped because they
haven't been tested yet.
Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index c872030ec4fe..2cae951c4375 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -305,6 +305,23 @@ hscif1: serial@e6550000 {
status = "disabled";
};
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a779f0",
+ "renesas,rcar-gen4-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>,
+ <&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x51>, <&dmac0 0x50>,
+ <&dmac1 0x51>, <&dmac1 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a779f0",
"renesas,rcar-gen4-scif", "renesas,scif";
--
2.35.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector
2022-06-13 13:49 [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Wolfram Sang
2022-06-13 13:49 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SCIF 0 node Wolfram Sang
@ 2022-06-13 13:49 ` Wolfram Sang
2022-06-14 15:48 ` Geert Uytterhoeven
2022-06-15 8:59 ` [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Geert Uytterhoeven
2 siblings, 1 reply; 5+ messages in thread
From: Wolfram Sang @ 2022-06-13 13:49 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
The schematics label it as SCIF0 debug port.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index 3208d2148768..7a62afb64204 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
@@ -68,6 +68,11 @@ i2c4_pins: i2c4 {
function = "i2c4";
};
+ scif0_pins: scif0 {
+ groups = "scif0_data", "scif0_ctrl";
+ function = "scif0";
+ };
+
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
@@ -79,6 +84,14 @@ &rwdt {
status = "okay";
};
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
&scif_clk {
clock-frequency = <24000000>;
};
--
2.35.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector
2022-06-13 13:49 ` [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector Wolfram Sang
@ 2022-06-14 15:48 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2022-06-14 15:48 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Mon, Jun 13, 2022 at 3:49 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> The schematics label it as SCIF0 debug port.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
> @@ -68,6 +68,11 @@ i2c4_pins: i2c4 {
> function = "i2c4";
> };
>
> + scif0_pins: scif0 {
> + groups = "scif0_data", "scif0_ctrl";
> + function = "scif0";
> + };
> +
> scif_clk_pins: scif_clk {
> groups = "scif_clk";
> function = "scif_clk";
> @@ -79,6 +84,14 @@ &rwdt {
> status = "okay";
> };
>
> +&scif0 {
> + pinctrl-0 = <&scif0_pins>;
> + pinctrl-names = "default";
> +
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> &scif_clk {
> clock-frequency = <24000000>;
> };
This needs a new serial alias under /aliases.
Mixing dynamic and static serial IDs may cause conflicts, cfr. commit
7678f4c20fa7670f ("serial: sh-sci: Add support for dynamic instances").
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3
2022-06-13 13:49 [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Wolfram Sang
2022-06-13 13:49 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SCIF 0 node Wolfram Sang
2022-06-13 13:49 ` [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector Wolfram Sang
@ 2022-06-15 8:59 ` Geert Uytterhoeven
2 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2022-06-15 8:59 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
On Mon, Jun 13, 2022 at 3:49 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-06-15 9:00 UTC | newest]
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2022-06-13 13:49 [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Wolfram Sang
2022-06-13 13:49 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SCIF 0 node Wolfram Sang
2022-06-13 13:49 ` [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector Wolfram Sang
2022-06-14 15:48 ` Geert Uytterhoeven
2022-06-15 8:59 ` [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3 Geert Uytterhoeven
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