[PATCH 0/6] pinctrl: sh-pfc: Fix number of pins/marks mismatches

[PATCH 0/6] pinctrl: sh-pfc: Fix number of pins/marks mismatches

[Geert Uytterhoeven]

	Hi all,

This patch series fixes several mismatches between the number of pins
and the number of marks in pin groups for Renesas SoCs.  All of these
have been detected by the last patch in the series, which adds a
build-time check for this particular case.

I believe none of the affected pins groups are configured by the
DTS files supplied with the kernel. 

I intend to queue this up in sh-pfc-for-v4.21, as I will probably have
other fixes to send a PR for anyway.

Thanks for your comments!

Geert Uytterhoeven (6):
  pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii
    group
  pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1
    group
  pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b
    group
  pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group
  pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group
  pinctrl: sh-pfc: Validate pins/marks in pin group at build time

 drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 3 ++-
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 6 +-----
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c  | 1 +
 drivers/pinctrl/sh-pfc/sh_pfc.h      | 3 ++-
 4 files changed, 6 insertions(+), 7 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH 1/6] pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group

[Geert Uytterhoeven]

The gether_gmii_mux[] array contains the REF125CK pin mark, but the
gether_gmii_pins[] array lacks the corresponding pin number.

Fixes: bae11d30d0cafdc5 ("sh-pfc: r8a7740: Add GETHER pin groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index d4f81491996deb51..de3393e20c4a17d5 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -1969,7 +1969,7 @@ static const unsigned int gether_gmii_pins[] = {
 	 */
 	185, 186, 187, 188, 189, 190, 191, 192, 174, 161, 204,
 	171, 170, 169, 168, 167, 166, 173, 172, 176, 184, 183, 203,
-	205, 163, 206, 207,
+	205, 163, 206, 207, 158,
 };
 static const unsigned int gether_gmii_mux[] = {
 	ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
-- 
2.17.1

[PATCH 2/6] pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group

[Geert Uytterhoeven]

The lcd0_data24_1_pins[] array contains the LCD0 D1[2-5] pin numbers,
but the lcd0_data24_1_mux[] array lacks the corresponding pin marks.

Fixes: 06c7dd866da70f6c ("sh-pfc: r8a7740: Add LCDC0 and LCDC1 pin groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index de3393e20c4a17d5..6d761e62c6c8a362 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -2141,6 +2141,7 @@ static const unsigned int lcd0_data24_1_mux[] = {
 	LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK,
 	LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK,
 	LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK,
+	LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK,
 	LCD0_D16_MARK, LCD0_D17_MARK, LCD0_D18_PORT163_MARK,
 	LCD0_D19_PORT162_MARK, LCD0_D20_PORT161_MARK, LCD0_D21_PORT158_MARK,
 	LCD0_D22_PORT160_MARK, LCD0_D23_PORT159_MARK,
-- 
2.17.1

[PATCH 3/6] pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group

[Geert Uytterhoeven]

The qspi_data4_b_mux[] array contains pin marks for the clock and chip
select pins.  The qspi_data4_b_pins[] array rightfully does not contain
the corresponding pin numbers, as the control pins are provided by a
separate group (qspi_ctrl_b).

Fixes: 2d0c386f135e4186 ("pinctrl: sh-pfc: r8a7791: Add QSPI pin groups")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 209f74a6e6ce5a6f..5d31d2b59e596e59 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -3217,8 +3217,7 @@ static const unsigned int qspi_data4_b_pins[] = {
 	RCAR_GP_PIN(6, 4),
 };
 static const unsigned int qspi_data4_b_mux[] = {
-	SPCLK_B_MARK, MOSI_IO0_B_MARK, MISO_IO1_B_MARK,
-	IO2_B_MARK, IO3_B_MARK, SSL_B_MARK,
+	MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK,
 };
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
-- 
2.17.1

[PATCH 4/6] pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group

[Geert Uytterhoeven]

The vin1_b_data18_mux[] arrays contains pin marks for the 2 LSB bits of
the color components.  The vin1_b_data18_pins[] array rightfully does
not include the corresponding pin numbers, as RGB18 is subset of RGB24,
containing only the 6 MSB bits of each component.

Fixes: 8e32c9671f84acd8 ("pinctrl: sh-pfc: r8a7791: Add VIN pins")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 5d31d2b59e596e59..2859231aaffc4546 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -4371,17 +4371,14 @@ static const unsigned int vin1_b_data18_pins[] = {
 };
 static const unsigned int vin1_b_data18_mux[] = {
 	/* B */
-	VI1_DATA0_B_MARK, VI1_DATA1_B_MARK,
 	VI1_DATA2_B_MARK, VI1_DATA3_B_MARK,
 	VI1_DATA4_B_MARK, VI1_DATA5_B_MARK,
 	VI1_DATA6_B_MARK, VI1_DATA7_B_MARK,
 	/* G */
-	VI1_G0_B_MARK, VI1_G1_B_MARK,
 	VI1_G2_B_MARK, VI1_G3_B_MARK,
 	VI1_G4_B_MARK, VI1_G5_B_MARK,
 	VI1_G6_B_MARK, VI1_G7_B_MARK,
 	/* R */
-	VI1_R0_B_MARK, VI1_R1_B_MARK,
 	VI1_R2_B_MARK, VI1_R3_B_MARK,
 	VI1_R4_B_MARK, VI1_R5_B_MARK,
 	VI1_R6_B_MARK, VI1_R7_B_MARK,
-- 
2.17.1

[PATCH 5/6] pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group

[Geert Uytterhoeven]

The tpu4_to3_mux[] array contains the TPU4TO3 pin mark, but the
tpu4_to3_pins[] array lacks the corresponding pin number.

Add the missing pin number, for non-GPIO pin F26.

Fixes: 5da4eb049de803c7 ("sh-pfc: sh73a0: Add TPU pin groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 654029fc8d96ffcc..085770e66895680a 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -3073,6 +3073,7 @@ static const unsigned int tpu4_to2_mux[] = {
 };
 static const unsigned int tpu4_to3_pins[] = {
 	/* TO */
+	PIN_NUMBER(6, 26),
 };
 static const unsigned int tpu4_to3_mux[] = {
 	TPU4TO3_MARK,
-- 
2.17.1

[PATCH 6/6] pinctrl: sh-pfc: Validate pins/marks in pin group at build time

[Geert Uytterhoeven]

Add a build-time check, to ensure the number of pins and pin marks in a
pin group matches.  This helps catching bugs early.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/sh_pfc.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 78dc342d7b390e02..a2c5d530aaa1c0b3 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -41,7 +41,8 @@ struct sh_pfc_pin {
 		.name = #alias,				\
 		.pins = n##_pins,			\
 		.mux = n##_mux,				\
-		.nr_pins = ARRAY_SIZE(n##_pins),	\
+		.nr_pins = ARRAY_SIZE(n##_pins) +	\
+		BUILD_BUG_ON_ZERO(!(sizeof(n##_pins) == sizeof(n##_mux))), \
 	}
 #define SH_PFC_PIN_GROUP(n)	SH_PFC_PIN_GROUP_ALIAS(n, n)
 
-- 
2.17.1

Re: [PATCH 1/6] pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:50PM +0100, Geert Uytterhoeven wrote:
> The gether_gmii_mux[] array contains the REF125CK pin mark, but the
> gether_gmii_pins[] array lacks the corresponding pin number.
> 
> Fixes: bae11d30d0cafdc5 ("sh-pfc: r8a7740: Add GETHER pin groups and functions")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 2/6] pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:51PM +0100, Geert Uytterhoeven wrote:
> The lcd0_data24_1_pins[] array contains the LCD0 D1[2-5] pin numbers,
> but the lcd0_data24_1_mux[] array lacks the corresponding pin marks.
> 
> Fixes: 06c7dd866da70f6c ("sh-pfc: r8a7740: Add LCDC0 and LCDC1 pin groups and functions")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 3/6] pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:52PM +0100, Geert Uytterhoeven wrote:
> The qspi_data4_b_mux[] array contains pin marks for the clock and chip
> select pins.  The qspi_data4_b_pins[] array rightfully does not contain
> the corresponding pin numbers, as the control pins are provided by a
> separate group (qspi_ctrl_b).
> 
> Fixes: 2d0c386f135e4186 ("pinctrl: sh-pfc: r8a7791: Add QSPI pin groups")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 4/6] pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:53PM +0100, Geert Uytterhoeven wrote:
> The vin1_b_data18_mux[] arrays contains pin marks for the 2 LSB bits of
> the color components.  The vin1_b_data18_pins[] array rightfully does
> not include the corresponding pin numbers, as RGB18 is subset of RGB24,
> containing only the 6 MSB bits of each component.
> 
> Fixes: 8e32c9671f84acd8 ("pinctrl: sh-pfc: r8a7791: Add VIN pins")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 5/6] pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:54PM +0100, Geert Uytterhoeven wrote:
> The tpu4_to3_mux[] array contains the TPU4TO3 pin mark, but the
> tpu4_to3_pins[] array lacks the corresponding pin number.
> 
> Add the missing pin number, for non-GPIO pin F26.
> 
> Fixes: 5da4eb049de803c7 ("sh-pfc: sh73a0: Add TPU pin groups and functions")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 6/6] pinctrl: sh-pfc: Validate pins/marks in pin group at build time

[Simon Horman]

On Thu, Dec 13, 2018 at 05:28:55PM +0100, Geert Uytterhoeven wrote:
> Add a build-time check, to ensure the number of pins and pin marks in a
> pin group matches.  This helps catching bugs early.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

A very nice enhancement :)

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 6/6] pinctrl: sh-pfc: Validate pins/marks in pin group at build time

[Geert Uytterhoeven]

On Thu, Dec 13, 2018 at 5:29 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> Add a build-time check, to ensure the number of pins and pin marks in a
> pin group matches.  This helps catching bugs early.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  drivers/pinctrl/sh-pfc/sh_pfc.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
> index 78dc342d7b390e02..a2c5d530aaa1c0b3 100644
> --- a/drivers/pinctrl/sh-pfc/sh_pfc.h
> +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
> @@ -41,7 +41,8 @@ struct sh_pfc_pin {
>                 .name = #alias,                         \
>                 .pins = n##_pins,                       \
>                 .mux = n##_mux,                         \
> -               .nr_pins = ARRAY_SIZE(n##_pins),        \
> +               .nr_pins = ARRAY_SIZE(n##_pins) +       \
> +               BUILD_BUG_ON_ZERO(!(sizeof(n##_pins) == sizeof(n##_mux))), \

Obviously the above can be written as

        BUILD_BUG_ON_ZERO(sizeof(n##_pins) != sizeof(n##_mux)), \

too.

The "ZERO" applies to the return value, not to the condition, which initially
mislead me, but I still got the actual code right ;-)

>         }
>  #define SH_PFC_PIN_GROUP(n)    SH_PFC_PIN_GROUP_ALIAS(n, n)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds