* [PATCH 0/3] r8a779f0: enable TMU
@ 2022-07-26 21:01 Wolfram Sang
2022-07-26 21:01 ` [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks Wolfram Sang
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Wolfram Sang @ 2022-07-26 21:01 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Wolfram Sang
Here are the patches to enable the TMU on a R-Car S4-8. They have been
tested with a Renesas Spider board using Kernel timer selftests on top
of renesas-drivers-2022-07-19-v5.19-rc7.
Wolfram Sang (3):
clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
arm64: dts: renesas: r8a779f0: Add TMU nodes
TEST: arm64: dts: renesas: spider: Enable TMU
.../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 20 ++++++
arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 65 +++++++++++++++++++
drivers/clk/renesas/r8a779f0-cpg-mssr.c | 10 +++
3 files changed, 95 insertions(+)
--
2.35.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
2022-07-26 21:01 [PATCH 0/3] r8a779f0: enable TMU Wolfram Sang
@ 2022-07-26 21:01 ` Wolfram Sang
2022-08-20 8:18 ` Geert Uytterhoeven
2022-07-26 21:01 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes Wolfram Sang
2022-07-26 21:01 ` [PATCH 3/3] TEST: arm64: dts: renesas: spider: Enable TMU Wolfram Sang
2 siblings, 1 reply; 7+ messages in thread
From: Wolfram Sang @ 2022-07-26 21:01 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Wolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/clk/renesas/r8a779f0-cpg-mssr.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 89cedd0f504c..6f8c967181f4 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -108,6 +108,11 @@ static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = {
DEF_FIXED("cbfusa", R8A779F0_CLK_CBFUSA, CLK_EXTAL, 2, 1),
DEF_FIXED("cpex", R8A779F0_CLK_CPEX, CLK_EXTAL, 2, 1),
+ DEF_FIXED("sasyncrt", R8A779F0_CLK_SASYNCRT, CLK_PLL5_DIV4, 48, 1),
+ DEF_FIXED("sasyncperd1", R8A779F0_CLK_SASYNCPERD1, CLK_PLL5_DIV4, 3, 1),
+ DEF_FIXED("sasyncperd2", R8A779F0_CLK_SASYNCPERD2, R8A779F0_CLK_SASYNCPERD1, 2, 1),
+ DEF_FIXED("sasyncperd4", R8A779F0_CLK_SASYNCPERD4, R8A779F0_CLK_SASYNCPERD1, 4, 1),
+
DEF_GEN4_SDH("sdh0", R8A779F0_CLK_SD0H, CLK_SDSRC, 0x870),
DEF_GEN4_SD("sd0", R8A779F0_CLK_SD0, R8A779F0_CLK_SD0H, 0x870),
@@ -140,6 +145,11 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
DEF_MOD("sdhi0", 706, R8A779F0_CLK_SD0),
DEF_MOD("sys-dmac0", 709, R8A779F0_CLK_S0D3_PER),
DEF_MOD("sys-dmac1", 710, R8A779F0_CLK_S0D3_PER),
+ DEF_MOD("tmu0", 713, R8A779F0_CLK_SASYNCRT),
+ DEF_MOD("tmu1", 714, R8A779F0_CLK_SASYNCPERD2),
+ DEF_MOD("tmu2", 715, R8A779F0_CLK_SASYNCPERD2),
+ DEF_MOD("tmu3", 716, R8A779F0_CLK_SASYNCPERD2),
+ DEF_MOD("tmu4", 717, R8A779F0_CLK_SASYNCPERD2),
DEF_MOD("wdt", 907, R8A779F0_CLK_R),
DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M),
DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M),
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes
2022-07-26 21:01 [PATCH 0/3] r8a779f0: enable TMU Wolfram Sang
2022-07-26 21:01 ` [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks Wolfram Sang
@ 2022-07-26 21:01 ` Wolfram Sang
2022-08-20 8:39 ` Geert Uytterhoeven
2022-07-26 21:01 ` [PATCH 3/3] TEST: arm64: dts: renesas: spider: Enable TMU Wolfram Sang
2 siblings, 1 reply; 7+ messages in thread
From: Wolfram Sang @ 2022-07-26 21:01 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Wolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index 0c59a93cbaaa..61bd168f51c6 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -334,6 +334,71 @@ tsc: thermal@e6198000 {
#thermal-sensor-cells = <1>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 482 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 483 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779f0",
"renesas,rcar-gen4-i2c";
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] TEST: arm64: dts: renesas: spider: Enable TMU
2022-07-26 21:01 [PATCH 0/3] r8a779f0: enable TMU Wolfram Sang
2022-07-26 21:01 ` [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks Wolfram Sang
2022-07-26 21:01 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes Wolfram Sang
@ 2022-07-26 21:01 ` Wolfram Sang
2 siblings, 0 replies; 7+ messages in thread
From: Wolfram Sang @ 2022-07-26 21:01 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Wolfram Sang
This patch enables TMU{0|1|2|3|4} on the Spider board.
Only for testing, not for upstream!
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index 4a876d47f59b..62887250fe39 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
@@ -140,3 +140,23 @@ &scif3 {
&scif_clk {
clock-frequency = <24000000>;
};
+
+&tmu0 {
+ status = "okay";
+};
+
+&tmu1 {
+ status = "okay";
+};
+
+&tmu2 {
+ status = "okay";
+};
+
+&tmu3 {
+ status = "okay";
+};
+
+&tmu4 {
+ status = "okay";
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
2022-07-26 21:01 ` [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks Wolfram Sang
@ 2022-08-20 8:18 ` Geert Uytterhoeven
0 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2022-08-20 8:18 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas
On Tue, Jul 26, 2022 at 11:03 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v6.1.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes
2022-07-26 21:01 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes Wolfram Sang
@ 2022-08-20 8:39 ` Geert Uytterhoeven
2022-08-22 10:17 ` Wolfram Sang
0 siblings, 1 reply; 7+ messages in thread
From: Geert Uytterhoeven @ 2022-08-20 8:39 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas
Hi Wolfram,
On Tue, Jul 26, 2022 at 11:03 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> @@ -334,6 +334,71 @@ tsc: thermal@e6198000 {
> #thermal-sensor-cells = <1>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@e6fc0000 {
> + compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
> + reg = <0 0xe6fc0000 0 0x30>;
> + interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>;
We really should update the DT bindings so we can describe the fourth
interrupt on TMU instances that support input capture.
I don't think we need a new compatible value, as we can just look at
the presence of the fourth (actually renesas-channels + 1) interrupt
to enable the feature (if the driver ever gains support).
> + clocks = <&cpg CPG_MOD 714>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
As the above matches how TMU is handled on other SoCs:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.1.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes
2022-08-20 8:39 ` Geert Uytterhoeven
@ 2022-08-22 10:17 ` Wolfram Sang
0 siblings, 0 replies; 7+ messages in thread
From: Wolfram Sang @ 2022-08-22 10:17 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linux-Renesas
[-- Attachment #1: Type: text/plain, Size: 1010 bytes --]
Hi Geert,
> > + interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>;
>
> We really should update the DT bindings so we can describe the fourth
> interrupt on TMU instances that support input capture.
Yes, but I also think this should be a separate series then.
> I don't think we need a new compatible value, as we can just look at
> the presence of the fourth (actually renesas-channels + 1) interrupt
> to enable the feature (if the driver ever gains support).
Good approach. But then, we should also switch to interrupt names to be
future proof, or? Who knows what other interrupts might be added later.
> As the above matches how TMU is handled on other SoCs:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v6.1.
Thanks!
Happy hacking,
Wolfram
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-08-22 10:17 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-26 21:01 [PATCH 0/3] r8a779f0: enable TMU Wolfram Sang
2022-07-26 21:01 ` [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks Wolfram Sang
2022-08-20 8:18 ` Geert Uytterhoeven
2022-07-26 21:01 ` [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes Wolfram Sang
2022-08-20 8:39 ` Geert Uytterhoeven
2022-08-22 10:17 ` Wolfram Sang
2022-07-26 21:01 ` [PATCH 3/3] TEST: arm64: dts: renesas: spider: Enable TMU Wolfram Sang
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).