From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 2/3] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
Date: Wed, 9 Jun 2021 17:57:43 +0200 [thread overview]
Message-ID: <CAMuHMdXQkqyQtXEPWTuAF9LG0HFPEJEWLuME_X0ejrs0G4J4Uw@mail.gmail.com> (raw)
In-Reply-To: <CA+V-a8tOMtS59OoWVK-c=zy2iK_nv_16Xu+2DBcUQPTq7nCa1Q@mail.gmail.com>
Hi Prabhakar,
On Wed, Jun 9, 2021 at 5:50 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Wed, Jun 9, 2021 at 8:27 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Fri, Jun 4, 2021 at 8:09 PM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> > > Add support for reading the LSI DEVID register which is present in
> > > SYSC block of RZ/G2{L,LC} SoC's.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > > --- a/drivers/soc/renesas/renesas-soc.c
> > > +++ b/drivers/soc/renesas/renesas-soc.c
> > > @@ -56,6 +56,11 @@ static const struct renesas_family fam_rzg2 __initconst __maybe_unused = {
> > > .reg = 0xfff00044, /* PRR (Product Register) */
> > > };
> > >
> > > +static const struct renesas_family fam_rzg2l __initconst __maybe_unused = {
> > > + .name = "RZ/G2L",
> > > + .reg = 0x11020a04,
> >
> > Please don't add hardcoded register addresses for new SoCs (i.e. drop
> > ".reg"). The "renesas,r9a07g044-sysc" is always present.
> > And if it were missing, the hardcoded fallback would lead into the
> > classic CCCR/PRR scheme, which is not correct for RZ/G2L...
> >
> I wanted to avoid iomap for the entire sysc block for just a single register.
The mapping will be rounded up to PAGE_SIZE anyway
(I know, SYSC is 64 KiB, hence larger than the typical page size).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2021-06-09 15:58 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-04 18:09 [PATCH 0/3] SoC identification support for RZ/G2L Lad Prabhakar
2021-06-04 18:09 ` [PATCH 1/3] dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for SYSC controller Lad Prabhakar
2021-06-09 7:19 ` Geert Uytterhoeven
2021-06-04 18:09 ` [PATCH 2/3] soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's Lad Prabhakar
2021-06-09 7:27 ` Geert Uytterhoeven
2021-06-09 15:49 ` Lad, Prabhakar
2021-06-09 15:57 ` Geert Uytterhoeven [this message]
2021-06-04 18:09 ` [PATCH 3/3] arm64: dts: renesas: r9a07g044: Add SYSC node to RZ/G2L SoC DTSI Lad Prabhakar
2021-06-09 7:28 ` Geert Uytterhoeven
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