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From: Biju Das <biju.das.jz@bp.renesas.com>
To: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH 1/6] dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings
Date: Mon, 21 Jun 2021 06:40:41 +0000	[thread overview]
Message-ID: <OS0PR01MB59220D650A09B6E6CBF36350860A9@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <YNAPJZ2nUB7rp0FU@vkoul-mobl>

Hi All,

As per the clock list document, I need to update the bindings.

I will send V2 this changes.

Regards,
Biju

> -----Original Message-----
> From: Vinod Koul <vkoul@kernel.org>
> Sent: 21 June 2021 05:02
> To: Biju Das <biju.das.jz@bp.renesas.com>; Rob Herring
> <robh+dt@kernel.org>
> Cc: Kishon Vijay Abraham I <kishon@ti.com>; linux-phy@lists.infradead.org;
> devicetree@vger.kernel.org; Geert Uytterhoeven <geert+renesas@glider.be>;
> Chris Paterson <Chris.Paterson2@renesas.com>; Biju Das
> <biju.das@bp.renesas.com>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@bp.renesas.com>; linux-renesas-soc@vger.kernel.org
> Subject: Re: [PATCH 1/6] dt-bindings: phy: renesas: Document RZ/G2L USB
> PHY Control bindings
> 
> On 11-06-21, 14:46, Biju Das wrote:
> > Add device tree binding document for RZ/G2L USB PHY control driver.
> 
> Rob ?
> 
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> >  .../phy/renesas,rzg2l-usbphyctrl.yaml         | 50 +++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml
> > b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml
> > new file mode 100644
> > index 000000000000..5fd316a2e79e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.y
> > +++ aml
> > @@ -0,0 +1,50 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Fphy%2Frenesas%2Crzg2l-usbphyctrl.yaml%23&amp;d
> > +ata=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C28c0b4be786244eaef1008d9
> > +346949a2%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C637598449085051
> > +587%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT
> > +iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=WtOl%2BWHTYN4TuB21rTKdJjdx
> > +bKLK96N7NkiSiRT65U0%3D&amp;reserved=0
> > +$schema:
> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cbiju.das.
> > +jz%40bp.renesas.com%7C28c0b4be786244eaef1008d9346949a2%7C53d82571da19
> > +47e49cb4625a166a4a2a%7C0%7C0%7C637598449085051587%7CUnknown%7CTWFpbGZ
> > +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > +3D%7C1000&amp;sdata=Y%2FVo3raj5AqUIv%2BaN0Vavdph6cHdWf1a7Imq6chC2KQ%3
> > +D&amp;reserved=0
> > +
> > +title: Renesas RZ/G2L USB2.0 PHY Control
> > +
> > +maintainers:
> > +  - Biju Das <biju.das.jz@bp.renesas.com>
> > +
> > +description:
> > +  The RZ/G2L USB2.0 PHY Control mainly controls reset and power down
> > +of the
> > +  USB/PHY.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - renesas,r9a07g044-usbphyctrl # RZ/G2{L,LC}
> > +      - const: renesas,rzg2l-usbphyctrl
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  '#phy-cells':
> > +    # see phy-bindings.txt in the same directory
> > +    const: 1
> > +    description: |
> > +      The phandle's argument in the PHY specifier is the phy reset
> control bit
> > +      of usb phy control.
> > +      0 = Port 1 Phy reset
> > +      1 = Port 2 Phy reset
> > +    enum: [ 0, 1 ]
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#phy-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    usbphyctrl@11c40000 {
> > +        compatible = "renesas,r9a07g044-usbphyctrl",
> > +                     "renesas,rzg2l-usbphyctrl";
> > +        reg = <0x11c40000 0x10000>;
> > +        #phy-cells = <1>;
> > +    };
> > --
> > 2.17.1
> 
> --
> ~Vinod

  reply	other threads:[~2021-06-21  6:40 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-11 13:46 [PATCH 0/6] Add RZ/G2L USB2.0 phy and host support Biju Das
2021-06-11 13:46 ` [PATCH 1/6] dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings Biju Das
2021-06-21  4:01   ` Vinod Koul
2021-06-21  6:40     ` Biju Das [this message]
2021-06-11 13:46 ` [PATCH 2/6] drivers: clk: renesas: r9a07g044-cpg: Add USB clocks Biju Das
2021-06-14 12:26   ` Geert Uytterhoeven
2021-06-15  8:58     ` Geert Uytterhoeven
2021-06-15  9:48       ` Laurent Pinchart
2021-06-15  9:53         ` Geert Uytterhoeven
2021-06-15  9:57           ` Laurent Pinchart
2021-06-15 10:24             ` Geert Uytterhoeven
2021-06-16 10:16               ` Biju Das
2021-06-16 11:33               ` Laurent Pinchart
2021-06-16 10:12       ` Biju Das
2021-06-11 13:46 ` [PATCH 3/6] phy: renesas: Add RZ/G2L usb phy control driver Biju Das
2021-06-21  4:13   ` Vinod Koul
2021-06-21  6:51     ` Biju Das
2021-06-11 13:46 ` [PATCH 4/6] arm64: configs: defconfig: Enable RZ/G2L USB PHY " Biju Das
2021-06-11 13:46 ` [PATCH 5/6] dt-bindings: phy: renesas,usb2-phy: Document RZ/G2L phy bindings Biju Das
2021-06-11 13:46 ` [PATCH 6/6] arm64: dts: renesas: r9a07g044: Add USB2.0 phy and host support Biju Das

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