* [PATCH 0/2] Add Ethernet support
@ 2021-10-12 16:51 Biju Das
2021-10-12 16:51 ` [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes Biju Das
2021-10-12 16:51 ` [PATCH 2/2] arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet Biju Das
0 siblings, 2 replies; 5+ messages in thread
From: Biju Das @ 2021-10-12 16:51 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
This patch series aims to add Ethernet support on RZ/G2L SMARC EVK
platform.
This patch series has functional dependency on [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=561965
Biju Das (2):
arm64: dts: renesas: r9a07g044: Add GbEther nodes
arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 40 ++++++++
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 97 +++++++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 1 -
3 files changed, 137 insertions(+), 1 deletion(-)
--
2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes
2021-10-12 16:51 [PATCH 0/2] Add Ethernet support Biju Das
@ 2021-10-12 16:51 ` Biju Das
2021-10-12 18:06 ` Sergei Shtylyov
2021-10-12 16:51 ` [PATCH 2/2] arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet Biju Das
1 sibling, 1 reply; 5+ messages in thread
From: Biju Das @ 2021-10-12 16:51 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Add Gigabit Ethernet{0,1} nodes to SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 0b0372a02515..93e1ec271ff1 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -488,6 +488,46 @@
status = "disabled";
};
+ eth0: ethernet@11c20000 {
+ compatible = "renesas,r9a07g044-gbeth",
+ "renesas,rzg2l-gbeth";
+ reg = <0 0x11c20000 0 0x10000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mux", "fil", "arp_ns";
+ phy-mode = "rgmii";
+ clocks = <&cpg CPG_MOD R9A07G044_ETH0_CLK_AXI>,
+ <&cpg CPG_MOD R9A07G044_ETH0_CLK_CHI>,
+ <&cpg CPG_CORE R9A07G044_CLK_HP>;
+ clock-names = "axi", "chi", "refclk";
+ resets = <&cpg R9A07G044_ETH0_RST_HW_N>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ eth1: ethernet@11c30000 {
+ compatible = "renesas,r9a07g044-gbeth",
+ "renesas,rzg2l-gbeth";
+ reg = <0 0x11c30000 0 0x10000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mux", "fil", "arp_ns";
+ phy-mode = "rgmii";
+ clocks = <&cpg CPG_MOD R9A07G044_ETH1_CLK_AXI>,
+ <&cpg CPG_MOD R9A07G044_ETH1_CLK_CHI>,
+ <&cpg CPG_CORE R9A07G044_CLK_HP>;
+ clock-names = "axi", "chi", "refclk";
+ resets = <&cpg R9A07G044_ETH1_RST_HW_N>;
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
phyrst: usbphy-ctrl@11c40000 {
compatible = "renesas,r9a07g044-usbphy-ctrl",
"renesas,rzg2l-usbphy-ctrl";
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet
2021-10-12 16:51 [PATCH 0/2] Add Ethernet support Biju Das
2021-10-12 16:51 ` [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes Biju Das
@ 2021-10-12 16:51 ` Biju Das
1 sibling, 0 replies; 5+ messages in thread
From: Biju Das @ 2021-10-12 16:51 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Enable Ethernet{0,1} interfaces on RZ/G2L SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 97 +++++++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 1 -
2 files changed, 97 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index fbf51043d6cc..7e84a29dddfa 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -19,6 +19,15 @@
#define SDHI (!EMMC)
/ {
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+ };
+
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
@@ -65,6 +74,58 @@
/delete-node/ channel@7;
};
+ð0 {
+ pinctrl-0 = <ð0_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy0: ethernet-phy@7 {
+ compatible = "ethernet-phy-id0022.1640",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ rxc-skew-psec = <2400>;
+ txc-skew-psec = <2400>;
+ rxdv-skew-psec = <0>;
+ txdv-skew-psec = <0>;
+ rxd0-skew-psec = <0>;
+ rxd1-skew-psec = <0>;
+ rxd2-skew-psec = <0>;
+ rxd3-skew-psec = <0>;
+ txd0-skew-psec = <0>;
+ txd1-skew-psec = <0>;
+ txd2-skew-psec = <0>;
+ txd3-skew-psec = <0>;
+ };
+};
+
+ð1 {
+ pinctrl-0 = <ð1_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&phy1>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ phy1: ethernet-phy@7 {
+ compatible = "ethernet-phy-id0022.1640",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ rxc-skew-psec = <2400>;
+ txc-skew-psec = <2400>;
+ rxdv-skew-psec = <0>;
+ txdv-skew-psec = <0>;
+ rxd0-skew-psec = <0>;
+ rxd1-skew-psec = <0>;
+ rxd2-skew-psec = <0>;
+ rxd3-skew-psec = <0>;
+ txd0-skew-psec = <0>;
+ txd1-skew-psec = <0>;
+ txd2-skew-psec = <0>;
+ txd3-skew-psec = <0>;
+ };
+};
+
&extal_clk {
clock-frequency = <24000000>;
};
@@ -74,6 +135,42 @@
pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
};
+ eth0_pins: eth0 {
+ pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
+ <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
+ <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
+ <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
+ <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
+ <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
+ <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
+ <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
+ <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
+ <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
+ <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
+ <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
+ <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
+ <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
+ <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+ };
+
+ eth1_pins: eth1 {
+ pinmux = <RZG2L_PORT_PINMUX(37, 2, 1)>, /* ET1_LINKSTA */
+ <RZG2L_PORT_PINMUX(37, 0, 1)>, /* ET1_MDC */
+ <RZG2L_PORT_PINMUX(37, 1, 1)>, /* ET1_MDIO */
+ <RZG2L_PORT_PINMUX(29, 0, 1)>, /* ET1_TXC */
+ <RZG2L_PORT_PINMUX(29, 1, 1)>, /* ET1_TX_CTL */
+ <RZG2L_PORT_PINMUX(30, 0, 1)>, /* ET1_TXD0 */
+ <RZG2L_PORT_PINMUX(30, 1, 1)>, /* ET1_TXD1 */
+ <RZG2L_PORT_PINMUX(31, 0, 1)>, /* ET1_TXD2 */
+ <RZG2L_PORT_PINMUX(31, 1, 1)>, /* ET1_TXD3 */
+ <RZG2L_PORT_PINMUX(33, 1, 1)>, /* ET1_RXC */
+ <RZG2L_PORT_PINMUX(34, 0, 1)>, /* ET1_RX_CTL */
+ <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
+ <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
+ <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
+ <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
+ };
+
gpio-sd0-pwr-en-hog {
gpio-hog;
gpios = <RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index d8b3d32dc6f5..2863e487a640 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -30,7 +30,6 @@
};
chosen {
- bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes
2021-10-12 16:51 ` [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes Biju Das
@ 2021-10-12 18:06 ` Sergei Shtylyov
2021-10-12 18:24 ` Biju Das
0 siblings, 1 reply; 5+ messages in thread
From: Sergei Shtylyov @ 2021-10-12 18:06 UTC (permalink / raw)
To: Biju Das, Rob Herring
Cc: Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, devicetree,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
On 10/12/21 7:51 PM, Biju Das wrote:
> Add Gigabit Ethernet{0,1} nodes to SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 40 ++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> index 0b0372a02515..93e1ec271ff1 100644
> --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> @@ -488,6 +488,46 @@
> status = "disabled";
> };
>
> + eth0: ethernet@11c20000 {
> + compatible = "renesas,r9a07g044-gbeth",
> + "renesas,rzg2l-gbeth";
> + reg = <0 0x11c20000 0 0x10000>;
> + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mux", "fil", "arp_ns";
Why 2 spaces before "arp_ns"?
[...]
MBR, Sergey
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes
2021-10-12 18:06 ` Sergei Shtylyov
@ 2021-10-12 18:24 ` Biju Das
0 siblings, 0 replies; 5+ messages in thread
From: Biju Das @ 2021-10-12 18:24 UTC (permalink / raw)
To: Sergei Shtylyov, Rob Herring
Cc: Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, devicetree,
Chris Paterson, Biju Das, Prabhakar Mahadev Lad
Hi Sergey,
> Subject: Re: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet
> nodes
>
> On 10/12/21 7:51 PM, Biju Das wrote:
>
> > Add Gigabit Ethernet{0,1} nodes to SoC DTSI.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 40 ++++++++++++++++++++++
> > 1 file changed, 40 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> > index 0b0372a02515..93e1ec271ff1 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> > @@ -488,6 +488,46 @@
> > status = "disabled";
> > };
> >
> > + eth0: ethernet@11c20000 {
> > + compatible = "renesas,r9a07g044-gbeth",
> > + "renesas,rzg2l-gbeth";
> > + reg = <0 0x11c20000 0 0x10000>;
> > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "mux", "fil", "arp_ns";
>
> Why 2 spaces before "arp_ns"?
Ok, will fix this in next version.
Regards,
Biju
>
> [...]
>
> MBR, Sergey
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-10-12 18:24 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2021-10-12 16:51 [PATCH 0/2] Add Ethernet support Biju Das
2021-10-12 16:51 ` [PATCH 1/2] arm64: dts: renesas: r9a07g044: Add GbEthernet nodes Biju Das
2021-10-12 18:06 ` Sergei Shtylyov
2021-10-12 18:24 ` Biju Das
2021-10-12 16:51 ` [PATCH 2/2] arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet Biju Das
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