* [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node
@ 2023-04-17 9:01 Biju Das
2023-04-17 9:01 ` [PATCH 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
` (2 more replies)
0 siblings, 3 replies; 14+ messages in thread
From: Biju Das @ 2023-04-17 9:01 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Add MTU3a node to R9A07G044 (RZ/G2L) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Driver and binding patches are in next [1]
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/log/?qt=grep&q=biju.das
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 70 ++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 1315be5167b9..6983be94d95b 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -174,6 +174,76 @@ soc: soc {
#size-cells = <2>;
ranges;
+ mtu3: timer@10001200 {
+ compatible = "renesas,r9a07g044-mtu3",
+ "renesas,rz-mtu3";
+ reg = <0 0x10001200 0 0xb00>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 173 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 185 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 186 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 192 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 202 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
+ "tgiv0", "tgie0", "tgif0",
+ "tgia1", "tgib1", "tgiv1", "tgiu1",
+ "tgia2", "tgib2", "tgiv2", "tgiu2",
+ "tgia3", "tgib3", "tgic3", "tgid3",
+ "tgiv3",
+ "tgia4", "tgib4", "tgic4", "tgid4",
+ "tgiv4",
+ "tgiu5", "tgiv5", "tgiw5",
+ "tgia6", "tgib6", "tgic6", "tgid6",
+ "tgiv6",
+ "tgia7", "tgib7", "tgic7", "tgid7",
+ "tgiv7",
+ "tgia8", "tgib8", "tgic8", "tgid8",
+ "tgiv8", "tgiu8";
+ clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
ssi0: ssi@10049c00 {
compatible = "renesas,r9a07g044-ssi",
"renesas,rz-ssi";
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r9a07g054: Add MTU3a node
2023-04-17 9:01 [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Biju Das
@ 2023-04-17 9:01 ` Biju Das
2023-04-20 15:25 ` Geert Uytterhoeven
2023-04-17 9:01 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Biju Das
2023-04-20 15:24 ` [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Geert Uytterhoeven
2 siblings, 1 reply; 14+ messages in thread
From: Biju Das @ 2023-04-17 9:01 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Add MTU3a node to R9A07G054 (RZ/V2L) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Driver and binding patches are in next [1]
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/log/?qt=grep&q=biju.das
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 70 ++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index cc11e5855d62..69d280e9b2e7 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -174,6 +174,76 @@ soc: soc {
#size-cells = <2>;
ranges;
+ mtu3: timer@10001200 {
+ compatible = "renesas,r9a07g054-mtu3",
+ "renesas,rz-mtu3";
+ reg = <0 0x10001200 0 0xb00>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 173 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 185 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 186 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 192 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 202 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
+ "tgiv0", "tgie0", "tgif0",
+ "tgia1", "tgib1", "tgiv1", "tgiu1",
+ "tgia2", "tgib2", "tgiv2", "tgiu2",
+ "tgia3", "tgib3", "tgic3", "tgid3",
+ "tgiv3",
+ "tgia4", "tgib4", "tgic4", "tgid4",
+ "tgiv4",
+ "tgiu5", "tgiv5", "tgiw5",
+ "tgia6", "tgib6", "tgic6", "tgid6",
+ "tgiv6",
+ "tgia7", "tgib7", "tgic7", "tgid7",
+ "tgiv7",
+ "tgia8", "tgib8", "tgic8", "tgid8",
+ "tgiv8", "tgiu8";
+ clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
ssi0: ssi@10049c00 {
compatible = "renesas,r9a07g054-ssi",
"renesas,rz-ssi";
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-17 9:01 [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Biju Das
2023-04-17 9:01 ` [PATCH 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2023-04-17 9:01 ` Biju Das
2023-04-20 15:40 ` Geert Uytterhoeven
2023-06-08 6:57 ` Geert Uytterhoeven
2023-04-20 15:24 ` [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Geert Uytterhoeven
2 siblings, 2 replies; 14+ messages in thread
From: Biju Das @ 2023-04-17 9:01 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Enable mtu3 node using dt overlay and disable scif2 node and delete
{sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
clock input pins and Z phase signal(MTIOC1A).
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 2 +
.../boot/dts/renesas/rzg2l-smarc-pmod.dtso | 43 +++++++++++++++++++
2 files changed, 45 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index f130165577a8..57727bcd1334 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -81,8 +81,10 @@ dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
new file mode 100644
index 000000000000..a502faf6e1ad
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&mtu3 {
+ pinctrl-0 = <&mtu3_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pinctrl {
+ mtu3_pins: mtu3 {
+ mtu3-zphase-clk {
+ pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
+ };
+
+ mtu3-ext-clk-input-pin {
+ pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
+ <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
+ };
+ };
+};
+
+&scif2 {
+ status = "disabled";
+};
+
+&sdhi1_pins {
+ /delete-node/ sd1_mux;
+};
+
+&sdhi1_pins_uhs {
+ /delete-node/ sd1_mux_uhs;
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node
2023-04-17 9:01 [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Biju Das
2023-04-17 9:01 ` [PATCH 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
2023-04-17 9:01 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Biju Das
@ 2023-04-20 15:24 ` Geert Uytterhoeven
2 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-04-20 15:24 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add MTU3a node to R9A07G044 (RZ/G2L) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.5.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r9a07g054: Add MTU3a node
2023-04-17 9:01 ` [PATCH 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2023-04-20 15:25 ` Geert Uytterhoeven
0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-04-20 15:25 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add MTU3a node to R9A07G054 (RZ/V2L) SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.5.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-17 9:01 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Biju Das
@ 2023-04-20 15:40 ` Geert Uytterhoeven
2023-04-20 15:49 ` Biju Das
2023-06-08 6:57 ` Geert Uytterhoeven
1 sibling, 1 reply; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-04-20 15:40 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
Hi Biju,
On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable mtu3 node using dt overlay and disable scif2 node and delete
> {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> clock input pins and Z phase signal(MTIOC1A).
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
Please add a comment here to document what exactly this provides.
> + *
> + * Copyright (C) 2023 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +&mtu3 {
> + pinctrl-0 = <&mtu3_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pinctrl {
> + mtu3_pins: mtu3 {
> + mtu3-zphase-clk {
> + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
> + };
Unless I'm missing something, this signal is not available on the PMOD
connector?
> +
> + mtu3-ext-clk-input-pin {
> + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
> + <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
> + };
So this provides two external clock inputs on the pins on the PMOD
connector that usually provides a UART?
> + };
> +};
> +
> +&scif2 {
> + status = "disabled";
> +};
> +
> +&sdhi1_pins {
> + /delete-node/ sd1_mux;
> +};
> +
> +&sdhi1_pins_uhs {
> + /delete-node/ sd1_mux_uhs;
> +};
As you disable CD functionality, don't you need to add "broken-cd" to
the sdhi1 node?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-20 15:40 ` Geert Uytterhoeven
@ 2023-04-20 15:49 ` Biju Das
2023-04-20 17:15 ` Geert Uytterhoeven
0 siblings, 1 reply; 14+ messages in thread
From: Biju Das @ 2023-04-20 15:49 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
Hi Geert,
Thanks for the feedback.
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Thursday, April 20, 2023 4:40 PM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux-
> renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar Mahadev
> Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
>
> Hi Biju,
>
> On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable mtu3 node using dt overlay and disable scif2 node and delete
> > {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> > clock input pins and Z phase signal(MTIOC1A).
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
>
> Please add a comment here to document what exactly this provides.
OK will add.
>
> > + *
> > + * Copyright (C) 2023 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&mtu3 {
> > + pinctrl-0 = <&mtu3_pins>;
> > + pinctrl-names = "default";
> > +
> > + status = "okay";
> > +};
> > +
> > +&pinctrl {
> > + mtu3_pins: mtu3 {
> > + mtu3-zphase-clk {
> > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A
> */
> > + };
>
> Unless I'm missing something, this signal is not available on the PMOD
> connector?
Yes, it is not available on the PMOD connector. SD card detection signal,
is muxed with MTIOC1A (Z Phase signal). So for counter use case, we use it
as MTIOC1A pins.
>
> > +
> > + mtu3-ext-clk-input-pin {
> > + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA
> */
> > + <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB
> */
> > + };
>
> So this provides two external clock inputs on the pins on the PMOD connector
> that usually provides a UART?
Yes that is correct. UART signals are muxed with external phase clock inputs.
So for counter use case, using this overlay, we use it is as external phase clock inputs.
>
> > + };
> > +};
> > +
> > +&scif2 {
> > + status = "disabled";
> > +};
> > +
> > +&sdhi1_pins {
> > + /delete-node/ sd1_mux;
> > +};
> > +
> > +&sdhi1_pins_uhs {
> > + /delete-node/ sd1_mux_uhs;
> > +};
>
> As you disable CD functionality, don't you need to add "broken-cd" to the
> sdhi1 node?
OK, will add "broken-cd" to sdhi1 node while using this overlay.
Cheers,
Biju
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-20 15:49 ` Biju Das
@ 2023-04-20 17:15 ` Geert Uytterhoeven
2023-04-20 18:16 ` Biju Das
0 siblings, 1 reply; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-04-20 17:15 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Hi Biju,
On Thu, Apr 20, 2023 at 5:49 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > -----Original Message-----
> > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > Sent: Thursday, April 20, 2023 4:40 PM
> > To: Biju Das <biju.das.jz@bp.renesas.com>
> > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux-
> > renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar Mahadev
> > Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> > counter using DT overlay
> >
> > Hi Biju,
> >
> > On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > > Enable mtu3 node using dt overlay and disable scif2 node and delete
> > > {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> > > clock input pins and Z phase signal(MTIOC1A).
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > > @@ -0,0 +1,43 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > > + *
> > > + * Copyright (C) 2023 Renesas Electronics Corp.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +/plugin/;
> > > +
> > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > > +
> > > +&mtu3 {
> > > + pinctrl-0 = <&mtu3_pins>;
> > > + pinctrl-names = "default";
> > > +
> > > + status = "okay";
> > > +};
> > > +
> > > +&pinctrl {
> > > + mtu3_pins: mtu3 {
> > > + mtu3-zphase-clk {
> > > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A
> > */
> > > + };
> >
> > Unless I'm missing something, this signal is not available on the PMOD
> > connector?
>
> Yes, it is not available on the PMOD connector. SD card detection signal,
> is muxed with MTIOC1A (Z Phase signal). So for counter use case, we use it
> as MTIOC1A pins.
As the signal is not available on the PMOD connector, can't you just ignore
the Z Phase signal, and keep the SD card CD signal available instead?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-20 17:15 ` Geert Uytterhoeven
@ 2023-04-20 18:16 ` Biju Das
2023-04-21 7:27 ` Geert Uytterhoeven
0 siblings, 1 reply; 14+ messages in thread
From: Biju Das @ 2023-04-20 18:16 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Thursday, April 20, 2023 6:15 PM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Magnus Damm <magnus.damm@gmail.com>;
> linux-renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar
> Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
>
> Hi Biju,
>
> On Thu, Apr 20, 2023 at 5:49 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > -----Original Message-----
> > > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > > Sent: Thursday, April 20, 2023 4:40 PM
> > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> > > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>;
> > > linux- renesas-soc@vger.kernel.org; devicetree@vger.kernel.org;
> > > Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable
> > > MTU3a counter using DT overlay
> > >
> > > Hi Biju,
> > >
> > > On Mon, Apr 17, 2023 at 11:02 AM Biju Das
> > > <biju.das.jz@bp.renesas.com>
> > > wrote:
> > > > Enable mtu3 node using dt overlay and disable scif2 node and
> > > > delete {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with
> > > > mtu3 external clock input pins and Z phase signal(MTIOC1A).
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> > > > --- /dev/null
> > > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > > > @@ -0,0 +1,43 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > +/*
> > > > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > > > + *
> > > > + * Copyright (C) 2023 Renesas Electronics Corp.
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +/plugin/;
> > > > +
> > > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > > > +
> > > > +&mtu3 {
> > > > + pinctrl-0 = <&mtu3_pins>;
> > > > + pinctrl-names = "default";
> > > > +
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&pinctrl {
> > > > + mtu3_pins: mtu3 {
> > > > + mtu3-zphase-clk {
> > > > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /*
> > > > +MTIOC1A
> > > */
> > > > + };
> > >
> > > Unless I'm missing something, this signal is not available on the
> > > PMOD connector?
> >
> > Yes, it is not available on the PMOD connector. SD card detection
> > signal, is muxed with MTIOC1A (Z Phase signal). So for counter use
> > case, we use it as MTIOC1A pins.
>
> As the signal is not available on the PMOD connector, can't you just ignore
> the Z Phase signal, and keep the SD card CD signal available instead?
Some customers are using Z phase signal in their product to clear the counter.
Maybe we define a macro in overlay, by default Z phase signal is disabled.
Is it ok?
Note:-
I use SD card removal/insert which changes the Z phase signal level for
clearing the counter.
Cheers,
Biju
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-20 18:16 ` Biju Das
@ 2023-04-21 7:27 ` Geert Uytterhoeven
2023-04-21 7:45 ` Biju Das
0 siblings, 1 reply; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-04-21 7:27 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Hi Biju,
On Thu, Apr 20, 2023 at 8:16 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > -----Original Message-----
> > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > Sent: Thursday, April 20, 2023 6:15 PM
> > To: Biju Das <biju.das.jz@bp.renesas.com>
> > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; Magnus Damm <magnus.damm@gmail.com>;
> > linux-renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar
> > Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> > counter using DT overlay
> >
> > Hi Biju,
> >
> > On Thu, Apr 20, 2023 at 5:49 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > > -----Original Message-----
> > > > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > > > Sent: Thursday, April 20, 2023 4:40 PM
> > > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > > > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> > > > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>;
> > > > linux- renesas-soc@vger.kernel.org; devicetree@vger.kernel.org;
> > > > Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable
> > > > MTU3a counter using DT overlay
> > > >
> > > > Hi Biju,
> > > >
> > > > On Mon, Apr 17, 2023 at 11:02 AM Biju Das
> > > > <biju.das.jz@bp.renesas.com>
> > > > wrote:
> > > > > Enable mtu3 node using dt overlay and disable scif2 node and
> > > > > delete {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with
> > > > > mtu3 external clock input pins and Z phase signal(MTIOC1A).
> > > > >
> > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > > > > --- /dev/null
> > > > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > > > > @@ -0,0 +1,43 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > > +/*
> > > > > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > > > > + *
> > > > > + * Copyright (C) 2023 Renesas Electronics Corp.
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +/plugin/;
> > > > > +
> > > > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > > > > +
> > > > > +&mtu3 {
> > > > > + pinctrl-0 = <&mtu3_pins>;
> > > > > + pinctrl-names = "default";
> > > > > +
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&pinctrl {
> > > > > + mtu3_pins: mtu3 {
> > > > > + mtu3-zphase-clk {
> > > > > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /*
> > > > > +MTIOC1A
> > > > */
> > > > > + };
> > > >
> > > > Unless I'm missing something, this signal is not available on the
> > > > PMOD connector?
> > >
> > > Yes, it is not available on the PMOD connector. SD card detection
> > > signal, is muxed with MTIOC1A (Z Phase signal). So for counter use
> > > case, we use it as MTIOC1A pins.
> >
> > As the signal is not available on the PMOD connector, can't you just ignore
> > the Z Phase signal, and keep the SD card CD signal available instead?
>
>
> Some customers are using Z phase signal in their product to clear the counter.
> Maybe we define a macro in overlay, by default Z phase signal is disabled.
>
> Is it ok?
>
> Note:-
> I use SD card removal/insert which changes the Z phase signal level for
> clearing the counter.
After giving this some more thought, I don't think this overlay belongs
upstream: it does not just enable hardware support, but provides a
way to test hardware, by redefining the meaning of signals on the
PMOD interface.
Do you agree?
I can add (a future version of) the overlay file (without the build
glue) to my topic/renesas-overlays branch[1], though.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/renesas-overlays
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-21 7:27 ` Geert Uytterhoeven
@ 2023-04-21 7:45 ` Biju Das
0 siblings, 0 replies; 14+ messages in thread
From: Biju Das @ 2023-04-21 7:45 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Hi Geert,
> > > > > Enable MTU3a counter using DT overlay
> > > > >
> > > > > Hi Biju,
> > > > >
> > > > > On Mon, Apr 17, 2023 at 11:02 AM Biju Das
> > > > > <biju.das.jz@bp.renesas.com>
> > > > > wrote:
> > > > > > Enable mtu3 node using dt overlay and disable scif2 node and
> > > > > > delete {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with
> > > > > > mtu3 external clock input pins and Z phase signal(MTIOC1A).
> > > > > >
> > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > >
> > > > > > --- /dev/null
> > > > > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > > > > > @@ -0,0 +1,43 @@
> > > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > > > +/*
> > > > > > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD
> > > > > > +parts
> > > > > > + *
> > > > > > + * Copyright (C) 2023 Renesas Electronics Corp.
> > > > > > + */
> > > > > > +
> > > > > > +/dts-v1/;
> > > > > > +/plugin/;
> > > > > > +
> > > > > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > > > > > +
> > > > > > +&mtu3 {
> > > > > > + pinctrl-0 = <&mtu3_pins>;
> > > > > > + pinctrl-names = "default";
> > > > > > +
> > > > > > + status = "okay";
> > > > > > +};
> > > > > > +
> > > > > > +&pinctrl {
> > > > > > + mtu3_pins: mtu3 {
> > > > > > + mtu3-zphase-clk {
> > > > > > + pinmux = <RZG2L_PORT_PINMUX(19, 0,
> > > > > > +3)>; /* MTIOC1A
> > > > > */
> > > > > > + };
> > > > >
> > > > > Unless I'm missing something, this signal is not available on
> > > > > the PMOD connector?
> > > >
> > > > Yes, it is not available on the PMOD connector. SD card detection
> > > > signal, is muxed with MTIOC1A (Z Phase signal). So for counter use
> > > > case, we use it as MTIOC1A pins.
> > >
> > > As the signal is not available on the PMOD connector, can't you just
> > > ignore the Z Phase signal, and keep the SD card CD signal available
> instead?
> >
> >
> > Some customers are using Z phase signal in their product to clear the
> counter.
> > Maybe we define a macro in overlay, by default Z phase signal is disabled.
> >
> > Is it ok?
> >
> > Note:-
> > I use SD card removal/insert which changes the Z phase signal level
> > for clearing the counter.
>
> After giving this some more thought, I don't think this overlay belongs
> upstream: it does not just enable hardware support, but provides a way to
> test hardware, by redefining the meaning of signals on the PMOD interface.
>
> Do you agree?
Like any other PMOD interface, we can test real counter device with PMOD interface[1]
https://www.mouser.co.uk/ProductDetail/Alps-Alpine/EC11E15244B2?qs=m0BA540hBPfDpUEkDmFV5A%3D%3D
I have used this device for testing as well, later I switched to gpios for generating phase signals.
>
> I can add (a future version of) the overlay file (without the build
> glue) to my topic/renesas-overlays branch[1], though.
>
Without any hassles, if anyone wants to test counter interface using RZ/{G2L,G2LC,G2UL,Five, V2L}
SMARC EVK then I am ok for adding it to topic/renesas-overlays branch.
I believe the current overlay patch will provide that flexibility.
Cheers,
Biju
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-04-17 9:01 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Biju Das
2023-04-20 15:40 ` Geert Uytterhoeven
@ 2023-06-08 6:57 ` Geert Uytterhoeven
2023-06-08 7:08 ` Biju Das
2023-06-08 7:46 ` Biju Das
1 sibling, 2 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2023-06-08 6:57 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
Hi Biju,
On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable mtu3 node using dt overlay and disable scif2 node and delete
> {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> clock input pins and Z phase signal(MTIOC1A).
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> arch/arm64/boot/dts/renesas/Makefile | 2 +
> .../boot/dts/renesas/rzg2l-smarc-pmod.dtso | 43 +++++++++++++++++++
> 2 files changed, 45 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
>
> diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
> index f130165577a8..57727bcd1334 100644
> --- a/arch/arm64/boot/dts/renesas/Makefile
> +++ b/arch/arm64/boot/dts/renesas/Makefile
> @@ -81,8 +81,10 @@ dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo
> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
> +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo
>
> dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
> +dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo
>
> dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
>
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> new file mode 100644
> index 000000000000..a502faf6e1ad
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> + *
> + * Copyright (C) 2023 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +&mtu3 {
> + pinctrl-0 = <&mtu3_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pinctrl {
> + mtu3_pins: mtu3 {
> + mtu3-zphase-clk {
> + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
> + };
> +
> + mtu3-ext-clk-input-pin {
> + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
> + <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
> + };
> + };
> +};
> +
> +&scif2 {
> + status = "disabled";
> +};
> +
> +&sdhi1_pins {
> + /delete-node/ sd1_mux;
> +};
> +
> +&sdhi1_pins_uhs {
> + /delete-node/ sd1_mux_uhs;
> +};
I'm afraid deleting nodes in the base DT from an overlay does not work...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-06-08 6:57 ` Geert Uytterhoeven
@ 2023-06-08 7:08 ` Biju Das
2023-06-08 7:46 ` Biju Das
1 sibling, 0 replies; 14+ messages in thread
From: Biju Das @ 2023-06-08 7:08 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
>
> Hi Biju,
>
> On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable mtu3 node using dt overlay and disable scif2 node and delete
> > {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> > clock input pins and Z phase signal(MTIOC1A).
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/Makefile | 2 +
> > .../boot/dts/renesas/rzg2l-smarc-pmod.dtso | 43 +++++++++++++++++++
> > 2 files changed, 45 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> >
> > diff --git a/arch/arm64/boot/dts/renesas/Makefile
> > b/arch/arm64/boot/dts/renesas/Makefile
> > index f130165577a8..57727bcd1334 100644
> > --- a/arch/arm64/boot/dts/renesas/Makefile
> > +++ b/arch/arm64/boot/dts/renesas/Makefile
> > @@ -81,8 +81,10 @@ dtb-$(CONFIG_ARCH_R9A07G043) +=
> > r9a07g043-smarc-pmod.dtbo
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
> > +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo
> >
> > dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
> > +dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo
> >
> > dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
> >
> > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > new file mode 100644
> > index 000000000000..a502faf6e1ad
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > + *
> > + * Copyright (C) 2023 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&mtu3 {
> > + pinctrl-0 = <&mtu3_pins>;
> > + pinctrl-names = "default";
> > +
> > + status = "okay";
> > +};
> > +
> > +&pinctrl {
> > + mtu3_pins: mtu3 {
> > + mtu3-zphase-clk {
> > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /*
> MTIOC1A */
> > + };
> > +
> > + mtu3-ext-clk-input-pin {
> > + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /*
> MTCLKA */
> > + <RZG2L_PORT_PINMUX(48, 1, 4)>; /*
> MTCLKB */
> > + };
> > + };
> > +};
> > +
> > +&scif2 {
> > + status = "disabled";
> > +};
> > +
> > +&sdhi1_pins {
> > + /delete-node/ sd1_mux;
> > +};
> > +
> > +&sdhi1_pins_uhs {
> > + /delete-node/ sd1_mux_uhs;
> > +};
>
> I'm afraid deleting nodes in the base DT from an overlay does not work...
It doesn't give any pin conflicts. I will recheck and confirm.
When I tested, it clears the counter, when I remove/insert SD card as the
counter clearing source is P19_0 function3.
What about disabling SDHI1?? As pins shared between MTU3a and SDHI1,
When we use this overlay, we enable only MTU3a and disable SDHI1.
For a normal customer use case, SDHI1 will be always enabled.
But they may use different pins if they use both SDHI1 and MTU3a Z-Phase signal.
Cheers,
Biju
^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay
2023-06-08 6:57 ` Geert Uytterhoeven
2023-06-08 7:08 ` Biju Das
@ 2023-06-08 7:46 ` Biju Das
1 sibling, 0 replies; 14+ messages in thread
From: Biju Das @ 2023-06-08 7:46 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
Hi Geert,
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
>
> Hi Biju,
>
> On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable mtu3 node using dt overlay and disable scif2 node and delete
> > {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> > clock input pins and Z phase signal(MTIOC1A).
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/Makefile | 2 +
> > .../boot/dts/renesas/rzg2l-smarc-pmod.dtso | 43 +++++++++++++++++++
> > 2 files changed, 45 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> >
> > diff --git a/arch/arm64/boot/dts/renesas/Makefile
> > b/arch/arm64/boot/dts/renesas/Makefile
> > index f130165577a8..57727bcd1334 100644
> > --- a/arch/arm64/boot/dts/renesas/Makefile
> > +++ b/arch/arm64/boot/dts/renesas/Makefile
> > @@ -81,8 +81,10 @@ dtb-$(CONFIG_ARCH_R9A07G043) +=
> > r9a07g043-smarc-pmod.dtbo
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
> > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
> > +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo
> >
> > dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
> > +dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo
> >
> > dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
> >
> > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > new file mode 100644
> > index 000000000000..a502faf6e1ad
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > + *
> > + * Copyright (C) 2023 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&mtu3 {
> > + pinctrl-0 = <&mtu3_pins>;
> > + pinctrl-names = "default";
> > +
> > + status = "okay";
> > +};
> > +
> > +&pinctrl {
> > + mtu3_pins: mtu3 {
> > + mtu3-zphase-clk {
> > + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /*
> MTIOC1A */
> > + };
> > +
> > + mtu3-ext-clk-input-pin {
> > + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /*
> MTCLKA */
> > + <RZG2L_PORT_PINMUX(48, 1, 4)>; /*
> MTCLKB */
> > + };
> > + };
> > +};
> > +
> > +&scif2 {
> > + status = "disabled";
> > +};
> > +
> > +&sdhi1_pins {
> > + /delete-node/ sd1_mux;
> > +};
> > +
> > +&sdhi1_pins_uhs {
> > + /delete-node/ sd1_mux_uhs;
> > +};
>
> I'm afraid deleting nodes in the base DT from an overlay does not work...
Is it ok, if I use MACRO instead of overlay and MACRO is disabled for MTU3a by default?
5.10 cip kernel doesn't support overlay. Hence the question.
Cheers,
Biju
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-06-08 7:46 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-17 9:01 [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Biju Das
2023-04-17 9:01 ` [PATCH 2/3] arm64: dts: renesas: r9a07g054: " Biju Das
2023-04-20 15:25 ` Geert Uytterhoeven
2023-04-17 9:01 ` [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Biju Das
2023-04-20 15:40 ` Geert Uytterhoeven
2023-04-20 15:49 ` Biju Das
2023-04-20 17:15 ` Geert Uytterhoeven
2023-04-20 18:16 ` Biju Das
2023-04-21 7:27 ` Geert Uytterhoeven
2023-04-21 7:45 ` Biju Das
2023-06-08 6:57 ` Geert Uytterhoeven
2023-06-08 7:08 ` Biju Das
2023-06-08 7:46 ` Biju Das
2023-04-20 15:24 ` [PATCH 1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node Geert Uytterhoeven
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