[PATCH/RFC 0/2] ARM: dts: r8a7779/marzen: Add PCIe support

[PATCH/RFC 0/2] ARM: dts: r8a7779/marzen: Add PCIe support

[Geert Uytterhoeven]

	Hi all,

This patch series aims to enable PCI Express support for the Renesas
R-Car H1 SoC and the Marzen development board.

Unfortunately, it doesn't work completely: while an Intel E1000E network
card is detected properly:

    rcar-pcie fe000000.pcie: adding to PM domain always-on
    rcar-pcie fe000000.pcie: host bridge /pcie@fe000000 ranges:
    rcar-pcie fe000000.pcie:       IO 0x00fe100000..0x00fe1fffff -> 0x0000000000
    rcar-pcie fe000000.pcie:      MEM 0x00fe200000..0x00fe3fffff -> 0x00fe200000
    rcar-pcie fe000000.pcie:      MEM 0x0020000000..0x003fffffff -> 0x0020000000
    rcar-pcie fe000000.pcie:      MEM 0x00c0000000..0x00dfffffff -> 0x00c0000000
    rcar-pcie fe000000.pcie:   IB MEM 0x0040000000..0x00bfffffff -> 0x0040000000
    rcar-pcie fe000000.pcie: PCIe x1: link up
    rcar-pcie fe000000.pcie: PCI host bridge to bus 0000:00
    pci_bus 0000:00: root bus resource [bus 00-ff]
    pci_bus 0000:00: root bus resource [io  0x0000-0xfffff]
    pci_bus 0000:00: root bus resource [mem 0xfe200000-0xfe3fffff]
    pci_bus 0000:00: root bus resource [mem 0x20000000-0x3fffffff]
    pci_bus 0000:00: root bus resource [mem 0xc0000000-0xdfffffff pref]
    pci 0000:00:00.0: [1912:0018] type 01 class 0x060400
    pci 0000:00:00.0: enabling Extended Tags
    pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
    PCI: bus0: Fast back to back transfers disabled
    pci 0000:01:00.0: [8086:10d3] type 00 class 0x020000
    pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
    pci 0000:01:00.0: reg 0x14: [mem 0x00000000-0x0007ffff]
    pci 0000:01:00.0: reg 0x18: [io  0x0000-0x001f]
    pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
    pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
    pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
    PCI: bus1: Fast back to back transfers disabled
    pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
    pci 0000:00:00.0: BAR 8: assigned [mem 0xfe200000-0xfe2fffff]
    pci 0000:00:00.0: BAR 9: assigned [mem 0xc0000000-0xc00fffff pref]
    pci 0000:00:00.0: BAR 7: assigned [io  0x1000-0x1fff]
    pci 0000:01:00.0: BAR 1: assigned [mem 0xfe200000-0xfe27ffff]
    pci 0000:01:00.0: BAR 6: assigned [mem 0xc0000000-0xc003ffff pref]
    pci 0000:01:00.0: BAR 0: assigned [mem 0xfe280000-0xfe29ffff]
    pci 0000:01:00.0: BAR 3: assigned [mem 0xfe2a0000-0xfe2a3fff]
    pci 0000:01:00.0: BAR 2: assigned [io  0x1000-0x101f]
    pci 0000:00:00.0: PCI bridge to [bus 01]
    pci 0000:00:00.0:   bridge window [io  0x1000-0x1fff]
    pci 0000:00:00.0:   bridge window [mem 0xfe200000-0xfe2fffff]
    pci 0000:00:00.0:   bridge window [mem 0xc0000000-0xc00fffff pref]

    e1000e: Intel(R) PRO/1000 Network Driver
    e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
    pci 0000:00:00.0: enabling device (0140 -> 0143)
    e1000e 0000:01:00.0: enabling device (0140 -> 0142)
    e1000e 0000:01:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
    e1000e 0000:01:00.0 0000:01:00.0 (uninitialized): Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.
    e1000e 0000:01:00.0 eth0: (PCI Express:2.5GT/s:Width x1) 68:05:ca:c1:27:84
    e1000e 0000:01:00.0 eth0: Intel(R) PRO/1000 Network Connection
    e1000e 0000:01:00.0 eth0: MAC: 3, PHY: 8, PBA No: E46981-008

    e1000e 0000:01:00.0 eth0: NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None

it does not work, saying:

    e1000e 0000:01:00.0 eth0: Detected Hardware Unit Hang:

I compared what happens with/without the E1000E card, and what happens on
Koelsch (R-Car M2-W), where the card does work: when the Ethernet
interface is opened, rcar_pcie_config_access() fails with a master
abort:
  - PCIEERRFR.SENDURCPL = 1 (a completion with the unsupported request
    status has been transmitted),
  - PCICONF1.RMA = 1 (Received Master Abort).

After that, any further accesses to the E1000E's config space fail, and
"lspci -x" returns all 0xffs for the affected device.

Note that the R-Car PCIe host controller driver was originally written
for R-Car H1, H2, and M2-W, but it was never fully enabled on R-Car H1.
The only documented differences between the PCIe controllers on R-Car H1
and Gen2 seem to be the various apertures, and the PHY initialization
sequence.

Thanks for your comments and suggestions!

Geert Uytterhoeven (2):
  [RFC] ARM: dts: r8a7779: Add PCIe nodes
  [RFC] ARM: dts: marzen: Add PCIe support

 arch/arm/boot/dts/r8a7779-marzen.dts |  8 +++++++
 arch/arm/boot/dts/r8a7779.dtsi       | 32 ++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+)

-- 
2.34.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC 1/2] ARM: dts: r8a7779: Add PCIe nodes

[Geert Uytterhoeven]

Add device nodes for the PCI Express controller and the related
external PCIe bus clock on the Renesas R-Car H1 (R8A7779) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Comparing this to R-Car Gen2 SoCs (r8a779[01].dtsi), the latter have an
extra dma-ranges entry:

    <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>

However, R-Car Gen2 supports LPAE, while R-Car H1 does not.

Does this need an entry with 0x43000000? After +25 years of exposue, I
still can't say I understand the PCI DT bindings...
---
 arch/arm/boot/dts/r8a7779.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 97b767d81d926049..bba0c6d2386cd042 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -563,6 +563,13 @@ extal_clk: extal {
 			clock-frequency = <0>;
 		};
 
+		/* External PCIe clock - can be overridden by the board */
+		pcie_bus_clk: pcie-bus {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+		};
+
 		/* External SCIF clock */
 		scif_clk: scif {
 			compatible = "fixed-clock";
@@ -699,6 +706,31 @@ R8A7779_CLK_MMC1 R8A7779_CLK_MMC0
 		};
 	};
 
+	pciec: pcie@fe000000 {
+		compatible = "renesas,pcie-r8a7779";
+		reg = <0xfe000000 0x80000>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x00 0xff>;
+		device_type = "pci";
+		ranges = <0x01000000 0 0x00000000 0xfe100000 0 0x00100000>,
+			 <0x02000000 0 0xfe200000 0xfe200000 0 0x00200000>,
+			 <0x02000000 0 0x20000000 0x20000000 0 0x20000000>,
+			 <0x42000000 0 0xc0000000 0xc0000000 0 0x20000000>;
+		/* Map all possible DDR as inbound ranges */
+		dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x80000000>;
+		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 0>;
+		interrupt-map = <0 0 0 0 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7779_CLK_PCIE>, <&pcie_bus_clk>;
+		clock-names = "pcie", "pcie_bus";
+		power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+		status = "disabled";
+	};
+
 	prr: chipid@ff000044 {
 		compatible = "renesas,prr";
 		reg = <0xff000044 4>;
-- 
2.34.1

[PATCH/RFC 2/2] ARM: dts: marzen: Add PCIe support

[Geert Uytterhoeven]

Describe the PCIe bus clock, and enable the PCIe controller on the
Marzen development board.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7779-marzen.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 632519edba6b5a47..a001e4285fd76366 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -260,6 +260,14 @@ &tmu0 {
 	status = "okay";
 };
 
+&pcie_bus_clk {
+	clock-frequency = <100000000>;
+};
+
+&pciec {
+	status = "okay";
+};
+
 &pfc {
 	pinctrl-0 = <&scif_clk_pins>;
 	pinctrl-names = "default";
-- 
2.34.1