* [PATCH v2] spi: dt-bindings: Convert spi-sifive binding to json-schema
@ 2019-09-18 11:08 Pragnesh Patel
2019-09-18 13:44 ` Rob Herring
2019-10-01 11:41 ` Applied "spi: dt-bindings: Convert spi-sifive binding to json-schema" to the spi tree Mark Brown
0 siblings, 2 replies; 3+ messages in thread
From: Pragnesh Patel @ 2019-09-18 11:08 UTC (permalink / raw)
To: palmer, paul.walmsley
Cc: Mark Rutland, devicetree, Mark Brown, linux-kernel, linux-spi,
Rob Herring, linux-riscv, Pragnesh Patel
Convert the spi-sifive binding to DT schema format.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
---
Changes in v2:
- Remove address-cells and size-cells property
- Added valid values for sifive,fifo-depth and sifive,max-bits-per-word
property
.../devicetree/bindings/spi/spi-sifive.txt | 37 ----------
.../devicetree/bindings/spi/spi-sifive.yaml | 86 ++++++++++++++++++++++
2 files changed, 86 insertions(+), 37 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.txt
create mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.yaml
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.txt b/Documentation/devicetree/bindings/spi/spi-sifive.txt
deleted file mode 100644
index 3f5c6e4..0000000
--- a/Documentation/devicetree/bindings/spi/spi-sifive.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-SiFive SPI controller Device Tree Bindings
-------------------------------------------
-
-Required properties:
-- compatible : Should be "sifive,<chip>-spi" and "sifive,spi<version>".
- Supported compatible strings are:
- "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
- onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
- SPI v0 IP block with no chip integration tweaks.
- Please refer to sifive-blocks-ip-versioning.txt for details
-- reg : Physical base address and size of SPI registers map
- A second (optional) range can indicate memory mapped flash
-- interrupts : Must contain one entry
-- interrupt-parent : Must be core interrupt controller
-- clocks : Must reference the frequency given to the controller
-- #address-cells : Must be '1', indicating which CS to use
-- #size-cells : Must be '0'
-
-Optional properties:
-- sifive,fifo-depth : Depth of hardware queues; defaults to 8
-- sifive,max-bits-per-word : Maximum bits per word; defaults to 8
-
-SPI RTL that corresponds to the IP block version numbers can be found here:
-https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
-
-Example:
- spi: spi@10040000 {
- compatible = "sifive,fu540-c000-spi", "sifive,spi0";
- reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
- interrupt-parent = <&plic>;
- interrupts = <51>;
- clocks = <&tlclk>;
- #address-cells = <1>;
- #size-cells = <0>;
- sifive,fifo-depth = <8>;
- sifive,max-bits-per-word = <8>;
- };
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
new file mode 100644
index 0000000..140e435
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spi-sifive.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SiFive SPI controller
+
+maintainers:
+ - Pragnesh Patel <pragnesh.patel@sifive.com>
+ - Paul Walmsley <paul.walmsley@sifive.com>
+ - Palmer Dabbelt <palmer@sifive.com>
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: sifive,fu540-c000-spi
+ - const: sifive,spi0
+
+ description:
+ Should be "sifive,<chip>-spi" and "sifive,spi<version>".
+ Supported compatible strings are -
+ "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
+ onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
+ SPI v0 IP block with no chip integration tweaks.
+ Please refer to sifive-blocks-ip-versioning.txt for details
+
+ SPI RTL that corresponds to the IP block version numbers can be found here -
+ https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
+
+ reg:
+ maxItems: 1
+
+ description:
+ Physical base address and size of SPI registers map
+ A second (optional) range can indicate memory mapped flash
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ description:
+ Must reference the frequency given to the controller
+
+ sifive,fifo-depth:
+ description:
+ Depth of hardware queues; defaults to 8
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - enum: [ 8 ]
+ - default: 8
+
+ sifive,max-bits-per-word:
+ description:
+ Maximum bits per word; defaults to 8
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - enum: [ 0, 1, 2, 3, 4, 5, 6, 7, 8 ]
+ - default: 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+examples:
+ - |
+ spi: spi@10040000 {
+ compatible = "sifive,fu540-c000-spi", "sifive,spi0";
+ reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
+ interrupt-parent = <&plic>;
+ interrupts = <51>;
+ clocks = <&tlclk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ sifive,fifo-depth = <8>;
+ sifive,max-bits-per-word = <8>;
+ };
+
+...
--
2.7.4
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^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] spi: dt-bindings: Convert spi-sifive binding to json-schema
2019-09-18 11:08 [PATCH v2] spi: dt-bindings: Convert spi-sifive binding to json-schema Pragnesh Patel
@ 2019-09-18 13:44 ` Rob Herring
2019-10-01 11:41 ` Applied "spi: dt-bindings: Convert spi-sifive binding to json-schema" to the spi tree Mark Brown
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring @ 2019-09-18 13:44 UTC (permalink / raw)
To: Pragnesh Patel
Cc: Mark Rutland, devicetree, Palmer Dabbelt, linux-kernel,
linux-spi, Mark Brown, Paul Walmsley, linux-riscv
On Wed, Sep 18, 2019 at 6:10 AM Pragnesh Patel
<pragnesh.patel@sifive.com> wrote:
>
> Convert the spi-sifive binding to DT schema format.
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> ---
>
> Changes in v2:
> - Remove address-cells and size-cells property
> - Added valid values for sifive,fifo-depth and sifive,max-bits-per-word
> property
>
> .../devicetree/bindings/spi/spi-sifive.txt | 37 ----------
> .../devicetree/bindings/spi/spi-sifive.yaml | 86 ++++++++++++++++++++++
> 2 files changed, 86 insertions(+), 37 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.txt
> create mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Applied "spi: dt-bindings: Convert spi-sifive binding to json-schema" to the spi tree
2019-09-18 11:08 [PATCH v2] spi: dt-bindings: Convert spi-sifive binding to json-schema Pragnesh Patel
2019-09-18 13:44 ` Rob Herring
@ 2019-10-01 11:41 ` Mark Brown
1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2019-10-01 11:41 UTC (permalink / raw)
To: Pragnesh Patel
Cc: Mark Rutland, devicetree, palmer, linux-kernel, Rob Herring,
linux-spi, Mark Brown, paul.walmsley, linux-riscv
The patch
spi: dt-bindings: Convert spi-sifive binding to json-schema
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From 9c12e34a3be127454b26054043c3b302bca08fdc Mon Sep 17 00:00:00 2001
From: Pragnesh Patel <pragnesh.patel@sifive.com>
Date: Wed, 18 Sep 2019 16:38:39 +0530
Subject: [PATCH] spi: dt-bindings: Convert spi-sifive binding to json-schema
Convert the spi-sifive binding to DT schema format.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1568804927-13565-1-git-send-email-pragnesh.patel@sifive.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
.../devicetree/bindings/spi/spi-sifive.txt | 37 --------
.../devicetree/bindings/spi/spi-sifive.yaml | 86 +++++++++++++++++++
2 files changed, 86 insertions(+), 37 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.txt
create mode 100644 Documentation/devicetree/bindings/spi/spi-sifive.yaml
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.txt b/Documentation/devicetree/bindings/spi/spi-sifive.txt
deleted file mode 100644
index 3f5c6e438972..000000000000
--- a/Documentation/devicetree/bindings/spi/spi-sifive.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-SiFive SPI controller Device Tree Bindings
-------------------------------------------
-
-Required properties:
-- compatible : Should be "sifive,<chip>-spi" and "sifive,spi<version>".
- Supported compatible strings are:
- "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
- onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
- SPI v0 IP block with no chip integration tweaks.
- Please refer to sifive-blocks-ip-versioning.txt for details
-- reg : Physical base address and size of SPI registers map
- A second (optional) range can indicate memory mapped flash
-- interrupts : Must contain one entry
-- interrupt-parent : Must be core interrupt controller
-- clocks : Must reference the frequency given to the controller
-- #address-cells : Must be '1', indicating which CS to use
-- #size-cells : Must be '0'
-
-Optional properties:
-- sifive,fifo-depth : Depth of hardware queues; defaults to 8
-- sifive,max-bits-per-word : Maximum bits per word; defaults to 8
-
-SPI RTL that corresponds to the IP block version numbers can be found here:
-https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
-
-Example:
- spi: spi@10040000 {
- compatible = "sifive,fu540-c000-spi", "sifive,spi0";
- reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
- interrupt-parent = <&plic>;
- interrupts = <51>;
- clocks = <&tlclk>;
- #address-cells = <1>;
- #size-cells = <0>;
- sifive,fifo-depth = <8>;
- sifive,max-bits-per-word = <8>;
- };
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
new file mode 100644
index 000000000000..140e4351a19f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spi-sifive.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SiFive SPI controller
+
+maintainers:
+ - Pragnesh Patel <pragnesh.patel@sifive.com>
+ - Paul Walmsley <paul.walmsley@sifive.com>
+ - Palmer Dabbelt <palmer@sifive.com>
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: sifive,fu540-c000-spi
+ - const: sifive,spi0
+
+ description:
+ Should be "sifive,<chip>-spi" and "sifive,spi<version>".
+ Supported compatible strings are -
+ "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
+ onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
+ SPI v0 IP block with no chip integration tweaks.
+ Please refer to sifive-blocks-ip-versioning.txt for details
+
+ SPI RTL that corresponds to the IP block version numbers can be found here -
+ https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
+
+ reg:
+ maxItems: 1
+
+ description:
+ Physical base address and size of SPI registers map
+ A second (optional) range can indicate memory mapped flash
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ description:
+ Must reference the frequency given to the controller
+
+ sifive,fifo-depth:
+ description:
+ Depth of hardware queues; defaults to 8
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - enum: [ 8 ]
+ - default: 8
+
+ sifive,max-bits-per-word:
+ description:
+ Maximum bits per word; defaults to 8
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - enum: [ 0, 1, 2, 3, 4, 5, 6, 7, 8 ]
+ - default: 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+examples:
+ - |
+ spi: spi@10040000 {
+ compatible = "sifive,fu540-c000-spi", "sifive,spi0";
+ reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
+ interrupt-parent = <&plic>;
+ interrupts = <51>;
+ clocks = <&tlclk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ sifive,fifo-depth = <8>;
+ sifive,max-bits-per-word = <8>;
+ };
+
+...
--
2.20.1
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2019-09-18 13:44 ` Rob Herring
2019-10-01 11:41 ` Applied "spi: dt-bindings: Convert spi-sifive binding to json-schema" to the spi tree Mark Brown
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