From: David Abdurachmanov <david.abdurachmanov@gmail.com>
To: palmer@sifive.com, aou@eecs.berkeley.edu,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: David Abdurachmanov <david.abdurachmanov@gmail.com>
Subject: [PATCH] riscv: add S and U modes to ISA string
Date: Sat, 10 Nov 2018 07:45:43 +0100 [thread overview]
Message-ID: <20181110064543.12411-1-david.abdurachmanov@gmail.com> (raw)
Message-ID: <20181110064543.jrCifSpCS558UsW4O42JcGjH1AZ8TTcxs5DvcbbMJJ8@z> (raw)
Booting kernel (4.20-rc1) with riscv-pk @
6ebd0f2a46255d0c76dad3c05b16c1d154795d26 (master/HEAD) on Fedora 29 one gets:
[..]
[ 55.075000] unsupported ISA "rv64imafdcsu" in device tree
[ 55.075000] unsupported ISA "rv64imafdcsu" in device tree
[ 55.076000] unsupported ISA "rv64imafdcsu" in device tree
[ 55.076000] unsupported ISA "rv64imafdcsu" in device tree
[ 55.077000] systemd[1]: Detected architecture riscv64.
[..]
The patch adds the missing S and U modes.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
---
arch/riscv/kernel/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 3a5a2ee31547..4029c7e6872b 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -64,7 +64,7 @@ int riscv_of_processor_hartid(struct device_node *node)
static void print_isa(struct seq_file *f, const char *orig_isa)
{
- static const char *ext = "mafdc";
+ static const char *ext = "mafdcsu";
const char *isa = orig_isa;
const char *e;
--
2.19.1
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next reply other threads:[~2018-11-10 6:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-10 6:45 David Abdurachmanov [this message]
2018-11-10 6:45 ` [PATCH] riscv: add S and U modes to ISA string David Abdurachmanov
2018-11-10 8:35 ` Patrick Staehlin
2018-11-10 8:35 ` Patrick Staehlin
2018-11-11 22:14 ` Palmer Dabbelt
2018-11-11 22:14 ` Palmer Dabbelt
2018-11-12 6:29 ` David Abdurachmanov
2018-11-12 6:29 ` David Abdurachmanov
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