From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Anup Patel <anup@brainfault.org>
Cc: Rob Herring <robh@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@sifive.com>,
linux-kernel@vger.kernel.org,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <atish.patra@wdc.com>,
linux-serial@vger.kernel.org, Jiri Slaby <jslaby@suse.com>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] tty/serial: Add RISC-V SBI earlycon support
Date: Wed, 5 Dec 2018 10:58:46 +0100 [thread overview]
Message-ID: <20181205095846.GA9847@kroah.com> (raw)
In-Reply-To: <20181204135507.3706-2-anup@brainfault.org>
On Tue, Dec 04, 2018 at 07:25:05PM +0530, Anup Patel wrote:
> In RISC-V, the M-mode runtime firmware provide SBI calls for
> debug prints. This patch adds earlycon support using RISC-V
> SBI console calls. To enable it, just pass "earlycon=sbi" in
> kernel parameters.
>
> Signed-off-by: Anup Patel <anup@brainfault.org>
This makes more sense to take through the riscv tree, so feel free to
add:
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
to it and take it that way.
thanks,
greg k-h
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2018-12-05 9:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 13:55 [PATCH 0/3] RISC-V SBI earlycon Anup Patel
2018-12-04 13:55 ` [PATCH 1/3] tty/serial: Add RISC-V SBI earlycon support Anup Patel
2018-12-05 9:58 ` Greg Kroah-Hartman [this message]
2018-12-07 18:45 ` Palmer Dabbelt
2018-12-07 18:30 ` Palmer Dabbelt
2019-01-10 14:07 ` [PATCH] tty/serial: emit CR before NL in RISC-V SBL console Andreas Schwab
2019-01-10 15:16 ` Anup Patel
2019-01-10 15:26 ` Andreas Schwab
2019-01-10 16:17 ` Anup Patel
2019-01-10 17:11 ` [PATCH] tty/serial: use uart_console_write in the RISC-V SBL early console Andreas Schwab
2019-01-11 11:13 ` Anup Patel
2019-01-23 23:58 ` Palmer Dabbelt
2019-01-15 13:59 ` Christoph Hellwig
2019-01-10 20:54 ` [PATCH] tty/serial: emit CR before NL in RISC-V SBL console Palmer Dabbelt
2018-12-04 13:55 ` [PATCH 2/3] RISC-V: defconfig: Enable RISC-V SBI earlycon support Anup Patel
2018-12-07 18:30 ` Palmer Dabbelt
2018-12-04 13:55 ` [PATCH 3/3] RISC-V: Remove EARLY_PRINTK support Anup Patel
2018-12-07 18:30 ` Palmer Dabbelt
2018-12-07 18:30 ` [PATCH 0/3] RISC-V SBI earlycon Palmer Dabbelt
2019-03-25 16:23 ` Andreas Schwab
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181205095846.GA9847@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atish.patra@wdc.com \
--cc=hch@infradead.org \
--cc=jslaby@suse.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-serial@vger.kernel.org \
--cc=palmer@sifive.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).