* [PATCH 01/11] riscv: use asm-generic/extable.h
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 02/11] riscv: turn mm_segment_t into a struct Christoph Hellwig
` (10 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/include/asm/Kbuild | 1 +
arch/riscv/include/asm/uaccess.h | 7 +------
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild
index cccd12cf27d4..5a7a19d9aa7f 100644
--- a/arch/riscv/include/asm/Kbuild
+++ b/arch/riscv/include/asm/Kbuild
@@ -4,6 +4,7 @@ generic-y += compat.h
generic-y += cputime.h
generic-y += device.h
generic-y += div64.h
+generic-y += extable.h
generic-y += dma.h
generic-y += dma-contiguous.h
generic-y += dma-mapping.h
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index fb53a8089e76..cc5b253d4c57 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -23,6 +23,7 @@
#include <linux/compiler.h>
#include <linux/thread_info.h>
#include <asm/byteorder.h>
+#include <asm/extable.h>
#include <asm/asm.h>
#define __enable_user_access() \
@@ -98,12 +99,6 @@ static inline int __access_ok(unsigned long addr, unsigned long size)
* on our cache or tlb entries.
*/
-struct exception_table_entry {
- unsigned long insn, fixup;
-};
-
-extern int fixup_exception(struct pt_regs *state);
-
#if defined(__LITTLE_ENDIAN)
#define __MSW 1
#define __LSW 0
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 02/11] riscv: turn mm_segment_t into a struct
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
2019-04-15 9:14 ` [PATCH 01/11] riscv: use asm-generic/extable.h Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 03/11] riscv: remove unreachable big endian code Christoph Hellwig
` (9 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
This matches what other heavily used architectures do, and will allow us
to easily use <asm-generic/uaccess.h> for the nommu case.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/include/asm/thread_info.h | 4 +++-
arch/riscv/include/asm/uaccess.h | 12 +++++++-----
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index 1c9cc8389928..9c039870019b 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -28,7 +28,9 @@
#include <asm/processor.h>
#include <asm/csr.h>
-typedef unsigned long mm_segment_t;
+typedef struct {
+ unsigned long seg;
+} mm_segment_t;
/*
* low level task data that entry.S needs immediate access to
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index cc5b253d4c57..c51fc8bfbdde 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -39,8 +39,10 @@
* For historical reasons, these macros are grossly misnamed.
*/
-#define KERNEL_DS (~0UL)
-#define USER_DS (TASK_SIZE)
+#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
+
+#define KERNEL_DS MAKE_MM_SEG(~0UL)
+#define USER_DS MAKE_MM_SEG(TASK_SIZE)
#define get_fs() (current_thread_info()->addr_limit)
@@ -49,9 +51,9 @@ static inline void set_fs(mm_segment_t fs)
current_thread_info()->addr_limit = fs;
}
-#define segment_eq(a, b) ((a) == (b))
+#define segment_eq(a, b) ((a).seg == (b).seg)
-#define user_addr_max() (get_fs())
+#define user_addr_max() (get_fs().seg)
/**
@@ -83,7 +85,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size)
{
const mm_segment_t fs = get_fs();
- return (size <= fs) && (addr <= (fs - size));
+ return size <= fs.seg && addr <= fs.seg - size;
}
/*
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 03/11] riscv: remove unreachable big endian code
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
2019-04-15 9:14 ` [PATCH 01/11] riscv: use asm-generic/extable.h Christoph Hellwig
2019-04-15 9:14 ` [PATCH 02/11] riscv: turn mm_segment_t into a struct Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 04/11] riscv: remove CONFIG_RISCV_ISA_A Christoph Hellwig
` (8 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
RISC-V is always little endian.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/include/asm/elf.h | 6 ------
arch/riscv/include/asm/uaccess.h | 9 +--------
2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index 697fc23b0d5a..ce0cd7d77eb0 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -27,13 +27,7 @@
#define ELF_CLASS ELFCLASS32
#endif
-#if defined(__LITTLE_ENDIAN)
#define ELF_DATA ELFDATA2LSB
-#elif defined(__BIG_ENDIAN)
-#define ELF_DATA ELFDATA2MSB
-#else
-#error "Unknown endianness"
-#endif
/*
* This is used to ensure we don't load something for the wrong architecture.
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index c51fc8bfbdde..b26f407be5c8 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -101,15 +101,8 @@ static inline int __access_ok(unsigned long addr, unsigned long size)
* on our cache or tlb entries.
*/
-#if defined(__LITTLE_ENDIAN)
-#define __MSW 1
#define __LSW 0
-#elif defined(__BIG_ENDIAN)
-#define __MSW 0
-#define __LSW 1
-#else
-#error "Unknown endianness"
-#endif
+#define __MSW 1
/*
* The "__xxx" versions of the user access functions do not verify the address
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 04/11] riscv: remove CONFIG_RISCV_ISA_A
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (2 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 03/11] riscv: remove unreachable big endian code Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 05/11] riscv: clear all pending interrupts when booting Christoph Hellwig
` (7 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
This option is always enabled, and not supporting the A extensions would
create a complete ABI trainwreck, so there is no point in even slightly
encouraging such an idea by keeping this unselectable code around.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/Kconfig | 6 +-----
arch/riscv/Makefile | 5 ++---
arch/riscv/include/asm/futex.h | 13 -------------
3 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index eb56c82d8aa1..a65b2a43f7ba 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -27,7 +27,7 @@ config RISCV
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
select GENERIC_SMP_IDLE_THREAD
- select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
+ select GENERIC_ATOMIC64 if !64BIT
select HAVE_ARCH_AUDITSYSCALL
select HAVE_MEMBLOCK_NODE_MAP
select HAVE_DMA_CONTIGUOUS
@@ -35,7 +35,6 @@ config RISCV
select HAVE_PERF_EVENTS
select HAVE_SYSCALL_TRACEPOINTS
select IRQ_DOMAIN
- select RISCV_ISA_A if SMP
select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE
select HAVE_ARCH_TRACEHOOK
@@ -197,9 +196,6 @@ config RISCV_ISA_C
If you don't know what to do here, say Y.
-config RISCV_ISA_A
- def_bool y
-
menu "supported PMU type"
depends on PERF_EVENTS
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index c6342e638ef7..6b0741c9f348 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -39,9 +39,8 @@ endif
KBUILD_CFLAGS += -Wall
# ISA string setting
-riscv-march-$(CONFIG_ARCH_RV32I) := rv32im
-riscv-march-$(CONFIG_ARCH_RV64I) := rv64im
-riscv-march-$(CONFIG_RISCV_ISA_A) := $(riscv-march-y)a
+riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
+riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
index 66641624d8a5..4ad6409c4647 100644
--- a/arch/riscv/include/asm/futex.h
+++ b/arch/riscv/include/asm/futex.h
@@ -7,18 +7,6 @@
#ifndef _ASM_FUTEX_H
#define _ASM_FUTEX_H
-#ifndef CONFIG_RISCV_ISA_A
-/*
- * Use the generic interrupt disabling versions if the A extension
- * is not supported.
- */
-#ifdef CONFIG_SMP
-#error "Can't support generic futex calls without A extension on SMP"
-#endif
-#include <asm-generic/futex.h>
-
-#else /* CONFIG_RISCV_ISA_A */
-
#include <linux/futex.h>
#include <linux/uaccess.h>
#include <linux/errno.h>
@@ -124,5 +112,4 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
return ret;
}
-#endif /* CONFIG_RISCV_ISA_A */
#endif /* _ASM_FUTEX_H */
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 05/11] riscv: clear all pending interrupts when booting
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (3 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 04/11] riscv: remove CONFIG_RISCV_ISA_A Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 06/11] riscv: simplify the stack pointer setup in head.S Christoph Hellwig
` (6 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
Just in case an old interrupt is pending make sure we clear everything
asserted before this kernel started. Based on similar M-mode code in
opensbi.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Nick Kossifidis <mick@ics.forth.gr>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/kernel/head.S | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index fe884cd69abd..9e3840d84d3e 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -22,8 +22,9 @@
__INIT
ENTRY(_start)
- /* Mask all interrupts */
+ /* Mask and clear all interrupts */
csrw sie, zero
+ csrw sip, zero
/* Load the global pointer */
.option push
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 06/11] riscv: simplify the stack pointer setup in head.S
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (4 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 05/11] riscv: clear all pending interrupts when booting Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 07/11] riscv: cleanup the parse_dtb calling conventions Christoph Hellwig
` (5 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
We don't need THREAD_SIZE in asm-offsets.c as we can just calculate
the value of init_thread_union + THREAD_SIZE using cpp, just like
we do a few lines above.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/kernel/asm-offsets.c | 3 ---
arch/riscv/kernel/head.S | 5 +----
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index dac98348c6a3..578bb5efc085 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -312,9 +312,6 @@ void asm_offsets(void)
- offsetof(struct task_struct, thread.fstate.f[0])
);
- /* The assembler needs access to THREAD_SIZE as well. */
- DEFINE(ASM_THREAD_SIZE, THREAD_SIZE);
-
/*
* We allocate a pt_regs on the stack when entering the kernel. This
* ensures the alignment is sane.
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 9e3840d84d3e..62d2c9c85433 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -69,10 +69,7 @@ clear_bss_done:
/* Restore C environment */
la tp, init_task
sw zero, TASK_TI_CPU(tp)
-
- la sp, init_thread_union
- li a0, ASM_THREAD_SIZE
- add sp, sp, a0
+ la sp, init_thread_union + THREAD_SIZE
/* Start the kernel */
mv a0, s0
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 07/11] riscv: cleanup the parse_dtb calling conventions
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (5 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 06/11] riscv: simplify the stack pointer setup in head.S Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 08/11] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code Christoph Hellwig
` (4 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
No need to pass the hartid, and the dtb address passed is a physical
address, so don't pretend it is a kernel pointer.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/kernel/head.S | 3 +--
arch/riscv/kernel/setup.c | 6 ++++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 62d2c9c85433..478821d31bb3 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -72,8 +72,7 @@ clear_bss_done:
la sp, init_thread_union + THREAD_SIZE
/* Start the kernel */
- mv a0, s0
- mv a1, s1
+ mv a0, s1
call parse_dtb
tail start_kernel
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index 540a331d1376..d93bcce004e3 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -52,9 +52,11 @@ struct screen_info screen_info = {
atomic_t hart_lottery;
unsigned long boot_cpu_hartid;
-void __init parse_dtb(unsigned int hartid, void *dtb)
+void __init parse_dtb(phys_addr_t dtb_phys)
{
- if (early_init_dt_scan(__va(dtb)))
+ void *dtb = __va(dtb_phys);
+
+ if (early_init_dt_scan(dtb))
return;
pr_err("No DTB passed to the kernel\n");
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 08/11] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (6 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 07/11] riscv: cleanup the parse_dtb calling conventions Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 09/11] riscv: remove duplicate macros from ptrace.h Christoph Hellwig
` (3 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
HAVE_FUNCTION_GRAPH_RET_ADDR_PTR is always defined for RISC-V.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/kernel/stacktrace.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/riscv/kernel/stacktrace.c b/arch/riscv/kernel/stacktrace.c
index a4b1d94371a0..855036c440c1 100644
--- a/arch/riscv/kernel/stacktrace.c
+++ b/arch/riscv/kernel/stacktrace.c
@@ -64,12 +64,8 @@ static void notrace walk_stackframe(struct task_struct *task,
frame = (struct stackframe *)fp - 1;
sp = fp;
fp = frame->fp;
-#ifdef HAVE_FUNCTION_GRAPH_RET_ADDR_PTR
pc = ftrace_graph_ret_addr(current, NULL, frame->ra,
(unsigned long *)(fp - 8));
-#else
- pc = frame->ra - 0x4;
-#endif
}
}
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 09/11] riscv: remove duplicate macros from ptrace.h
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (7 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 08/11] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 10/11] riscv: print the unexpected interrupt cause Christoph Hellwig
` (2 subsequent siblings)
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
No need to have two names for the same thing.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/include/asm/ptrace.h | 21 ++++++---------------
arch/riscv/kernel/stacktrace.c | 10 +++++-----
arch/riscv/kernel/traps.c | 2 +-
3 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/arch/riscv/include/asm/ptrace.h b/arch/riscv/include/asm/ptrace.h
index d35ec2f41381..9c867a4bac83 100644
--- a/arch/riscv/include/asm/ptrace.h
+++ b/arch/riscv/include/asm/ptrace.h
@@ -70,47 +70,38 @@ struct pt_regs {
/* Helpers for working with the instruction pointer */
-#define GET_IP(regs) ((regs)->sepc)
-#define SET_IP(regs, val) (GET_IP(regs) = (val))
-
static inline unsigned long instruction_pointer(struct pt_regs *regs)
{
- return GET_IP(regs);
+ return regs->sepc;
}
static inline void instruction_pointer_set(struct pt_regs *regs,
unsigned long val)
{
- SET_IP(regs, val);
+ regs->sepc = val;
}
#define profile_pc(regs) instruction_pointer(regs)
/* Helpers for working with the user stack pointer */
-#define GET_USP(regs) ((regs)->sp)
-#define SET_USP(regs, val) (GET_USP(regs) = (val))
-
static inline unsigned long user_stack_pointer(struct pt_regs *regs)
{
- return GET_USP(regs);
+ return regs->sp;
}
static inline void user_stack_pointer_set(struct pt_regs *regs,
unsigned long val)
{
- SET_USP(regs, val);
+ regs->sp = val;
}
/* Helpers for working with the frame pointer */
-#define GET_FP(regs) ((regs)->s0)
-#define SET_FP(regs, val) (GET_FP(regs) = (val))
-
static inline unsigned long frame_pointer(struct pt_regs *regs)
{
- return GET_FP(regs);
+ return regs->s0;
}
static inline void frame_pointer_set(struct pt_regs *regs,
unsigned long val)
{
- SET_FP(regs, val);
+ regs->s0 = val;
}
static inline unsigned long regs_return_value(struct pt_regs *regs)
diff --git a/arch/riscv/kernel/stacktrace.c b/arch/riscv/kernel/stacktrace.c
index 855036c440c1..a4386a0c8f67 100644
--- a/arch/riscv/kernel/stacktrace.c
+++ b/arch/riscv/kernel/stacktrace.c
@@ -33,9 +33,9 @@ static void notrace walk_stackframe(struct task_struct *task,
unsigned long fp, sp, pc;
if (regs) {
- fp = GET_FP(regs);
- sp = GET_USP(regs);
- pc = GET_IP(regs);
+ fp = frame_pointer(regs);
+ sp = user_stack_pointer(regs);
+ pc = instruction_pointer(regs);
} else if (task == NULL || task == current) {
const register unsigned long current_sp __asm__ ("sp");
fp = (unsigned long)__builtin_frame_address(0);
@@ -78,8 +78,8 @@ static void notrace walk_stackframe(struct task_struct *task,
unsigned long *ksp;
if (regs) {
- sp = GET_USP(regs);
- pc = GET_IP(regs);
+ sp = user_stack_pointer(regs);
+ pc = instruction_pointer(regs);
} else if (task == NULL || task == current) {
const register unsigned long current_sp __asm__ ("sp");
sp = current_sp;
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 0d5dac0eaddb..d9b2fd39c8bb 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -70,7 +70,7 @@ void do_trap(struct pt_regs *regs, int signo, int code,
&& printk_ratelimit()) {
pr_info("%s[%d]: unhandled signal %d code 0x%x at 0x" REG_FMT,
tsk->comm, task_pid_nr(tsk), signo, code, addr);
- print_vma_addr(KERN_CONT " in ", GET_IP(regs));
+ print_vma_addr(KERN_CONT " in ", instruction_pointer(regs));
pr_cont("\n");
show_regs(regs);
}
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 10/11] riscv: print the unexpected interrupt cause
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (8 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 09/11] riscv: remove duplicate macros from ptrace.h Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-15 9:14 ` [PATCH 11/11] riscv: call pm_power_off from machine_halt / machine_power_off Christoph Hellwig
2019-04-23 8:23 ` misc cleanups v3 Christoph Hellwig
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
This has been helpful when debugging my pending nommu port.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Nick Kossifidis <mick@ics.forth.gr>
---
arch/riscv/kernel/irq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index 48e6b7db83a1..c738132eecf8 100644
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -54,7 +54,8 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs)
handle_arch_irq(regs);
break;
default:
- panic("unexpected interrupt cause");
+ pr_alert("unexpected interrupt cause 0x%lx", regs->scause);
+ BUG();
}
irq_exit();
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 11/11] riscv: call pm_power_off from machine_halt / machine_power_off
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (9 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 10/11] riscv: print the unexpected interrupt cause Christoph Hellwig
@ 2019-04-15 9:14 ` Christoph Hellwig
2019-04-23 8:23 ` misc cleanups v3 Christoph Hellwig
11 siblings, 0 replies; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-15 9:14 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
This way any override of pm_power_off also affects the halt path and
we don't need additional infrastructure for it.
Also remove the pm_power_off export - at least for now we don't have
any modular drivers overriding it.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/kernel/reset.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/kernel/reset.c b/arch/riscv/kernel/reset.c
index 2a53d26ffdd6..ed637aee514b 100644
--- a/arch/riscv/kernel/reset.c
+++ b/arch/riscv/kernel/reset.c
@@ -12,11 +12,15 @@
*/
#include <linux/reboot.h>
-#include <linux/export.h>
#include <asm/sbi.h>
-void (*pm_power_off)(void) = machine_power_off;
-EXPORT_SYMBOL(pm_power_off);
+static void default_power_off(void)
+{
+ sbi_shutdown();
+ while (1);
+}
+
+void (*pm_power_off)(void) = default_power_off;
void machine_restart(char *cmd)
{
@@ -26,11 +30,10 @@ void machine_restart(char *cmd)
void machine_halt(void)
{
- machine_power_off();
+ pm_power_off();
}
void machine_power_off(void)
{
- sbi_shutdown();
- while (1);
+ pm_power_off();
}
--
2.20.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: misc cleanups v3
2019-04-15 9:14 misc cleanups v3 Christoph Hellwig
` (10 preceding siblings ...)
2019-04-15 9:14 ` [PATCH 11/11] riscv: call pm_power_off from machine_halt / machine_power_off Christoph Hellwig
@ 2019-04-23 8:23 ` Christoph Hellwig
2019-04-25 21:58 ` Palmer Dabbelt
11 siblings, 1 reply; 14+ messages in thread
From: Christoph Hellwig @ 2019-04-23 8:23 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: Nick Kossifidis, Atish Patra, linux-riscv
Any comments on the remaining patches?
On Mon, Apr 15, 2019 at 11:14:31AM +0200, Christoph Hellwig wrote:
> Hi Palmer,
>
> below is a number of small cleanups and improvements that started
> piling up during work to support the RISC-V kernel in nommu port.
> While that port isn't quite ready yet these patches should be useful
> on their own.
>
> Changes since v2:
> - drop the patch to remove the non-framepointer code, it turns out
> CONFIG_FRAME_POINTER can be turned off on RISC-V after all..
> Changes since v1:
> - fix up a few patch descriptions
> - fix the interrupt cause patch to actually compile without further
> prep patches, doh!
> - remove dead code related to non-framepointer builds
> - remove another big endian ifdef
> - add another patch from my nommu stack to clean up the parse_dtb
> calling conventions
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
---end quoted text---
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: misc cleanups v3
2019-04-23 8:23 ` misc cleanups v3 Christoph Hellwig
@ 2019-04-25 21:58 ` Palmer Dabbelt
0 siblings, 0 replies; 14+ messages in thread
From: Palmer Dabbelt @ 2019-04-25 21:58 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: mick, atish.patra, linux-riscv
Thanks. The all look good to me, I just dropped them on for-next.
On Tue, 23 Apr 2019 01:23:28 PDT (-0700), Christoph Hellwig wrote:
> Any comments on the remaining patches?
>
> On Mon, Apr 15, 2019 at 11:14:31AM +0200, Christoph Hellwig wrote:
>> Hi Palmer,
>>
>> below is a number of small cleanups and improvements that started
>> piling up during work to support the RISC-V kernel in nommu port.
>> While that port isn't quite ready yet these patches should be useful
>> on their own.
>>
>> Changes since v2:
>> - drop the patch to remove the non-framepointer code, it turns out
>> CONFIG_FRAME_POINTER can be turned off on RISC-V after all..
>> Changes since v1:
>> - fix up a few patch descriptions
>> - fix the interrupt cause patch to actually compile without further
>> prep patches, doh!
>> - remove dead code related to non-framepointer builds
>> - remove another big endian ifdef
>> - add another patch from my nommu stack to clean up the parse_dtb
>> calling conventions
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
> ---end quoted text---
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^ permalink raw reply [flat|nested] 14+ messages in thread