From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Marc Zyngier <maz@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>,
Jason Cooper <jason@lakedaemon.net>,
Nick Hu <nickhu@andestech.com>,
Vincent Chen <vincent.chen@sifive.com>,
Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Heiko Carstens <heiko.carstens@de.ibm.com>,
Mike Rapoport <rppt@linux.ibm.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Atish Patra <atish.patra@wdc.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
"Eric W. Biederman" <ebiederm@xmission.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Borislav Petkov <bp@suse.de>,
Thomas Gleixner <tglx@linutronix.de>, Mao Han <han_mao@c-sky.com>,
Kees Cook <keescook@chromium.org>
Subject: [PATCH v9 08/12] RISC-V: Export SBI error to linux error mapping function
Date: Thu, 20 Feb 2020 16:44:09 -0800 [thread overview]
Message-ID: <20200221004413.12869-9-atish.patra@wdc.com> (raw)
In-Reply-To: <20200221004413.12869-1-atish.patra@wdc.com>
All SBI related extensions will not be implemented in sbi.c to avoid
bloating. Thus, sbi_err_map_linux_errno() will be used in other files
implementing that specific extension.
Export the function so that it can be used later.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 1 +
arch/riscv/kernel/sbi.c | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index d55d8090ab5c..abbf0a7d3b6e 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -130,6 +130,7 @@ static inline unsigned long sbi_minor_version(void)
{
return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
}
+int sbi_err_map_linux_errno(int err);
#else /* CONFIG_RISCV_SBI */
/* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
void sbi_set_timer(uint64_t stime_value);
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 38ec99415060..d0c9516b6c0a 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -46,7 +46,7 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
}
EXPORT_SYMBOL(sbi_ecall);
-static int sbi_err_map_linux_errno(int err)
+int sbi_err_map_linux_errno(int err)
{
switch (err) {
case SBI_SUCCESS:
@@ -63,6 +63,7 @@ static int sbi_err_map_linux_errno(int err)
return -ENOTSUPP;
};
}
+EXPORT_SYMBOL(sbi_err_map_linux_errno);
#ifdef CONFIG_RISCV_SBI_V01
/**
--
2.25.0
next prev parent reply other threads:[~2020-02-21 0:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 0:44 [PATCH v9 00/12] Add support for SBI v0.2 and CPU hotplug Atish Patra
2020-02-21 0:44 ` [PATCH v9 01/12] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2020-02-21 0:44 ` [PATCH v9 02/12] RISC-V: Add basic support for SBI v0.2 Atish Patra
2020-03-09 10:33 ` Bin Meng
2020-03-10 6:21 ` Atish Patra
2020-02-21 0:44 ` [PATCH v9 03/12] RISC-V: Add SBI v0.2 extension definitions Atish Patra
2020-02-21 0:44 ` [PATCH v9 04/12] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2020-02-21 0:44 ` [PATCH v9 05/12] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2020-02-21 0:44 ` [PATCH v9 06/12] RISC-V: Move relocate and few other functions out of __init Atish Patra
2020-02-21 0:44 ` [PATCH v9 07/12] RISC-V: Add cpu_ops and modify default booting method Atish Patra
2020-02-21 0:44 ` Atish Patra [this message]
2020-02-21 6:01 ` [PATCH v9 08/12] RISC-V: Export SBI error to linux error mapping function Anup Patel
2020-02-21 0:44 ` [PATCH v9 09/12] RISC-V: Add SBI HSM extension definitions Atish Patra
2020-02-21 6:03 ` Anup Patel
2020-02-21 0:44 ` [PATCH v9 10/12] RISC-V: Add supported for ordered booting method using HSM Atish Patra
2020-02-21 6:08 ` Anup Patel
2020-02-21 0:44 ` [PATCH v9 11/12] RISC-V: Support cpu hotplug Atish Patra
2020-02-21 6:12 ` Anup Patel
2020-02-21 0:44 ` [PATCH v9 12/12] irqchip/sifive-plic: Initialize the plic handler when cpu comes online Atish Patra
2020-02-21 6:14 ` Anup Patel
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