Re: [PATCH v9 12/12] irqchip/sifive-plic: Initialize the plic handler when cpu comes online

[Anup Patel <anup@brainfault.org>]

On Fri, Feb 21, 2020 at 6:14 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> Currently, plic threshold and priority are only initialized once in the
> beginning. However, threshold can be set to disabled if cpu is marked
> offline with cpu hotplug feature. This will not allow to change the
> irq affinity to a cpu that just came online.
>
> Add plic specific cpu hotplug callback and initialize the per cpu handler
> when cpu comes online.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  arch/riscv/kernel/traps.c         |  2 +-
>  drivers/irqchip/irq-sifive-plic.c | 38 +++++++++++++++++++++++++++----
>  include/linux/cpuhotplug.h        |  1 +
>  3 files changed, 36 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index 8e13ad45ccaa..16c59807da6a 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -157,5 +157,5 @@ void trap_init(void)
>         /* Set the exception vector address */
>         csr_write(CSR_TVEC, &handle_exception);
>         /* Enable interrupts */
> -       csr_write(CSR_IE, IE_SIE | IE_EIE);
> +       csr_write(CSR_IE, IE_SIE);
>  }
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index aa4af886e43a..7c7f37393f99 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -4,6 +4,7 @@
>   * Copyright (C) 2018 Christoph Hellwig
>   */
>  #define pr_fmt(fmt) "plic: " fmt
> +#include <linux/cpu.h>
>  #include <linux/interrupt.h>
>  #include <linux/io.h>
>  #include <linux/irq.h>
> @@ -55,6 +56,9 @@
>  #define     CONTEXT_THRESHOLD          0x00
>  #define     CONTEXT_CLAIM              0x04
>
> +#define        PLIC_DISABLE_THRESHOLD          0xf
> +#define        PLIC_ENABLE_THRESHOLD           0
> +
>  static void __iomem *plic_regs;
>
>  struct plic_handler {
> @@ -230,6 +234,32 @@ static int plic_find_hart_id(struct device_node *node)
>         return -1;
>  }
>
> +static void plic_set_threshold(struct plic_handler *handler, u32 threshold)
> +{
> +       /* priority must be > threshold to trigger an interrupt */
> +       writel(threshold, handler->hart_base + CONTEXT_THRESHOLD);
> +}
> +
> +static int plic_dying_cpu(unsigned int cpu)
> +{
> +       struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
> +
> +       csr_clear(CSR_IE, IE_EIE);
> +       plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
> +
> +       return 0;
> +}
> +
> +static int plic_starting_cpu(unsigned int cpu)
> +{
> +       struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
> +
> +       csr_set(CSR_IE, IE_EIE);
> +       plic_set_threshold(handler, PLIC_ENABLE_THRESHOLD);
> +
> +       return 0;
> +}
> +
>  static int __init plic_init(struct device_node *node,
>                 struct device_node *parent)
>  {
> @@ -267,7 +297,6 @@ static int __init plic_init(struct device_node *node,
>                 struct plic_handler *handler;
>                 irq_hw_number_t hwirq;
>                 int cpu, hartid;
> -               u32 threshold = 0;
>
>                 if (of_irq_parse_one(node, i, &parent)) {
>                         pr_err("failed to parse parent for context %d.\n", i);
> @@ -301,7 +330,7 @@ static int __init plic_init(struct device_node *node,
>                 handler = per_cpu_ptr(&plic_handlers, cpu);
>                 if (handler->present) {
>                         pr_warn("handler already present for context %d.\n", i);
> -                       threshold = 0xffffffff;
> +                       plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
>                         goto done;
>                 }
>
> @@ -313,13 +342,14 @@ static int __init plic_init(struct device_node *node,
>                         plic_regs + ENABLE_BASE + i * ENABLE_PER_HART;
>
>  done:
> -               /* priority must be > threshold to trigger an interrupt */
> -               writel(threshold, handler->hart_base + CONTEXT_THRESHOLD);
>                 for (hwirq = 1; hwirq <= nr_irqs; hwirq++)
>                         plic_toggle(handler, hwirq, 0);
>                 nr_handlers++;
>         }
>
> +       cpuhp_setup_state(CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING,
> +                                 "irqchip/sifive/plic:starting",
> +                                 plic_starting_cpu, plic_dying_cpu);
>         pr_info("mapped %d interrupts with %d handlers for %d contexts.\n",
>                 nr_irqs, nr_handlers, nr_contexts);
>         set_handle_irq(plic_handle_irq);
> diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
> index d37c17e68268..77d70b633531 100644
> --- a/include/linux/cpuhotplug.h
> +++ b/include/linux/cpuhotplug.h
> @@ -102,6 +102,7 @@ enum cpuhp_state {
>         CPUHP_AP_IRQ_ARMADA_XP_STARTING,
>         CPUHP_AP_IRQ_BCM2836_STARTING,
>         CPUHP_AP_IRQ_MIPS_GIC_STARTING,
> +       CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING,
>         CPUHP_AP_ARM_MVEBU_COHERENCY,
>         CPUHP_AP_MICROCODE_LOADER,
>         CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING,
> --
> 2.25.0
>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

I will rebase my RISC-V local interrupt controller driver patches
upon this patch series.

Regards,
Anup