From: Xianting Tian <xianting.tian@linux.alibaba.com>
To: crash-utility@redhat.com, mick@ics.forth.gr,
heinrich.schuchardt@canonical.com, guoren@kernel.org,
k-hagio-ab@nec.com
Cc: linux-riscv@lists.infradead.org, hschauhan@nulltrace.org,
huanyi.xj@alibaba-inc.com,
Xianting Tian <xianting.tian@linux.alibaba.com>
Subject: [Crash-utility][PATCH 3/8] RISCV64: Add 'dis' command support
Date: Mon, 18 Jul 2022 10:53:41 +0800 [thread overview]
Message-ID: <20220718025346.411758-4-xianting.tian@linux.alibaba.com> (raw)
In-Reply-To: <20220718025346.411758-1-xianting.tian@linux.alibaba.com>
Use generic_dis_filter() function to support dis command implementation.
With this patch, we can get the disassembled code,
crash> dis __crash_kexec
0xffffffff80088580 <__crash_kexec>: addi sp,sp,-352
0xffffffff80088582 <__crash_kexec+2>: sd s0,336(sp)
0xffffffff80088584 <__crash_kexec+4>: sd s1,328(sp)
0xffffffff80088586 <__crash_kexec+6>: sd s2,320(sp)
0xffffffff80088588 <__crash_kexec+8>: addi s0,sp,352
0xffffffff8008858a <__crash_kexec+10>: sd ra,344(sp)
0xffffffff8008858c <__crash_kexec+12>: sd s3,312(sp)
0xffffffff8008858e <__crash_kexec+14>: sd s4,304(sp)
0xffffffff80088590 <__crash_kexec+16>: auipc s2,0x1057
0xffffffff80088594 <__crash_kexec+20>: addi s2,s2,-1256
0xffffffff80088598 <__crash_kexec+24>: ld a5,0(s2)
0xffffffff8008859c <__crash_kexec+28>: mv s1,a0
0xffffffff8008859e <__crash_kexec+30>: auipc a0,0xfff
Signed-off-by: Xianting Tian <xianting.tian@linux.alibaba.com>
---
riscv64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/riscv64.c b/riscv64.c
index 9d40297..a812635 100644
--- a/riscv64.c
+++ b/riscv64.c
@@ -977,6 +977,7 @@ riscv64_init(int when)
machdep->is_task_addr = riscv64_is_task_addr;
machdep->get_smp_cpus = riscv64_get_smp_cpus;
machdep->value_to_symbol = generic_machdep_value_to_symbol;
+ machdep->dis_filter = generic_dis_filter;
machdep->show_interrupts = generic_show_interrupts;
machdep->get_irq_affinity = generic_get_irq_affinity;
machdep->init_kernel_pgd = NULL; /* pgd set by symbol_value("swapper_pg_dir") */
--
2.17.1
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next prev parent reply other threads:[~2022-07-18 2:54 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-18 2:53 [Crash-utility][PATCH 0/8] Support RISCV64 arch and common commands Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 1/8] Add RISCV64 framework code support Xianting Tian
2022-07-21 8:17 ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-21 8:57 ` Heinrich Schuchardt
2022-07-21 9:22 ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-27 14:33 ` Yixun Lan
2022-07-28 12:02 ` Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 2/8] RISCV64: Make crash tool enter command line and support some commands Xianting Tian
2022-07-21 8:17 ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-18 2:53 ` Xianting Tian [this message]
2022-07-18 2:53 ` [Crash-utility][PATCH 4/8] RISCV64: Add 'irq' command support Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 5/8] RISCV64: Add 'bt' " Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 6/8] RISCV64: Add 'help -r' " Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 7/8] RISCV64: Add 'mach' " Xianting Tian
2022-07-18 2:53 ` [Crash-utility][PATCH 8/8] RISCV64: Add the implementation of symbol verify Xianting Tian
2022-07-21 8:16 ` [Crash-utility][PATCH 0/8] Support RISCV64 arch and common commands HAGIO KAZUHITO(萩尾 一仁)
2022-07-21 8:57 ` tianxianting
2022-07-29 13:44 ` Yixun Lan
2022-07-29 15:11 ` Xianting Tian
2022-07-29 23:29 ` Yixun Lan
2022-07-30 8:56 ` Xianting Tian
2022-08-01 2:09 ` Yixun Lan
2022-08-01 2:35 ` Xianting Tian
2022-08-01 3:06 ` Yixun Lan
2022-08-01 4:35 ` Xianting Tian
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