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From: Xianting Tian <xianting.tian@linux.alibaba.com>
To: crash-utility@redhat.com, mick@ics.forth.gr,
	heinrich.schuchardt@canonical.com, guoren@kernel.org,
	k-hagio-ab@nec.com
Cc: linux-riscv@lists.infradead.org, hschauhan@nulltrace.org,
	huanyi.xj@alibaba-inc.com,
	Xianting Tian <xianting.tian@linux.alibaba.com>
Subject: [Crash-utility][PATCH 7/8] RISCV64: Add 'mach' command support
Date: Mon, 18 Jul 2022 10:53:45 +0800	[thread overview]
Message-ID: <20220718025346.411758-8-xianting.tian@linux.alibaba.com> (raw)
In-Reply-To: <20220718025346.411758-1-xianting.tian@linux.alibaba.com>

With the patch we can get some basic machine state information,
crash> mach
                MACHINE TYPE: riscv64
                 MEMORY SIZE: 1 GB
                        CPUS: 1
             PROCESSOR SPEED: (unknown)
                          HZ: 250
                   PAGE SIZE: 4096
           KERNEL STACK SIZE: 16384

Signed-off-by: Xianting Tian <xianting.tian@linux.alibaba.com>
---
 riscv64.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/riscv64.c b/riscv64.c
index 475dc98..cbf75cf 100644
--- a/riscv64.c
+++ b/riscv64.c
@@ -139,10 +139,53 @@ static int riscv64_get_struct_page_max_shift(struct machine_specific *ms)
 	return (int)ceil(log2(ms->struct_page_size));
 }
 
+/*
+ * "mach" command output.
+ */
+static void
+riscv64_display_machine_stats(void)
+{
+	struct new_utsname *uts;
+	char buf[BUFSIZE];
+	ulong mhz;
+
+	uts = &kt->utsname;
+
+	fprintf(fp, "		MACHINE TYPE: %s\n", uts->machine);
+	fprintf(fp, "		 MEMORY SIZE: %s\n", get_memory_size(buf));
+	fprintf(fp, "			CPUS: %d\n", get_cpus_to_display());
+	fprintf(fp, "	     PROCESSOR SPEED: ");
+	if ((mhz = machdep->processor_speed()))
+		fprintf(fp, "%ld Mhz\n", mhz);
+	else
+		fprintf(fp, "(unknown)\n");
+	fprintf(fp, "			  HZ: %d\n", machdep->hz);
+	fprintf(fp, "		   PAGE SIZE: %d\n", PAGESIZE());
+	fprintf(fp, "	   KERNEL STACK SIZE: %ld\n", STACKSIZE());
+}
+
 static void
 riscv64_cmd_mach(void)
 {
-	/* TODO: */
+	int c;
+
+	while ((c = getopt(argcnt, args, "cmo")) != EOF) {
+		switch (c) {
+		case 'c':
+		case 'm':
+		case 'o':
+			option_not_supported(c);
+			break;
+		default:
+			argerrs++;
+			break;
+		}
+	}
+
+	if (argerrs)
+		cmd_usage(pc->curcmd, SYNOPSIS);
+
+	riscv64_display_machine_stats();
 }
 
 static int
-- 
2.17.1


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  parent reply	other threads:[~2022-07-18  2:54 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-18  2:53 [Crash-utility][PATCH 0/8] Support RISCV64 arch and common commands Xianting Tian
2022-07-18  2:53 ` [Crash-utility][PATCH 1/8] Add RISCV64 framework code support Xianting Tian
2022-07-21  8:17   ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-21  8:57     ` Heinrich Schuchardt
2022-07-21  9:22       ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-27 14:33   ` Yixun Lan
2022-07-28 12:02     ` Xianting Tian
2022-07-18  2:53 ` [Crash-utility][PATCH 2/8] RISCV64: Make crash tool enter command line and support some commands Xianting Tian
2022-07-21  8:17   ` HAGIO KAZUHITO(萩尾 一仁)
2022-07-18  2:53 ` [Crash-utility][PATCH 3/8] RISCV64: Add 'dis' command support Xianting Tian
2022-07-18  2:53 ` [Crash-utility][PATCH 4/8] RISCV64: Add 'irq' " Xianting Tian
2022-07-18  2:53 ` [Crash-utility][PATCH 5/8] RISCV64: Add 'bt' " Xianting Tian
2022-07-18  2:53 ` [Crash-utility][PATCH 6/8] RISCV64: Add 'help -r' " Xianting Tian
2022-07-18  2:53 ` Xianting Tian [this message]
2022-07-18  2:53 ` [Crash-utility][PATCH 8/8] RISCV64: Add the implementation of symbol verify Xianting Tian
2022-07-21  8:16 ` [Crash-utility][PATCH 0/8] Support RISCV64 arch and common commands HAGIO KAZUHITO(萩尾 一仁)
2022-07-21  8:57   ` tianxianting
2022-07-29 13:44 ` Yixun Lan
2022-07-29 15:11   ` Xianting Tian
2022-07-29 23:29     ` Yixun Lan
2022-07-30  8:56       ` Xianting Tian
2022-08-01  2:09         ` Yixun Lan
2022-08-01  2:35           ` Xianting Tian
2022-08-01  3:06             ` Yixun Lan
2022-08-01  4:35               ` Xianting Tian

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