linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Drew Fustini <dfustini@baylibre.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Ved Shanbhogue" <ved@rivosinc.com>,
	"Kornel Dulęba" <mindal@semihalf.com>,
	"Adrien Ricciardi" <aricciardi@baylibre.com>,
	"Nicolas Pitre" <npitre@baylibre.com>,
	"Fenghua Yu" <fenghua.yu@intel.com>,
	"Reinette Chatre" <reinette.chatre@intel.com>,
	"Babu Moger" <babu.moger@amd.com>,
	"Peter Newman" <peternewman@google.com>,
	x86@kernel.org, "Rob Herring" <robh+dt@kernel.org>,
	"James Morse" <james.morse@arm.com>
Cc: Drew Fustini <dfustini@baylibre.com>
Subject: [RFC PATCH 18/21] DO_NOT_MERGE soc: build Foobar SoC drivers
Date: Wed, 19 Apr 2023 04:11:08 -0700	[thread overview]
Message-ID: <20230419111111.477118-19-dfustini@baylibre.com> (raw)
In-Reply-To: <20230419111111.477118-1-dfustini@baylibre.com>

Add Foobar SoC cache and memory controller drivers to the build.

The hypothetical Foobar SoC serves as an example of an SoC with
controllers that implement the RISC-V Capacity and Bandwidth QoS
Register Interface (CBQRI) specification.

Link: https://github.com/riscv-non-isa/riscv-cbqri/blob/main/riscv-cbqri.pdf
Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 drivers/soc/Kconfig         |  1 +
 drivers/soc/Makefile        |  1 +
 drivers/soc/foobar/Kconfig  | 21 +++++++++++++++++++++
 drivers/soc/foobar/Makefile |  4 ++++
 4 files changed, 27 insertions(+)
 create mode 100644 drivers/soc/foobar/Kconfig
 create mode 100644 drivers/soc/foobar/Makefile

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 4e176280113a..8578f8c607ff 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -8,6 +8,7 @@ source "drivers/soc/aspeed/Kconfig"
 source "drivers/soc/atmel/Kconfig"
 source "drivers/soc/bcm/Kconfig"
 source "drivers/soc/canaan/Kconfig"
+source "drivers/soc/foobar/Kconfig"
 source "drivers/soc/fsl/Kconfig"
 source "drivers/soc/fujitsu/Kconfig"
 source "drivers/soc/imx/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 3b0f9fb3b5c8..37a77c2dab94 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -11,6 +11,7 @@ obj-y				+= bcm/
 obj-$(CONFIG_SOC_CANAAN)	+= canaan/
 obj-$(CONFIG_ARCH_DOVE)		+= dove/
 obj-$(CONFIG_MACH_DOVE)		+= dove/
+obj-y				+= foobar/
 obj-y				+= fsl/
 obj-y				+= fujitsu/
 obj-$(CONFIG_ARCH_GEMINI)	+= gemini/
diff --git a/drivers/soc/foobar/Kconfig b/drivers/soc/foobar/Kconfig
new file mode 100644
index 000000000000..4548e822357e
--- /dev/null
+++ b/drivers/soc/foobar/Kconfig
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config FOOBAR_CBQRI_CACHE
+	bool "Foobar cache controller for RISC-V CBQRI testing"
+	default y
+	help
+	  Support the cache controller in a hypothetical "Foobar" SoC that
+	  implements the RISC-V Capacity and Bandwidth QoS Register Interface
+	  (CBQRI) specification.
+
+	  If you do not care about testing RISC-V CBQRI, then choose 'N'.
+
+config FOOBAR_CBQRI_MEMORY
+	bool "Foobar memory controller for RISC-V CBQRI testing"
+	default y
+	help
+	  Support the memory controller in a hypothetical "Foobar" SoC that
+	  implements the RISC-V Capacity and Bandwidth QoS Register Interface
+	  (CBQRI) specification.
+
+	  If you do not care about testing RISC-V CBQRI, then choose 'N'.
diff --git a/drivers/soc/foobar/Makefile b/drivers/soc/foobar/Makefile
new file mode 100644
index 000000000000..e4f34058e39e
--- /dev/null
+++ b/drivers/soc/foobar/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_FOOBAR_CBQRI_CACHE)     += foobar_cbqri_cache.o
+obj-$(CONFIG_FOOBAR_CBQRI_MEMORY)     += foobar_cbqri_memory.o
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2023-04-19 12:15 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-19 11:10 [RFC PATCH 00/21] RISC-V: QoS: add CBQRI resctrl interface Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 01/21] RISC-V: Detect the Ssqosid extension Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 02/21] RISC-V: Add support for sqoscfg CSR Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 03/21] RISC-V: QoS: define properties of CBQRI controllers Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 04/21] RISC-V: QoS: define CBQRI capacity and bandwidth capabilities Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 05/21] RISC-V: QoS: define prototypes for resctrl interface Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 06/21] RISC-V: QoS: define CBQRI resctrl resources and domains Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 07/21] RISC-V: QoS: add resctrl interface for CBQRI controllers Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 08/21] RISC-V: QoS: expose implementation to resctrl Drew Fustini
2023-04-19 11:10 ` [RFC PATCH 09/21] RISC-V: QoS: add late_initcall to setup resctrl interface Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 10/21] RISC-V: QoS: make CONFIG_RISCV_ISA_SSQOSID select resctrl Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 11/21] RISC-V: QoS: add to build when CONFIG_RISCV_ISA_SSQOSID set Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 12/21] dt-bindings: riscv: add riscv,cbqri bindings Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 13/21] DO_NOT_MERGE dt-bindings: add foobar vendor-prefix Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 14/21] DO_NOT_MERGE dt-bindings: soc: add Foobar SoC cache controller Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 15/21] DO_NOT_MERGE dt-bindings: soc: add Foobar SoC memory controller Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 16/21] DO_NOT_MERGE soc: add Foobar SoC cache controller driver Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 17/21] DO_NOT_MERGE soc: add Foobar SoC memory " Drew Fustini
2023-04-19 11:11 ` Drew Fustini [this message]
2023-04-19 11:11 ` [RFC PATCH 19/21] DO_NOT_MERGE riscv: dts: qemu: add dump from riscv-cbqri-rfc Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 20/21] DO_NOT_MERGE riscv: dts: qemu: add cbqri-capable controllers Drew Fustini
2023-04-19 11:11 ` [RFC PATCH 21/21] DO_NOT_MERGE riscv: dts: build qemu virt device tree Drew Fustini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230419111111.477118-19-dfustini@baylibre.com \
    --to=dfustini@baylibre.com \
    --cc=aricciardi@baylibre.com \
    --cc=babu.moger@amd.com \
    --cc=conor.dooley@microchip.com \
    --cc=fenghua.yu@intel.com \
    --cc=james.morse@arm.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mindal@semihalf.com \
    --cc=npitre@baylibre.com \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=peternewman@google.com \
    --cc=reinette.chatre@intel.com \
    --cc=robh+dt@kernel.org \
    --cc=ved@rivosinc.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).