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From: Zhangjin Wu <falcon@tinylab.org>
To: w@1wt.eu
Cc: aou@eecs.berkeley.edu, falcon@tinylab.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	palmer@rivosinc.com, paul.walmsley@sifive.com,
	paulmck@kernel.org
Subject: Re: Re: [PATCH 1/2] tools/nolibc: riscv: Fix up load/store instructions for rv32
Date: Sat, 20 May 2023 17:11:44 +0800	[thread overview]
Message-ID: <20230520091144.30599-1-falcon@tinylab.org> (raw)
In-Reply-To: <20230520085052.GC27206@1wt.eu>

Hi, Willy

This is a full commit message for this patch:

When compile for rv32, we got such error:

---

nolibc/sysroot/riscv/include/arch.h:190: Error: unrecognized opcode `ld a4,0(a3)'
nolibc/sysroot/riscv/include/arch.h:194: Error: unrecognized opcode `sd a3,%lo(_auxv)(a4)'
nolibc/sysroot/riscv/include/arch.h:196: Error: unrecognized opcode `sd a2,%lo(environ)(a3)'

Refer to arch/riscv/include/asm/asm.h and add REG_L/REG_S macros here to let
rv32 use its own lw/sw instructions.

---

I will send a new version with the above full message for you, wait for a while, very sorry ;-)

Best Regards,
Zhangjin Wu

> Hi Zhangjin,
> 
> On Fri, May 19, 2023 at 01:02:12AM +0800, Zhangjin Wu wrote:
> > Signed-off-by: Zhangjin Wu <falcon@tinylab.org>
> > ---
> >  tools/include/nolibc/arch-riscv.h | 14 +++++++++-----
> >  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> I'm having a comment regarding this one (which for now I've queued so that
> Thomas can rebase his series), please provide a real commit message that
> explains the purpose of the change and the solutions chosen. Feel free
> to copy-paste from your cover letter if that fits, it's just that I do
> want to see some justification for a change in the commit message itself
> (i.e think about the poor person seeing a bisect stop on that one).
> 
> You can send me a paragraph or two and I'll happily copy them into my
> local copy of the rebased commit.
> 
> Thank you!
> Willy

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  reply	other threads:[~2023-05-20  9:12 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-18 17:00 [PATCH 0/2] tools/nolibc: riscv: Fix up compile error for rv32 Zhangjin Wu
2023-05-18 17:02 ` [PATCH 1/2] tools/nolibc: riscv: Fix up load/store instructions " Zhangjin Wu
2023-05-20  8:50   ` Willy Tarreau
2023-05-20  9:11     ` Zhangjin Wu [this message]
2023-05-20  9:33       ` Willy Tarreau
2023-05-20 10:05         ` Zhangjin Wu
2023-05-20 10:20           ` Willy Tarreau
2023-05-18 17:03 ` [PATCH 2/2] tools/nolibc: riscv: Support __NR_llseek " Zhangjin Wu
2023-05-19  9:40 ` [PATCH 0/2] tools/nolibc: riscv: Fix up compile error " Willy Tarreau
2023-05-19 10:11   ` Thomas Weißschuh
2023-05-19 10:19     ` Willy Tarreau
2023-05-20  7:18       ` Thomas Weißschuh
2023-05-20  8:46         ` Willy Tarreau
2023-05-20 14:31   ` Zhangjin Wu

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