From: Atish Patra <Atish.Patra@wdc.com>
To: "anup@brainfault.org" <anup@brainfault.org>
Cc: "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rppt@linux.ibm.com" <rppt@linux.ibm.com>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"han_mao@c-sky.com" <han_mao@c-sky.com>
Subject: Re: [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions
Date: Tue, 26 Nov 2019 18:13:16 +0000 [thread overview]
Message-ID: <717e83cb287568db9290d828d9fea783b5b84f01.camel@wdc.com> (raw)
In-Reply-To: <CAAhSdy3DXe_iCD9QanbQwoJZxwKcUFvE=gGSODHh=PmWG3C9+g@mail.gmail.com>
On Tue, 2019-11-26 at 09:46 +0530, Anup Patel wrote:
> On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com>
> wrote:
> > Few v0.1 SBI calls are being replaced by new SBI calls that follows
> > v0.2 calling convention. The specification changes can be found at
> >
> > riscv/riscv-sbi-doc#27
> >
> > Implement the replacement extensions and few additional new SBI
> > function calls that makes way for a better SBI interface in future.
> >
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > ---
> > arch/riscv/include/asm/sbi.h | 35 +++++++
> > arch/riscv/kernel/sbi.c | 197
> > ++++++++++++++++++++++++++++++++++-
> > 2 files changed, 229 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h
> > b/arch/riscv/include/asm/sbi.h
> > index cc82ae63f8e0..54ba9eebec11 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -22,6 +22,9 @@ enum sbi_ext_id {
> > SBI_EXT_0_1_SHUTDOWN = 0x8,
> > #endif
> > SBI_EXT_BASE = 0x10,
> > + SBI_EXT_TIME = 0x54494D45,
> > + SBI_EXT_IPI = 0x735049,
> > + SBI_EXT_RFENCE = 0x52464E43,
> > };
> >
> > enum sbi_ext_base_fid {
> > @@ -34,6 +37,24 @@ enum sbi_ext_base_fid {
> > SBI_BASE_GET_MIMPID,
> > };
> >
> > +enum sbi_ext_time_fid {
> > + SBI_EXT_TIME_SET_TIMER = 0,
> > +};
> > +
> > +enum sbi_ext_ipi_fid {
> > + SBI_EXT_IPI_SEND_IPI = 0,
> > +};
> > +
> > +enum sbi_ext_rfence_fid {
> > + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> > +};
> > +
> > #define SBI_SPEC_VERSION_DEFAULT 0x1
> > #define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> > #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
> > @@ -74,6 +95,20 @@ void sbi_remote_sfence_vma_asid(const unsigned
> > long *hart_mask,
> > unsigned long start,
> > unsigned long size,
> > unsigned long asid);
> > +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size);
> > +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long vmid);
> > +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size);
> > +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long asid);
> > int sbi_probe_extension(long ext);
> >
> > /* Check if current SBI specification version is 0.1 or not */
> > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > index 8574de1074c4..74b3155b570f 100644
> > --- a/arch/riscv/kernel/sbi.c
> > +++ b/arch/riscv/kernel/sbi.c
> > @@ -205,6 +205,101 @@ static int __sbi_rfence_v01(unsigned long
> > ext, unsigned long fid,
> > }
> > #endif /* CONFIG_RISCV_SBI_V01 */
> >
> > +static void __sbi_set_timer_v02(uint64_t stime_value)
> > +{
> > +#if __riscv_xlen == 32
> > + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER,
> > stime_value,
> > + stime_value >> 32, 0, 0, 0, 0);
> > +#else
> > + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER,
> > stime_value, 0,
> > + 0, 0, 0, 0);
> > +#endif
> > +}
> > +
> > +static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
> > +{
> > + unsigned long hmask_val;
> > + struct sbiret ret = {0};
> > + int result;
> > +
> > + if (!hart_mask)
> > + hmask_val = *(cpumask_bits(cpu_online_mask));
> > + else
> > + hmask_val = *hart_mask;
> > +
> > + ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
> > hmask_val,
> > + 0, 0, 0, 0, 0);
> > + if (ret.error) {
> > + pr_err("%s: failed with error [%d]\n", __func__,
> > + sbi_err_map_linux_errno(ret.error));
> > + result = ret.error;
> > + } else
> > + result = ret.value;
> > +
> > + return result;
> > +}
> > +
> > +static int __sbi_rfence_v02(unsigned long extid, unsigned long
> > fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long
> > start,
> > + unsigned long size, unsigned long
> > arg4,
> > + unsigned long arg5)
> > +{
> > + unsigned long hmask_val;
> > + struct sbiret ret = {0};
> > + int result;
> > + unsigned long ext = SBI_EXT_RFENCE;
> > +
> > + if (!hart_mask)
> > + hmask_val = *(cpumask_bits(cpu_online_mask));
> > + else
> > + hmask_val = *hart_mask;
> > +
> > + switch (fid) {
> > + case SBI_EXT_RFENCE_REMOTE_FENCE_I:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, 0, 0, 0,
> > 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + /*TODO: Handle non zero hbase cases */
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + default:
> > + pr_err("unknown function ID [%lu] for SBI extension
> > [%lu]\n",
> > + fid, ext);
> > + result = -EINVAL;
> > + }
> > +
> > + if (ret.error) {
> > + pr_err("%s: failed with error [%d]\n", __func__,
> > + sbi_err_map_linux_errno(ret.error));
> > + result = ret.error;
> > + } else
> > + result = ret.value;
> > +
> > + return result;
> > +}
> > +
> > /**
> > * sbi_set_timer() - Program the timer for next timer event.
> > * @stime_value: The value after which next timer event should
> > fire.
> > @@ -237,7 +332,7 @@ EXPORT_SYMBOL(sbi_send_ipi);
> > */
> > void sbi_remote_fence_i(const unsigned long *hart_mask)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I,
> > SBI_EXT_RFENCE_REMOTE_FENCE_I,
> > hart_mask, 0, 0, 0, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_fence_i);
> > @@ -255,7 +350,8 @@ void sbi_remote_sfence_vma(const unsigned long
> > *hart_mask,
> > unsigned long start,
> > unsigned long size)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> > hart_mask, 0, start, size, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma);
> > @@ -276,11 +372,93 @@ void sbi_remote_sfence_vma_asid(const
> > unsigned long *hart_mask,
> > unsigned long size,
> > unsigned long asid)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> > hart_mask, 0, start, size, asid, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
> >
> > +/**
> > + * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on
> > given remote
> > + * harts for the specified guest physical
> > address range.
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the guest physical address
> > + * @size: Total size of the guest physical address range.
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> > + hart_mask, 0, start, size, 0, 0);
> > +}
> > +EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
> > +
> > +/**
> > + * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA
> > instructions on given
> > + * remote harts for a guest physical address range belonging to a
> > specific VMID.
> > + *
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the guest physical address
> > + * @size: Total size of the guest physical address range.
> > + * @vmid: The value of guest ID (VMID).
> > + *
> > + * Return: 0 if success, Error otherwise.
> > + */
> > +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long vmid)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> > + hart_mask, 0, start, size, vmid, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
> > +
> > +/**
> > + * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on
> > given remote
> > + * harts for the current guest virtual
> > address range.
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the current guest virtual address
> > + * @size: Total size of the current guest virtual address range.
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> > + hart_mask, 0, start, size, 0, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_vvma);
> > +
> > +/**
> > + * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA
> > instructions on given
> > + * remote harts for current guest virtual address range belonging
> > to a specific
> > + * ASID.
> > + *
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the current guest virtual address
> > + * @size: Total size of the current guest virtual address range.
> > + * @asid: The value of address space identifier (ASID).
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long asid)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> > + hart_mask, 0, start, size, asid, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
> > +
> > /**
> > * sbi_probe_extension() - Check if an SBI extension ID is
> > supported or not.
> > * @extid: The extension ID to be probed.
> > @@ -361,6 +539,19 @@ int __init sbi_init(void)
> > } else {
> > pr_info("SBI implementation ID=0x%lx
> > Version=0x%lx\n",
> > sbi_get_firmware_id(),
> > sbi_get_firmware_version());
> > + if (sbi_probe_extension(SBI_EXT_TIME) > 0)
> > + __sbi_set_timer = __sbi_set_timer_v02;
> > + else
> > + __sbi_set_timer =
> > __sbi_set_timer_dummy_warn;
> > + if (sbi_probe_extension(SBI_EXT_IPI) > 0)
> > + __sbi_send_ipi = __sbi_send_ipi_v02;
> > + else
> > + __sbi_send_ipi = __sbi_send_ipi_dummy_warn;
> > + if (sbi_probe_extension(SBI_EXT_RFENCE) > 0)
> > + __sbi_rfence = __sbi_rfence_v02;
> > + else
> > + __sbi_rfence = __sbi_rfence_dummy_warn;
> > +
> > }
> >
> > return 0;
> > --
> > 2.23.0
> >
>
> You might want to print whether TIMER, IPI and RFENCE extension
> were detected at boot-time.
>
Sure. Will do.
> Otherwise, looks good.
>
> Reviewed-by: Anup Patel <anup@brainfault.org>
>
Thanks for the review.
> Regards,
> Anup
--
Regards,
Atish
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2019-11-26 18:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2019-11-26 4:10 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 Atish Patra
2019-11-26 4:11 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2019-11-26 4:14 ` Anup Patel
2019-11-26 18:12 ` Atish Patra
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2019-11-26 4:16 ` Anup Patel
2019-11-26 18:13 ` Atish Patra [this message]
2019-11-26 6:52 ` kbuild test robot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=717e83cb287568db9290d828d9fea783b5b84f01.camel@wdc.com \
--to=atish.patra@wdc.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=han_mao@c-sky.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=rppt@linux.ibm.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).