messages from 2022-07-27 11:44:13 to 2022-08-09 14:58:47 UTC [more...]
[PATCH] wireguard: selftests: set CONFIG_NONPORTABLE on riscv32
2022-08-09 14:57 UTC
[PATCH 0/3] Fix dt-validate issues on qemu dtbdumps due to dt-bindings
2022-08-09 14:16 UTC (8+ messages)
` [PATCH 1/3] dt-bindings: timer: sifive,clint: add legacy riscv compatible
` [PATCH 2/3] dt-bindings: interrupt-controller: sifive,plic: "
` [PATCH 3/3] dt-bindings: riscv: add new riscv,isa strings for emulators
[PATCH -next] riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit
2022-08-09 11:01 UTC (4+ messages)
[PATCH V4 5/5] riscv: atomic: Optimize LRSC-pairs atomic ops with .aqrl annotation
2022-08-09 7:06 UTC (11+ messages)
[PATCH V5 0/6] RISC-V fixups to work with crash tool
2022-08-09 6:58 UTC (8+ messages)
` [PATCH V5 1/6] RISC-V: use __smp_processor_id() instead of smp_processor_id()
` [PATCH V5 2/6] RISC-V: Add arch_crash_save_vmcoreinfo support
` [PATCH V5 3/6] riscv: Add modules to virtual kernel memory layout dump
` [PATCH V5 4/6] RISC-V: Fixup getting correct current pc
` [PATCH V5 5/6] riscv: crash_core: Export kernel vm layout, phys_ram_base
` [PATCH V5 6/6] RISC-V: Fixup schedule out issue in machine_crash_shutdown()
[PATCH v2 0/4] QEMU: Fix RISC-V virt & spike machines' dtbs
2022-08-09 6:26 UTC (9+ messages)
` [PATCH v2 1/4] hw/riscv: virt: fix uart node name
` [PATCH v2 2/4] hw/riscv: virt: Fix the plic's address cells
` [PATCH v2 3/4] hw/riscv: virt: fix syscon subnode paths
` [PATCH v2 4/4] hw/core: fix platform bus node name
[RFC PATCH 0/4] riscv: Add basic percpu operations
2022-08-09 2:58 UTC (7+ messages)
` [RFC PATCH 1/4] vmstat: percpu: Rename HAVE_CMPXCHG_LOCAL to HAVE_CMPXCHG_PERCPU_BYTE
` [RFC PATCH 2/4] arm64: percpu: Use generic PERCPU_RW_OPS
` [RFC PATCH 3/4] riscv: percpu: Implement this_cpu operations
` [RFC PATCH 4/4] riscv: cmpxchg: Remove unused cmpxchg(64)_local
[PATCH 0/5] QEMU: Fix RISC-V virt & spike machines' dtbs
2022-08-08 20:53 UTC (16+ messages)
` [PATCH 1/5] target/riscv: Ignore the S and U letters when formatting ISA strings
` [PATCH 2/5] hw/riscv: virt: fix uart node name
` [PATCH 3/5] hw/riscv: virt: Fix the plic's address cells
` [PATCH 4/5] hw/riscv: virt: fix syscon subnode paths
` [PATCH 5/5] hw/core: fix platform bus node name
[GIT PULL] RISC-V Patches for the 5.20 Merge Window, Part 1
2022-08-08 14:36 UTC (5+ messages)
[PATCH v7 0/4] Add Sstc extension support
2022-08-08 8:57 UTC (5+ messages)
` [PATCH v7 3/4] RISC-V: Prefer sstc extension if available
[PATCH] asm-generic: unistd.h: make 'compat_sys_fadvise64_64' conditional
2022-08-08 8:06 UTC (4+ messages)
[PATCH] MAINTAINERS: add PolarFire SoC dt bindings
2022-08-08 8:03 UTC (2+ messages)
[PATCH V9 00/15] arch: Add qspinlock support and atomic cleanup
2022-08-08 7:25 UTC (17+ messages)
` [PATCH V9 01/15] asm-generic: ticket-lock: Remove unnecessary atomic_read
` [PATCH V9 02/15] asm-generic: ticket-lock: Use the same struct definitions with qspinlock
` [PATCH V9 03/15] asm-generic: ticket-lock: Move into ticket_spinlock.h
` [PATCH V9 04/15] asm-generic: ticket-lock: Keep ticket-lock the same semantic with qspinlock
` [PATCH V9 05/15] asm-generic: spinlock: Add queued spinlock support in common header
` [PATCH V9 06/15] riscv: atomic: Clean up unnecessary acquire and release definitions
` [PATCH V9 07/15] riscv: cmpxchg: Remove xchg32 and xchg64
` [PATCH V9 08/15] riscv: cmpxchg: Forbid arch_cmpxchg64 for 32-bit
` [PATCH V9 09/15] riscv: cmpxchg: Optimize cmpxchg64
` [PATCH V9 10/15] riscv: Enable ARCH_INLINE_READ*/WRITE*/SPIN*
` [PATCH V9 11/15] riscv: Add qspinlock support
` [PATCH V9 12/15] riscv: Add combo spinlock support
` [PATCH V9 13/15] openrisc: cmpxchg: Cleanup unnecessary codes
` [PATCH V9 14/15] openrisc: Move from ticket-lock to qspinlock
` [PATCH V9 15/15] csky: spinlock: Use the generic header files
[PATCH 0/3] MPFS mailbox fixes
2022-08-08 7:01 UTC (6+ messages)
` [PATCH 1/3] dt-bindings: mailbox: fix the mpfs' reg property
` [PATCH 2/3] mailbox: mpfs: fix handling of the "
` [PATCH 3/3] mailbox: mpfs: account for mbox offsets while sending
[PATCH v2] kernel/sys_ni: add compat entry for fadvise64_64
2022-08-08 6:57 UTC (2+ messages)
[PATCH] riscv: compat: make __ARCH_WANT_COMPAT_FADVISE64_64 conditional
2022-08-07 19:40 UTC (2+ messages)
[PATCH] spi: microchip-core: Simplify some error message
2022-08-05 21:49 UTC (2+ messages)
[PATCH v7 0/4] Microchip soft ip corePWM driver
2022-08-05 20:01 UTC (10+ messages)
` [PATCH v7 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells
` [PATCH v7 2/4] riscv: dts: fix the icicle's #pwm-cells
` [PATCH v7 3/4] pwm: add microchip soft ip corePWM driver
DT schema warnings on Risc-V virt machine
2022-08-05 17:54 UTC (4+ messages)
[PATCH v5 00/13] Canaan devicetree fixes
2022-08-05 17:51 UTC (3+ messages)
[PATCH v2] riscv: ensure cpu_ops_sbi is declared
2022-08-05 17:45 UTC (2+ messages)
Investment Opportunity
2022-08-05 9:37 UTC
[Crash-utility][PATCH V2 0/9] Support RISCV64 arch and common commands
2022-08-05 6:19 UTC (12+ messages)
` [Crash-utility][PATCH V2 1/9] Add RISCV64 framework code support
` [Crash-utility][PATCH V2 2/9] RISCV64: Make crash tool enter command line and support some commands
` [Crash-utility][PATCH V2 3/9] RISCV64: Add 'dis' command support
` [Crash-utility][PATCH V2 4/9] RISCV64: Add 'irq' "
` [Crash-utility][PATCH V2 5/9] RISCV64: Add 'bt' "
` [Crash-utility][PATCH V2 6/9] RISCV64: Add 'help -r' "
` [Crash-utility][PATCH V2 7/9] RISCV64: Add 'help -m/M' "
` [Crash-utility][PATCH V2 8/9] RISCV64: Add 'mach' "
` [Crash-utility][PATCH V2 9/9] RISCV64: Add the implementation of symbol verify
[PATCH] dt-bindings: riscv: fix SiFive l2-cache's cache-sets
2022-08-04 10:26 UTC (2+ messages)
[PATCH v7 4/4] riscv: implement cache-management errata for T-Head SoCs
2022-08-04 8:16 UTC (3+ messages)
[syzbot] riscv/fixes test error: lost connection to test machine
2022-08-04 5:35 UTC (7+ messages)
[PATCH V2] uapi: Fixup strace compile error
2022-08-04 2:54 UTC
[PATCH] uapi: Fixup strace compile error
2022-08-04 2:12 UTC (7+ messages)
[PATCH v4] dt-bindings: gpio: sifive: add gpio-line-names
2022-08-03 15:55 UTC
[PATCH 00/36] cpuidle,rcu: Cleanup the mess
2022-07-30 23:45 UTC (13+ messages)
` [PATCH 04/36] cpuidle,intel_idle: Fix CPUIDLE_FLAG_IRQ_ENABLE
[PATCH v8 00/31] Rust support
2022-08-02 17:46 UTC (9+ messages)
` [PATCH v8 27/31] Kbuild: add "
[Crash-utility][PATCH 0/8] Support RISCV64 arch and common commands
2022-08-01 4:35 UTC (12+ messages)
` [Crash-utility][PATCH 1/8] Add RISCV64 framework code support
[PATCH] selftests/seccomp: Check CAP_SYS_ADMIN capability in the test mode_filter_without_nnp
2022-07-31 9:25 UTC
[PATCH v3 0/1] Add Polarfire SoC GPIO support
2022-07-31 8:56 UTC (4+ messages)
` [PATCH v3 1/1] gpio: mpfs: add polarfire soc gpio support
[GIT PULL] A Single RISC-V Fix for 5.19
2022-07-29 18:35 UTC (2+ messages)
[GIT PULL] KVM/riscv changes for 5.20
2022-07-29 14:14 UTC (2+ messages)
[PATCH] riscv: enable software resend of irqs
2022-07-29 11:11 UTC
Biznesowy angielski
2022-07-29 7:29 UTC
[PATCH v4 05/17] dt-bindings: PCI: dwc: Stop selecting generic bindings by default
2022-07-28 22:37 UTC (2+ messages)
[PATCH] doc: RISC-V: Document that misaligned accesses are supported
2022-07-28 21:07 UTC
[PATCH 1/7] pwm: sifive: Simplify offset calculation for PWMCMP registers
2022-07-28 17:45 UTC (9+ messages)
` [PATCH 6/7] pwm: sifive: Ensure the clk is enabled exactly one per running PWM
` [PATCH 7/7] pwm: sifive: Shut down hardware only after pwmchip_remove() completed
[PATCH V8 07/10] riscv: Add qspinlock support
2022-07-28 8:34 UTC (5+ messages)
[PATCH V8 02/10] asm-generic: ticket-lock: Use the same struct definitions with qspinlock
2022-07-27 19:20 UTC (2+ messages)
[PATCH 0/6] Add support for Renesas RZ/Five SoC
2022-07-27 15:43 UTC (17+ messages)
` [PATCH 1/6] dt-bindings: arm: renesas: Ignore the schema for RISC-V arch
` [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK
[PATCH v2 0/2] Improve CLOCK_EVT_FEAT_C3STOP feature setting
2022-07-27 15:26 UTC (13+ messages)
` [PATCH v2 1/2] dt-bindings: riscv: Add optional DT property riscv,timer-can-wake-cpu
` [PATCH v2 2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property
[PATCH v3 0/2] Fix SiFive dt-schema errors
2022-07-27 15:23 UTC (3+ messages)
` [PATCH v3 2/2] dt-bindings: sifive: add gpio-line-names
[PATCH v2] RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output
2022-07-27 11:53 UTC (5+ messages)
page: next (older) | prev (newer) | latest
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).