messages from 2022-10-03 07:46:18 to 2022-10-07 05:35:05 UTC [more...]
[PATCH v2 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt
2022-10-07 5:34 UTC (3+ messages)
[PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache
2022-10-07 3:51 UTC (3+ messages)
[PATCH] riscv: enable THP_SWAP for RV64
2022-10-07 3:05 UTC (4+ messages)
[PATCH 3/3] EDAC/sifive: use sifive_ccache instead of sifive_l2
2022-10-07 2:58 UTC (2+ messages)
[PATCH] RISC-V: Add STACKLEAK erasing the kernel stack at the end of syscalls
2022-10-07 2:31 UTC (2+ messages)
[PATCH] drivers/perf: riscv_pmu_sbi: add perf_user_access sysctl
2022-10-07 2:26 UTC (2+ messages)
[PATCH 0/8] riscv: improve boot time isa extensions handling
2022-10-06 17:44 UTC (19+ messages)
` [PATCH 1/8] riscv: move riscv_noncoherent_supported() out of ZICBOM probe
` [PATCH 2/8] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier
` [PATCH 3/8] riscv: hwcap: make ISA extension ids can be used in asm
` [PATCH 4/8] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions
` [PATCH 5/8] riscv: introduce riscv_has_extension_[un]likely()
` [PATCH 6/8] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
` [PATCH 7/8] riscv: cpu_relax: switch "
` [PATCH 8/8] riscv: remove riscv_isa_ext_keys[] array and related usage
[PATCH] riscv: mmap with PROT_WRITE but no PROT_READ is invalid
2022-10-06 20:03 UTC (7+ messages)
[PATCH v6 0/4] riscv, mm: detect svnapot cpu support at runtime
2022-10-06 19:47 UTC (10+ messages)
` [PATCH v6 1/4] riscv: mm: modify pte format for Svnapot
` [PATCH v6 2/4] riscv: mm: support Svnapot in physical page linear-mapping
` [PATCH v6 3/4] riscv: mm: support Svnapot in hugetlb page
` [PATCH v6 4/4] riscv: mm: support Svnapot in huge vmap
[PATCH v4 0/2] riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
2022-10-06 19:20 UTC (7+ messages)
` [PATCH 1/2] RISC-V: Cache SBI vendor values
` [PATCH 2/2] drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
[PATCH 0/2] (attempt to) Fix RISC-V toolchain extension support detection
2022-10-06 18:07 UTC (5+ messages)
` [PATCH 1/2] riscv: fix detection of toolchain Zicbom support
` [PATCH 2/2] riscv: fix detection of toolchain Zihintpause support
[PATCH] riscv: fix multi-letter extension compare
2022-10-06 16:10 UTC (2+ messages)
[RFC PATCH v2 0/2] AX45MP: Add support to non-coherent DMA
2022-10-06 15:36 UTC (25+ messages)
` [RFC PATCH v2 1/2] dt-bindings: soc: renesas: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller
` [RFC PATCH v2 2/2] soc: renesas: Add L2 cache management for RZ/Five SoC
[PATCH] riscv: jump_label: mark arguments as const to satisfy asm constraints
2022-10-06 12:44 UTC (3+ messages)
[PATCH v1 1/1] riscv: mm: call best_map_size many times during linear-mapping
2022-10-06 12:28 UTC (2+ messages)
[PATCH v1 00/30] Basic StarFive JH7110 RISC-V SoC support
2022-10-06 9:07 UTC (34+ messages)
` [PATCH v1 04/30] dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs
` [PATCH v1 05/30] soc: sifive: l2 cache: Convert to platform driver
` [PATCH v1 09/30] reset: starfive: jh7100: Move necessary properties to device tree
` [PATCH v1 15/30] clk: starfive: Use regmap APIs to operate registers
` [PATCH v1 22/30] pinctrl: Create subdirectory for StarFive drivers
` [PATCH v1 23/30] pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
` [PATCH v1 26/30] pinctrl: starfive: Add StarFive JH7110 driver
` [PATCH v1 27/30] RISC-V: Add initial StarFive JH7110 device tree
[PATCH v6 RESEND 0/2] use static key to optimize pgtable_l4_enabled
2022-10-06 8:37 UTC (3+ messages)
[PATCH] riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
2022-10-06 6:48 UTC (18+ messages)
[PATCH] RISC-V: Print SSTC in canonical order
2022-10-06 2:35 UTC (2+ messages)
[PATCH] riscv: compat: s/failed/unsupported if compat mode isn't supported
2022-10-06 2:35 UTC (2+ messages)
[PATCH -next 0/2] riscv: ptrace: implement PTRACE_{PEEK,POKE}USR
2022-10-06 1:26 UTC (2+ messages)
[PATCH v6 0/7] KVM: selftests: Implement ucall "pool" (for SEV)
2022-10-06 0:34 UTC (8+ messages)
` [PATCH v6 1/7] KVM: selftests: Consolidate common code for populating ucall struct
` [PATCH v6 2/7] KVM: selftests: Consolidate boilerplate code in get_ucall()
` [PATCH v6 3/7] KVM: selftests: Automatically do init_ucall() for non-barebones VMs
` [PATCH v6 4/7] tools: Add atomic_test_and_set_bit()
` [PATCH v6 5/7] KVM: selftests: Make arm64's MMIO ucall multi-VM friendly
` [PATCH v6 6/7] KVM: selftest: Drop now-unnecessary ucall_uninit()
` [PATCH v6 7/7] KVM: selftests: Add ucall pool based implementation
[PATCH 0/6] RISC-V: stop selecting device drivers in Kconfig.socs
2022-10-05 17:13 UTC (7+ messages)
` [PATCH 1/6] clk: sifive: select by default if SOC_SIFIVE
` [PATCH 2/6] serial: "
` [PATCH 3/6] serial: sifive: select by default if SOC_CANAAN
` [PATCH 4/6] riscv: stop selecting the PolarFire SoC clock driver
` [PATCH 5/6] riscv: stop selecting SiFive clock and serial drivers directly
` [PATCH 6/6] riscv: stop directly selecting drivers for SOC_CANAAN
Regarding the changes on /proc/cpuinfo for ISA strings
2022-10-05 16:48 UTC (2+ messages)
[PATCH v5 0/4] riscv, mm: detect svnapot cpu support at runtime
2022-10-05 14:54 UTC (26+ messages)
` [PATCH v5 1/4] mm: modify pte format for Svnapot
` [PATCH v5 2/4] mm: support Svnapot in physical page linear-mapping
` [PATCH v5 3/4] mm: support Svnapot in hugetlb page
` [PATCH v5 4/4] mm: support Svnapot in huge vmap
[PATCH v1] riscv: bring up batched unmap tlb flush
2022-10-05 14:43 UTC
[PATCH] riscv/vdso: fix missing vdso_data declaration
2022-10-05 14:13 UTC (4+ messages)
[PATCH v2] RISC-V: build: Allow LTO to be selected
2022-10-05 2:19 UTC (3+ messages)
[PATCH v3] RISC-V: Increase range and default value of NR_CPUS
2022-10-04 23:53 UTC (2+ messages)
[PATCH v2 00/44] cpuidle,rcu: Clean up the mess
2022-10-04 17:19 UTC (15+ messages)
` [PATCH v2 12/44] cpuidle,dt: Push RCU-idle into driver
` [PATCH v2 14/44] cpuidle,cpu_pm: Remove RCU fiddling from cpu_pm_{enter,exit}()
` [PATCH v2 23/44] arm,smp: Remove trace_.*_rcuidle() usage
` [PATCH v2 33/44] ftrace: WARN on rcuidle
` [PATCH v2 38/44] cpuidle,powerdomain: Remove trace_.*_rcuidle()
` [PATCH v2 39/44] cpuidle,clk: "
[PATCH v3 0/4] riscv: entry: further clean up and VMAP_STACK fix
2022-10-04 16:04 UTC (7+ messages)
` [PATCH v3 1/4] riscv: process: fix kernel info leakage
` [PATCH v3 2/4] riscv: consolidate ret_from_kernel_thread into ret_from_fork
` [PATCH v3 3/4] riscv: fix race when vmap stack overflow and remove shadow_stack
` [PATCH v3 4/4] riscv: entry: consolidate general regs saving/restoring
[PATCH v5 0/7] Use composable cache instead of L2 cache
2022-10-04 14:20 UTC (3+ messages)
[PATCH v5 3/3] tty: serial: use uart_port_tx_limited()
2022-10-04 11:22 UTC (2+ messages)
[PATCH v3 0/3] Enable initial support for StarFive VisionFive V1 SBC
2022-10-04 10:15 UTC (4+ messages)
[PATCH v2] RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo output
2022-10-04 4:35 UTC (5+ messages)
[PATCH v6 0/3] RISC-V: Create unique identification for SoC PMU
2022-10-04 2:54 UTC (2+ messages)
[GIT PULL] KVM/riscv changes for 6.1
2022-10-03 19:34 UTC (2+ messages)
[PATCH] lib/Kconfig.debug: Add check for non-constant .{s,u}leb128 support to DWARF5
2022-10-03 16:10 UTC (3+ messages)
[PATCH V6 00/11] riscv: Add GENERIC_ENTRY support and related features
2022-10-03 11:40 UTC (7+ messages)
` [PATCH V6 04/11] compiler_types.h: Add __noinstr_section() for noinstr
` [PATCH V6 05/11] riscv: traps: Add noinstr to prevent instrumentation inserted
` [PATCH V6 09/11] riscv: Add support for STACKLEAK gcc plugin
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