* [PATCH] RISC-V: Print SSTC in canonical order
@ 2022-09-20 20:45 Palmer Dabbelt
2022-09-20 22:08 ` Conor Dooley
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2022-09-20 20:45 UTC (permalink / raw)
To: linux-riscv; +Cc: Palmer Dabbelt
This got out of order during a merge conflict, fix it by putting the
entries in the correct order.
Fixes: 7ab52f75a9cf ("RISC-V: Add Sstc extension support")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/kernel/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 0be8a2403212..87455d12970f 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -92,10 +92,10 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
*/
static struct riscv_isa_ext_data isa_ext_arr[] = {
__RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
+ __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
__RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
__RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
- __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
__RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
};
--
2.34.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Print SSTC in canonical order
2022-09-20 20:45 [PATCH] RISC-V: Print SSTC in canonical order Palmer Dabbelt
@ 2022-09-20 22:08 ` Conor Dooley
2022-09-21 17:50 ` Heiko Stübner
2022-10-06 2:35 ` Palmer Dabbelt
2 siblings, 0 replies; 4+ messages in thread
From: Conor Dooley @ 2022-09-20 22:08 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: linux-riscv
On Tue, Sep 20, 2022 at 01:45:18PM -0700, Palmer Dabbelt wrote:
> This got out of order during a merge conflict, fix it by putting the
> entries in the correct order.
>
> Fixes: 7ab52f75a9cf ("RISC-V: Add Sstc extension support")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
My OCD is a fan of this patch, so on that basis:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> arch/riscv/kernel/cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 0be8a2403212..87455d12970f 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -92,10 +92,10 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
> */
> static struct riscv_isa_ext_data isa_ext_arr[] = {
> __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
> + __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
> __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
> __RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
> __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
> - __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
> __RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
> };
>
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Print SSTC in canonical order
2022-09-20 20:45 [PATCH] RISC-V: Print SSTC in canonical order Palmer Dabbelt
2022-09-20 22:08 ` Conor Dooley
@ 2022-09-21 17:50 ` Heiko Stübner
2022-10-06 2:35 ` Palmer Dabbelt
2 siblings, 0 replies; 4+ messages in thread
From: Heiko Stübner @ 2022-09-21 17:50 UTC (permalink / raw)
To: linux-riscv; +Cc: Palmer Dabbelt, Palmer Dabbelt
Am Dienstag, 20. September 2022, 22:45:18 CEST schrieb Palmer Dabbelt:
> This got out of order during a merge conflict, fix it by putting the
> entries in the correct order.
>
> Fixes: 7ab52f75a9cf ("RISC-V: Add Sstc extension support")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Print SSTC in canonical order
2022-09-20 20:45 [PATCH] RISC-V: Print SSTC in canonical order Palmer Dabbelt
2022-09-20 22:08 ` Conor Dooley
2022-09-21 17:50 ` Heiko Stübner
@ 2022-10-06 2:35 ` Palmer Dabbelt
2 siblings, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2022-10-06 2:35 UTC (permalink / raw)
To: linux-riscv
On Tue, 20 Sep 2022 13:45:18 PDT (-0700), Palmer Dabbelt wrote:
> This got out of order during a merge conflict, fix it by putting the
> entries in the correct order.
>
> Fixes: 7ab52f75a9cf ("RISC-V: Add Sstc extension support")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
> arch/riscv/kernel/cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 0be8a2403212..87455d12970f 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -92,10 +92,10 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
> */
> static struct riscv_isa_ext_data isa_ext_arr[] = {
> __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
> + __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
> __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
> __RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
> __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
> - __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
> __RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
> };
This is on for-next -- jumping the queue a bit, but I'm looking at the
Svnapot patches right now and those also add an entry in the wrong order
so I figure it's best to just fix that during the merge.
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2022-09-20 20:45 [PATCH] RISC-V: Print SSTC in canonical order Palmer Dabbelt
2022-09-20 22:08 ` Conor Dooley
2022-09-21 17:50 ` Heiko Stübner
2022-10-06 2:35 ` Palmer Dabbelt
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