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From: Sagar Kadam <sagar.kadam@sifive.com>
To: marek.vasut@gmail.com, tudor.ambarus@microchip.com,
	dwmw2@infradead.org,  computersforpeace@gmail.com,
	miquel.raynal@bootlin.com, richard@nod.at,
	 Vignesh Raghavendra <vigneshr@ti.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Palmer Dabbelt <palmer@sifive.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-mtd@lists.infradead.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v7 0/4] mtd: spi-nor: add support for is25wp256 spi-nor flash
Date: Mon, 15 Jul 2019 16:15:29 +0530	[thread overview]
Message-ID: <CAARK3HkMz3AdcVyrteGmqczCaMDTYS1h9uALspm75RFE9c6jFQ@mail.gmail.com> (raw)
In-Reply-To: <1562092745-11541-1-git-send-email-sagar.kadam@sifive.com>

On Wed, Jul 3, 2019 at 12:10 AM Sagar Shrikant Kadam
<sagar.kadam@sifive.com> wrote:
>
> The patch series adds support for 32MiB spi-nor is25wp256 present on HiFive
> Unleashed A00 board. The flash device gets BFPT_DWORD1_ADDRESS_BYTES_3_ONLY
> from BFPT table for address width, whereas the flash can support 4 byte
> address width, so the address width is configured by using the post bfpt
> fixup hook as done for is25lp256 device in
> commit cf580a924005 ("mtd: spi-nor: fix nor->addr_width when its value
> configured from SFDP does not match the actual width") queued in
> spi-nor/next branch [1].
>
> Patches 1 and 3 are based on original work done by Wesley Terpstra and/or
> Palmer Dabbelt:
> https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
>
> Erase/Read/Write operations are verified on HiFive Unleashed board using  mtd and
> flash utils (v1.5.2):
> 1. mtd_debug    : Options available are : erase/read/write.
> 2. flashcp      : Single utility that erases flash, writes a file to flash and verifies the data back.
> 3. flash_unlock : Unlock flash memory blocks. Arguments: are offset and number of blocks.
> 3. flash_lock   : Lock flash memory blocks. Arguments: are offset and number of blocks.
>
> The Unlock scheme clears the protection bits of all blocks in the Status register.
>
> Lock scheme:
> A basic implementation based on the stm_lock scheme and is validated for a different
> number of blocks passed to flash_lock. ISSI devices have top/bottom area selection
> in function register which is OTP memory. so we are not updating the OTP section
> of function register.
>
> The changes along are available under branch v5.2-rc1-mtd-spi-nor/next at:
> https://github.com/sagsifive/riscv-linux-hifive
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git/log/?h=spi-nor/next
>
> Revision history:
> V6<->V7:
> -Incorporated review comments from Vignesh.
> -Used post bfpt fixup hook as suggested by Vignesh.
> -Introduce SPI_NOR_HAS_BP3 to identify whether the flash has 4th bit protect bit.
> -Prefix generic flash access functions with spi_nor_xxxx.
>
> V5<->V6:
> -Incorporated review comments from Vignesh.
> -Set addr width based on device size and if SPI_NOR_4B_OPCODES is set.
> -Added 4th block protect identifier (SPI_NOR_HAS_BP3) to flash_info structure
> -Changed flash_info: flag from u16 to u32 to accommodate SPI_NOR_HAS_BP3
> -Prefix newly added function with spi_nor_xxx.
> -Dropped write_fr function, as updating OTP bit's present in function register doesn't seem to be a good idea.
> -Set lock/unlock schemes based on whether the ISSI device has locking support and  BP3 bit present.
>
> V4<->V5:
> -Rebased to linux version v5.2-rc1.
> -Updated heading of this cover letter with sub-system, instead of just plain "add support for is25wp256..."
>
> V3<->V4:
> -Extracted comman code and renamed few stm functions so that it can be reused for issi lock implementation.
> -Added function's to read and write FR register, for selecting Top/Bottom area.
>
> V2<->V3:
> -Rebased patch to mainline v5.1 from earlier v5.1-rc5.
> -Updated commit messages, and cover letter with reference to git URL and author information.
> -Deferred flash_lock mechanism and can go as separate patch.
>
> V1<-> V2:
> -Incorporated changes suggested by reviewers regarding patch/cover letter versioning, references of patch.
> -Updated cover letter with description for flash operations verified with these changes.
> -Add support for unlocking is25xxxxxx device.
> -Add support for locking is25xxxxxx device.
>
> v1:
> -Add support for is25wp256 device.
>
> Sagar Shrikant Kadam (4):
>   mtd: spi-nor: add support for is25wp256
>   mtd: spi-nor: fix nor->addr_width for is25wp256
>   mtd: spi-nor: add support to unlock the flash device
>   mtd: spi-nor: add locking support for is25wp256 device
>
>  drivers/mtd/spi-nor/spi-nor.c | 343 +++++++++++++++++++++++++++++++++++-------
>  include/linux/mtd/spi-nor.h   |   8 +
>  2 files changed, 300 insertions(+), 51 deletions(-)
>
> --
> 1.9.1
>

Hi All,

Any comments on this series?

BR,
Sagar Kadam

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  parent reply	other threads:[~2019-07-15 10:45 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-02 18:39 [PATCH v7 0/4] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
2019-07-02 18:39 ` [PATCH v7 1/4] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
2019-08-09 11:34   ` Vignesh Raghavendra
2019-07-02 18:39 ` [PATCH v7 2/4] mtd: spi-nor: fix nor->addr_width " Sagar Shrikant Kadam
2019-08-09 11:35   ` Vignesh Raghavendra
2019-08-09 14:25     ` Sagar Kadam
2019-07-02 18:39 ` [PATCH v7 3/4] mtd: spi-nor: add support to unlock the flash device Sagar Shrikant Kadam
2019-07-02 18:39 ` [PATCH v7 4/4] mtd: spi-nor: add locking support for is25wp256 device Sagar Shrikant Kadam
2019-08-09 11:27   ` Vignesh Raghavendra
2019-08-09 14:23     ` Sagar Kadam
2019-07-15 10:45 ` Sagar Kadam [this message]
2019-07-15 11:05   ` [PATCH v7 0/4] mtd: spi-nor: add support for is25wp256 spi-nor flash Tudor.Ambarus
2019-07-15 11:31     ` Sagar Kadam

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