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From: Anup Patel <anup@brainfault.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: "Patrick Stählin" <me@packi.ch>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Alan Kao" <alankao@andestech.com>,
	"Dmitriy Cherkasov" <dmitriy@oss-tech.org>,
	"Andreas Schwab" <schwab@suse.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	"Michael Clark" <michaeljclark@mac.com>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Palmer Dabbelt" <palmer@sifive.com>,
	linux-riscv@lists.infradead.org,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Zong Li" <zongbox@gmail.com>
Subject: Re: [PATCH v2 7/8] RISC-V: Check and continue in case of an invalid cpuid.
Date: Tue, 8 Jan 2019 17:29:43 +0530	[thread overview]
Message-ID: <CAAhSdy17H_XpDea9bowUoinVmb17p8+ZAzZ7cyFuDfFDJ-LwaA@mail.gmail.com> (raw)
In-Reply-To: <1546940318-9752-8-git-send-email-atish.patra@wdc.com>

Prefer, commit prefix "irqchip/irq-sifive-plic:" instead of "RISC-V:"

On Tue, Jan 8, 2019 at 3:08 PM Atish Patra <atish.patra@wdc.com> wrote:
>
> riscv_hartid_to_cpuid can return invalid cpuid for a hart
> that is present in DT but was never brought up.
>
> Print the appropriate warning message and continue.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  drivers/irqchip/irq-sifive-plic.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index 357e9daf..254ecd76 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -237,6 +237,11 @@ static int __init plic_init(struct device_node *node,
>                 }
>
>                 cpu = riscv_hartid_to_cpuid(hartid);
> +               if (cpu < 0) {
> +                       pr_warn("Invalid cpuid for context %d\n", i);
> +                       continue;
> +               }
> +
>                 handler = per_cpu_ptr(&plic_handlers, cpu);
>                 handler->present = true;
>                 handler->ctxid = i;
> --
> 2.7.4
>

Otherwise, looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

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  reply	other threads:[~2019-01-08 12:00 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08  9:38 [PATCH v2 0/8] Various SMP related fixes Atish Patra
2019-01-08  9:38 ` [PATCH v2 1/8] RISC-V: Do not wait indefinitely in __cpu_up Atish Patra
2019-01-15 13:51   ` Christoph Hellwig
2019-01-18  2:35     ` Atish Patra
2019-01-18  7:20       ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 2/8] RISC-V: Move cpuid to hartid mapping to SMP Atish Patra
2019-01-15 13:52   ` Christoph Hellwig
2019-01-18  2:08     ` Atish Patra
2019-01-08  9:38 ` [PATCH v2 3/8] RISC-V: Remove NR_CPUs check during hartid search from DT Atish Patra
2019-01-08 11:48   ` Anup Patel
2019-01-15 13:52   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 4/8] RISC-V: Allow hartid-to-cpuid function to fail Atish Patra
2019-01-08 11:49   ` Anup Patel
2019-01-15 13:53   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping Atish Patra
2019-01-08 11:49   ` Anup Patel
2019-01-15 13:53   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 6/8] RISC-V: Add required checks during clock source init Atish Patra
2019-01-08 11:56   ` Anup Patel
2019-01-18  2:10     ` Atish Patra
2019-01-15 13:54   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 7/8] RISC-V: Check and continue in case of an invalid cpuid Atish Patra
2019-01-08 11:59   ` Anup Patel [this message]
2019-01-18  2:10     ` Atish Patra
2019-01-15 13:55   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 8/8] RISC-V: Assign hwcap only according to current cpu Atish Patra
2019-01-08 10:33   ` Atish Patra
2019-01-08 12:01   ` Anup Patel
2019-01-15 13:56   ` Christoph Hellwig
2019-01-18  2:13     ` Atish Patra

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