linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: "Patrick Stählin" <me@packi.ch>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Alan Kao" <alankao@andestech.com>,
	"Dmitriy Cherkasov" <dmitriy@oss-tech.org>,
	"Andreas Schwab" <schwab@suse.de>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	"Michael Clark" <michaeljclark@mac.com>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Palmer Dabbelt" <palmer@sifive.com>,
	linux-riscv@lists.infradead.org,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Zong Li" <zongbox@gmail.com>
Subject: Re: [PATCH v2 8/8] RISC-V: Assign hwcap only according to current cpu.
Date: Tue, 8 Jan 2019 17:31:38 +0530	[thread overview]
Message-ID: <CAAhSdy1_5ULea-2JKYeQd8dAPbnZ+OVM-p=iP5RwWbuiZ5NJJw@mail.gmail.com> (raw)
In-Reply-To: <1546940318-9752-9-git-send-email-atish.patra@wdc.com>

On Tue, Jan 8, 2019 at 3:08 PM Atish Patra <atish.patra@wdc.com> wrote:
>
> Currently, we set hwcap based on first valid cpu from
> DT. This may not be correct always as that CPU might not
> be current booting cpu.
>
> Set hwcap based on the current cpu instead of first
> valid CPU from DT.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  arch/riscv/kernel/cpufeature.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index a6e369ed..ed6122ff 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -43,12 +43,15 @@ void riscv_fill_hwcap(void)
>         elf_hwcap = 0;
>
>         /*
> -        * We don't support running Linux on hertergenous ISA systems.  For
> -        * now, we just check the ISA of the first "okay" processor.
> +        * We don't support running Linux on hertergenous ISA systems.
> +        * But first "okay" processor might not be the boot cpu.
> +        * Check the ISA of boot cpu.
>          */
> -       while ((node = of_find_node_by_type(node, "cpu")))
> -               if (riscv_of_processor_hartid(node) >= 0)
> +       while ((node = of_find_node_by_type(node, "cpu"))) {
> +               if (riscv_of_processor_hartid(node) == boot_cpu_hartid)
>                         break;
> +       }
> +
>         if (!node) {
>                 pr_warning("Unable to find \"cpu\" devicetree entry");
>                 return;
> --
> 2.7.4
>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2019-01-08 12:01 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08  9:38 [PATCH v2 0/8] Various SMP related fixes Atish Patra
2019-01-08  9:38 ` [PATCH v2 1/8] RISC-V: Do not wait indefinitely in __cpu_up Atish Patra
2019-01-15 13:51   ` Christoph Hellwig
2019-01-18  2:35     ` Atish Patra
2019-01-18  7:20       ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 2/8] RISC-V: Move cpuid to hartid mapping to SMP Atish Patra
2019-01-15 13:52   ` Christoph Hellwig
2019-01-18  2:08     ` Atish Patra
2019-01-08  9:38 ` [PATCH v2 3/8] RISC-V: Remove NR_CPUs check during hartid search from DT Atish Patra
2019-01-08 11:48   ` Anup Patel
2019-01-15 13:52   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 4/8] RISC-V: Allow hartid-to-cpuid function to fail Atish Patra
2019-01-08 11:49   ` Anup Patel
2019-01-15 13:53   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping Atish Patra
2019-01-08 11:49   ` Anup Patel
2019-01-15 13:53   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 6/8] RISC-V: Add required checks during clock source init Atish Patra
2019-01-08 11:56   ` Anup Patel
2019-01-18  2:10     ` Atish Patra
2019-01-15 13:54   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 7/8] RISC-V: Check and continue in case of an invalid cpuid Atish Patra
2019-01-08 11:59   ` Anup Patel
2019-01-18  2:10     ` Atish Patra
2019-01-15 13:55   ` Christoph Hellwig
2019-01-08  9:38 ` [PATCH v2 8/8] RISC-V: Assign hwcap only according to current cpu Atish Patra
2019-01-08 10:33   ` Atish Patra
2019-01-08 12:01   ` Anup Patel [this message]
2019-01-15 13:56   ` Christoph Hellwig
2019-01-18  2:13     ` Atish Patra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAAhSdy1_5ULea-2JKYeQd8dAPbnZ+OVM-p=iP5RwWbuiZ5NJJw@mail.gmail.com' \
    --to=anup@brainfault.org \
    --cc=alankao@andestech.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=atish.patra@wdc.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=dmitriy@oss-tech.org \
    --cc=jason@lakedaemon.net \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=marc.zyngier@arm.com \
    --cc=me@packi.ch \
    --cc=michaeljclark@mac.com \
    --cc=palmer@sifive.com \
    --cc=schwab@suse.de \
    --cc=tglx@linutronix.de \
    --cc=zongbox@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).