From: "Björn Töpel" <bjorn.topel@gmail.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: Netdev <netdev@vger.kernel.org>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@sifive.com>,
Daniel Borkmann <daniel@iogearbox.net>,
davidlee@sifive.com
Subject: Re: [RFC PATCH 0/3] RV64G eBPF JIT
Date: Tue, 15 Jan 2019 17:03:18 +0100 [thread overview]
Message-ID: <CAJ+HfNhHUCM_YPUF01s=Tgh-M1_PMF6Jev1PQjwqfgva0vgeLw@mail.gmail.com> (raw)
In-Reply-To: <20190115154012.GG26443@infradead.org>
Den tis 15 jan. 2019 kl 16:40 skrev Christoph Hellwig <hch@infradead.org>:
>
> Hi Björn,
>
> at least for me patch 3 didn't make it to the list.
>
Hmm, held back: "Your message to linux-riscv awaits moderator
approval". Exceeded the 40k limit.
I'll wait until the moderator wakes up (Palmer?).
Björn
> On Tue, Jan 15, 2019 at 09:35:15AM +0100, Björn Töpel wrote:
> > Hi!
> >
> > I've been hacking on a RV64G eBPF JIT compiler, and would like some
> > feedback.
> >
> > Codewise, it needs some refactoring. Currently there's a bit too much
> > copy-and-paste going on, and I know some places where I could optimize
> > the code generation a bit (mostly BPF_K type of instructions, dealing
> > with immediates).
> >
> > From a features perspective, two things are missing:
> >
> > * tail calls
> > * "far-branches", i.e. conditional branches that reach beyond 13b.
> >
> > The test_bpf.ko (only tested on 4.20!) passes all tests.
> >
> > I've done all the tests on QEMU (version 3.1.50), so no real hardware.
> >
> > Some questions/observations:
> >
> > * I've added "HAVE_EFFICIENT_UNALIGNED_ACCESS" to
> > arch/riscv/Kconfig. Is this assumption correct?
> >
> > * emit_imm() just relies on lui, adds and shifts. No fancy xori cost
> > optimizations like GCC does.
> >
> > * Suggestions on how to implement the tail call, given that the
> > prologue/epilogue has variable size. I will dig into the details of
> > mips/arm64/x86. :-)
> >
> > Next steps (prior patch proper) is cleaning up the code, add tail
> > calls, and making sure that bpftool disassembly works correctly.
> >
> > All input are welcome. This is my first RISC-V hack, so I sure there
> > are a lot things to improve!
> >
> >
> > Thanks,
> > Björn
> >
> >
> > Björn Töpel (3):
> > riscv: set HAVE_EFFICIENT_UNALIGNED_ACCESS
> > riscv: add build infra for JIT compiler
> > bpf, riscv: added eBPF JIT for RV64G
> >
> > arch/riscv/Kconfig | 2 +
> > arch/riscv/Makefile | 4 +
> > arch/riscv/net/Makefile | 5 +
> > arch/riscv/net/bpf_jit_comp.c | 1612 +++++++++++++++++++++++++++++++++
> > 4 files changed, 1623 insertions(+)
> > create mode 100644 arch/riscv/net/Makefile
> > create mode 100644 arch/riscv/net/bpf_jit_comp.c
> >
> > --
> > 2.19.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
> ---end quoted text---
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next prev parent reply other threads:[~2019-01-15 16:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-15 8:35 [RFC PATCH 0/3] RV64G eBPF JIT Björn Töpel
2019-01-15 8:35 ` [RFC PATCH 1/3] riscv: set HAVE_EFFICIENT_UNALIGNED_ACCESS Björn Töpel
2019-01-15 15:39 ` Christoph Hellwig
2019-01-15 16:06 ` Björn Töpel
2019-01-25 20:21 ` Palmer Dabbelt
2019-01-26 1:33 ` Jim Wilson
2019-01-29 2:43 ` Palmer Dabbelt
2019-01-15 8:35 ` [RFC PATCH 2/3] riscv: add build infra for JIT compiler Björn Töpel
2019-01-15 15:43 ` Christoph Hellwig
2019-01-15 16:09 ` Björn Töpel
2019-01-15 8:35 ` [RFC PATCH 3/3] bpf, riscv: added eBPF JIT for RV64G Björn Töpel
2019-01-15 23:49 ` Daniel Borkmann
2019-01-16 7:23 ` Björn Töpel
2019-01-16 15:41 ` Daniel Borkmann
2019-01-16 19:06 ` Björn Töpel
2019-01-15 15:40 ` [RFC PATCH 0/3] RV64G eBPF JIT Christoph Hellwig
2019-01-15 16:03 ` Björn Töpel [this message]
2019-01-25 19:02 ` Palmer Dabbelt
2019-01-25 19:54 ` Paul Walmsley
2019-01-27 12:28 ` Björn Töpel
2019-01-30 2:02 ` Palmer Dabbelt
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