[RFC PATCH 0/3] Support using physical addresses for RISC-V CMO

[RFC PATCH 0/3] Support using physical addresses for RISC-V CMO

[Icenowy Zheng]

Despite the official Zicbom extension only supports virtual addresses,
some vendor-specific extensions, e.g. Xtheadcmo, supports using directly
the physical address.

This patchset tries to provide a CMO alternative macro variant that is
feed with both VA and PA (and the used one can be picked at runtime),
implement it with PA on T-Head cores, and utilize this variant for some
situations that PA is easily accessible.

Tested with an LiteX SoC with OpenC906, with LiteSDCard as root device.

This patchset is based on the fix of dcache.cva encoding, which is at [1].
Without that patch applied, this patchset won't apply cleanly.

[1] https://patchwork.kernel.org/project/linux-riscv/patch/20230103062610.69704-1-uwu@icenowy.me/

Icenowy Zheng (3):
  riscv: errata: cmo: add CMO macro variant with both VA and PA
  riscv: use VA+PA variant of CMO macros for DMA synchorization
  riscv: use VA+PA variant of CMO macros for DMA page preparation

 arch/riscv/include/asm/errata_list.h | 30 ++++++++++++++++++++++++++++
 arch/riscv/mm/dma-noncoherent.c      | 11 +++++-----
 2 files changed, 36 insertions(+), 5 deletions(-)

-- 
2.38.1


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[RFC PATCH 1/3] riscv: errata: cmo: add CMO macro variant with both VA and PA

[Icenowy Zheng]

The standardized Zicbom extension supports only VA, however there's some
vendor extensions (e.g. XtheadCmo) that can handle cache management
operations on PA directly, bypassing the TLB lookup.

Add a CMO alternatives macro variant that come with both VA and PA
supplied, and the code can be patched to use either the VA or the PA at
runtime. In this case the codepath is now patched to use VA for Zicbom
and PA for XtheadCmo.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 arch/riscv/include/asm/errata_list.h | 30 ++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index 46adc1c9428f..bf80dd58145e 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -118,6 +118,9 @@ asm volatile(ALTERNATIVE(						\
 #define THEAD_clean_A0	".long 0x0255000b"
 #define THEAD_flush_A0	".long 0x0275000b"
 #define THEAD_SYNC_S	".long 0x0190000b"
+#define THEAD_inval_PA_A0	".long 0x02a5000b"
+#define THEAD_clean_PA_A0	".long 0x0295000b"
+#define THEAD_flush_PA_A0	".long 0x02b5000b"
 
 #define ALT_CMO_OP(_op, _start, _size, _cachesize)			\
 asm volatile(ALTERNATIVE_2(						\
@@ -144,6 +147,33 @@ asm volatile(ALTERNATIVE_2(						\
 	    "r"((unsigned long)(_start) + (_size))			\
 	: "a0")
 
+#define ALT_CMO_OP_VPA(_op, _vaddr, _paddr, _size, _cachesize)		\
+asm volatile(ALTERNATIVE_2(						\
+	__nops(6),							\
+	"mv a0, %1\n\t"							\
+	"j 2f\n\t"							\
+	"3:\n\t"							\
+	"cbo." __stringify(_op) " (a0)\n\t"				\
+	"add a0, a0, %0\n\t"						\
+	"2:\n\t"							\
+	"bltu a0, %2, 3b\n\t"						\
+	"nop", 0, CPUFEATURE_ZICBOM, CONFIG_RISCV_ISA_ZICBOM,		\
+	"mv a0, %3\n\t"							\
+	"j 2f\n\t"							\
+	"3:\n\t"							\
+	THEAD_##_op##_PA_A0 "\n\t"					\
+	"add a0, a0, %0\n\t"						\
+	"2:\n\t"							\
+	"bltu a0, %4, 3b\n\t"						\
+	THEAD_SYNC_S, THEAD_VENDOR_ID,					\
+			ERRATA_THEAD_CMO, CONFIG_ERRATA_THEAD_CMO)	\
+	: : "r"(_cachesize),						\
+	    "r"((unsigned long)(_vaddr) & ~((_cachesize) - 1UL)),	\
+	    "r"((unsigned long)(_vaddr) + (_size)),			\
+	    "r"((unsigned long)(_paddr) & ~((_cachesize) - 1UL)),	\
+	    "r"((unsigned long)(_paddr) + (_size))			\
+	: "a0")
+
 #define THEAD_C9XX_RV_IRQ_PMU			17
 #define THEAD_C9XX_CSR_SCOUNTEROF		0x5c5
 
-- 
2.38.1


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[RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Icenowy Zheng]

DMA synchorization is done on PA and the VA is calculated from the PA.

Use the alternative macro variant that takes both VA and PA as
parameters, thus in case the ISA extension used support PA directly, the
overhead for re-converting VA to PA can be omitted.

Suggested-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 arch/riscv/mm/dma-noncoherent.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index d919efab6eba..a751f4aece62 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 
 	switch (dir) {
 	case DMA_TO_DEVICE:
-		ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
+		ALT_CMO_OP_VPA(clean, vaddr, paddr, size, riscv_cbom_block_size);
 		break;
 	case DMA_FROM_DEVICE:
-		ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
+		ALT_CMO_OP_VPA(clean, vaddr, paddr, size, riscv_cbom_block_size);
 		break;
 	case DMA_BIDIRECTIONAL:
-		ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+		ALT_CMO_OP_VPA(flush, vaddr, paddr, size, riscv_cbom_block_size);
 		break;
 	default:
 		break;
@@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
 		break;
 	case DMA_FROM_DEVICE:
 	case DMA_BIDIRECTIONAL:
-		ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+		ALT_CMO_OP_VPA(flush, vaddr, paddr, size, riscv_cbom_block_size);
 		break;
 	default:
 		break;
-- 
2.38.1


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[RFC PATCH 3/3] riscv: use VA+PA variant of CMO macros for DMA page preparation

[Icenowy Zheng]

When doing DMA page preparation, both the VA and the PA are easily
accessible from struct page.

Use the alternative macro variant that takes both VA and PA as
parameters, thus in case the ISA extension used support PA directly, the
overhead for re-converting VA to PA can be omitted.

Suggested-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 arch/riscv/mm/dma-noncoherent.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index a751f4aece62..0ad0614d1ad4 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -52,8 +52,9 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
 void arch_dma_prep_coherent(struct page *page, size_t size)
 {
 	void *flush_addr = page_address(page);
+	phys_addr_t paddr = PFN_PHYS(page_to_pfn(page));
 
-	ALT_CMO_OP(flush, flush_addr, size, riscv_cbom_block_size);
+	ALT_CMO_OP_VPA(flush, flush_addr, paddr, size, riscv_cbom_block_size);
 }
 
 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
-- 
2.38.1


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Re: [RFC PATCH 1/3] riscv: errata: cmo: add CMO macro variant with both VA and PA

[Guo Ren]

Thx for the patch! It's nice.

Reviewed-by: Guo Ren <guoren@kernel.org>

On Wed, Jan 4, 2023 at 3:42 PM Icenowy Zheng <uwu@icenowy.me> wrote:
>
> The standardized Zicbom extension supports only VA, however there's some
> vendor extensions (e.g. XtheadCmo) that can handle cache management
> operations on PA directly, bypassing the TLB lookup.
>
> Add a CMO alternatives macro variant that come with both VA and PA
> supplied, and the code can be patched to use either the VA or the PA at
> runtime. In this case the codepath is now patched to use VA for Zicbom
> and PA for XtheadCmo.
>
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  arch/riscv/include/asm/errata_list.h | 30 ++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 46adc1c9428f..bf80dd58145e 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -118,6 +118,9 @@ asm volatile(ALTERNATIVE(                                           \
>  #define THEAD_clean_A0 ".long 0x0255000b"
>  #define THEAD_flush_A0 ".long 0x0275000b"
>  #define THEAD_SYNC_S   ".long 0x0190000b"
> +#define THEAD_inval_PA_A0      ".long 0x02a5000b"
> +#define THEAD_clean_PA_A0      ".long 0x0295000b"
> +#define THEAD_flush_PA_A0      ".long 0x02b5000b"
>
>  #define ALT_CMO_OP(_op, _start, _size, _cachesize)                     \
>  asm volatile(ALTERNATIVE_2(                                            \
> @@ -144,6 +147,33 @@ asm volatile(ALTERNATIVE_2(                                                \
>             "r"((unsigned long)(_start) + (_size))                      \
>         : "a0")
>
> +#define ALT_CMO_OP_VPA(_op, _vaddr, _paddr, _size, _cachesize)         \
> +asm volatile(ALTERNATIVE_2(                                            \
> +       __nops(6),                                                      \
> +       "mv a0, %1\n\t"                                                 \
> +       "j 2f\n\t"                                                      \
> +       "3:\n\t"                                                        \
> +       "cbo." __stringify(_op) " (a0)\n\t"                             \
> +       "add a0, a0, %0\n\t"                                            \
> +       "2:\n\t"                                                        \
> +       "bltu a0, %2, 3b\n\t"                                           \
> +       "nop", 0, CPUFEATURE_ZICBOM, CONFIG_RISCV_ISA_ZICBOM,           \
> +       "mv a0, %3\n\t"                                                 \
> +       "j 2f\n\t"                                                      \
> +       "3:\n\t"                                                        \
> +       THEAD_##_op##_PA_A0 "\n\t"                                      \
> +       "add a0, a0, %0\n\t"                                            \
> +       "2:\n\t"                                                        \
> +       "bltu a0, %4, 3b\n\t"                                           \
> +       THEAD_SYNC_S, THEAD_VENDOR_ID,                                  \
> +                       ERRATA_THEAD_CMO, CONFIG_ERRATA_THEAD_CMO)      \
> +       : : "r"(_cachesize),                                            \
> +           "r"((unsigned long)(_vaddr) & ~((_cachesize) - 1UL)),       \
> +           "r"((unsigned long)(_vaddr) + (_size)),                     \
> +           "r"((unsigned long)(_paddr) & ~((_cachesize) - 1UL)),       \
> +           "r"((unsigned long)(_paddr) + (_size))                      \
> +       : "a0")
> +
>  #define THEAD_C9XX_RV_IRQ_PMU                  17
>  #define THEAD_C9XX_CSR_SCOUNTEROF              0x5c5
>
> --
> 2.38.1
>


-- 
Best Regards
 Guo Ren

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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Guo Ren]

On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me> wrote:
>
> DMA synchorization is done on PA and the VA is calculated from the PA.
>
> Use the alternative macro variant that takes both VA and PA as
> parameters, thus in case the ISA extension used support PA directly, the
> overhead for re-converting VA to PA can be omitted.
>
> Suggested-by: Guo Ren <guoren@kernel.org>
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
> index d919efab6eba..a751f4aece62 100644
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
>
>         switch (dir) {
>         case DMA_TO_DEVICE:
> -               ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
> +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size, riscv_cbom_block_size);
ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?

Others:
Reviewed-by: Guo Ren <guoren@kernel.org>

>                 break;
>         case DMA_FROM_DEVICE:
> -               ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);
> +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size, riscv_cbom_block_size);
>                 break;
>         case DMA_BIDIRECTIONAL:
> -               ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
> +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size, riscv_cbom_block_size);
>                 break;
>         default:
>                 break;
> @@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
>                 break;
>         case DMA_FROM_DEVICE:
>         case DMA_BIDIRECTIONAL:
> -               ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
> +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size, riscv_cbom_block_size);
>                 break;
>         default:
>                 break;
> --
> 2.38.1
>


-- 
Best Regards
 Guo Ren

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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Icenowy Zheng]

在 2023-01-04星期三的 16:50 +0800，Guo Ren写道：
> On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me> wrote:
> > 
> > DMA synchorization is done on PA and the VA is calculated from the
> > PA.
> > 
> > Use the alternative macro variant that takes both VA and PA as
> > parameters, thus in case the ISA extension used support PA
> > directly, the
> > overhead for re-converting VA to PA can be omitted.
> > 
> > Suggested-by: Guo Ren <guoren@kernel.org>
> > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > ---
> >  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-
> > noncoherent.c
> > index d919efab6eba..a751f4aece62 100644
> > --- a/arch/riscv/mm/dma-noncoherent.c
> > +++ b/arch/riscv/mm/dma-noncoherent.c
> > @@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t
> > paddr, size_t size,
> > 
> >         switch (dir) {
> >         case DMA_TO_DEVICE:
> > -               ALT_CMO_OP(clean, vaddr, size,
> > riscv_cbom_block_size);
> > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > riscv_cbom_block_size);
> ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?

I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is something
new.

> 
> Others:
> Reviewed-by: Guo Ren <guoren@kernel.org>
> 
> >                 break;
> >         case DMA_FROM_DEVICE:
> > -               ALT_CMO_OP(clean, vaddr, size,
> > riscv_cbom_block_size);
> > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > riscv_cbom_block_size);
> >                 break;
> >         case DMA_BIDIRECTIONAL:
> > -               ALT_CMO_OP(flush, vaddr, size,
> > riscv_cbom_block_size);
> > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > riscv_cbom_block_size);
> >                 break;
> >         default:
> >                 break;
> > @@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr,
> > size_t size,
> >                 break;
> >         case DMA_FROM_DEVICE:
> >         case DMA_BIDIRECTIONAL:
> > -               ALT_CMO_OP(flush, vaddr, size,
> > riscv_cbom_block_size);
> > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > riscv_cbom_block_size);
> >                 break;
> >         default:
> >                 break;
> > --
> > 2.38.1
> > 
> 
> 

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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Guo Ren]

On Wed, Jan 4, 2023 at 4:59 PM Icenowy Zheng <uwu@icenowy.me> wrote:
>
> 在 2023-01-04星期三的 16:50 +0800，Guo Ren写道：
> > On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me> wrote:
> > >
> > > DMA synchorization is done on PA and the VA is calculated from the
> > > PA.
> > >
> > > Use the alternative macro variant that takes both VA and PA as
> > > parameters, thus in case the ISA extension used support PA
> > > directly, the
> > > overhead for re-converting VA to PA can be omitted.
> > >
> > > Suggested-by: Guo Ren <guoren@kernel.org>
> > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > ---
> > >  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-
> > > noncoherent.c
> > > index d919efab6eba..a751f4aece62 100644
> > > --- a/arch/riscv/mm/dma-noncoherent.c
> > > +++ b/arch/riscv/mm/dma-noncoherent.c
> > > @@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t
> > > paddr, size_t size,
> > >
> > >         switch (dir) {
> > >         case DMA_TO_DEVICE:
> > > -               ALT_CMO_OP(clean, vaddr, size,
> > > riscv_cbom_block_size);
> > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > riscv_cbom_block_size);
> > ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?
>
> I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is something
> new.
The ##_VPA is really strange.

How about:
ALT_CMO_OP          -> ALT_CMO_OP_VA
ALT_CMO_OP_VPA -> ALT_CMO_OP

>
> >
> > Others:
> > Reviewed-by: Guo Ren <guoren@kernel.org>
> >
> > >                 break;
> > >         case DMA_FROM_DEVICE:
> > > -               ALT_CMO_OP(clean, vaddr, size,
> > > riscv_cbom_block_size);
> > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > riscv_cbom_block_size);
> > >                 break;
> > >         case DMA_BIDIRECTIONAL:
> > > -               ALT_CMO_OP(flush, vaddr, size,
> > > riscv_cbom_block_size);
> > > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > > riscv_cbom_block_size);
> > >                 break;
> > >         default:
> > >                 break;
> > > @@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr,
> > > size_t size,
> > >                 break;
> > >         case DMA_FROM_DEVICE:
> > >         case DMA_BIDIRECTIONAL:
> > > -               ALT_CMO_OP(flush, vaddr, size,
> > > riscv_cbom_block_size);
> > > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > > riscv_cbom_block_size);
> > >                 break;
> > >         default:
> > >                 break;
> > > --
> > > 2.38.1
> > >
> >
> >
>


-- 
Best Regards
 Guo Ren

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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Icenowy Zheng]

在 2023-01-04星期三的 17:24 +0800，Guo Ren写道：
> On Wed, Jan 4, 2023 at 4:59 PM Icenowy Zheng <uwu@icenowy.me> wrote:
> > 
> > 在 2023-01-04星期三的 16:50 +0800，Guo Ren写道：
> > > On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me>
> > > wrote:
> > > > 
> > > > DMA synchorization is done on PA and the VA is calculated from
> > > > the
> > > > PA.
> > > > 
> > > > Use the alternative macro variant that takes both VA and PA as
> > > > parameters, thus in case the ISA extension used support PA
> > > > directly, the
> > > > overhead for re-converting VA to PA can be omitted.
> > > > 
> > > > Suggested-by: Guo Ren <guoren@kernel.org>
> > > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > > ---
> > > >  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> > > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > > 
> > > > diff --git a/arch/riscv/mm/dma-noncoherent.c
> > > > b/arch/riscv/mm/dma-
> > > > noncoherent.c
> > > > index d919efab6eba..a751f4aece62 100644
> > > > --- a/arch/riscv/mm/dma-noncoherent.c
> > > > +++ b/arch/riscv/mm/dma-noncoherent.c
> > > > @@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t
> > > > paddr, size_t size,
> > > > 
> > > >         switch (dir) {
> > > >         case DMA_TO_DEVICE:
> > > > -               ALT_CMO_OP(clean, vaddr, size,
> > > > riscv_cbom_block_size);
> > > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > > riscv_cbom_block_size);
> > > ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?
> > 
> > I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is
> > something
> > new.
> The ##_VPA is really strange.
> 
> How about:
> ALT_CMO_OP          -> ALT_CMO_OP_VA
> ALT_CMO_OP_VPA -> ALT_CMO_OP

It's thus a much bigger change.

If you are not fond of _VPA, I can rename it to _VA_PA.

> 
> > 
> > > 
> > > Others:
> > > Reviewed-by: Guo Ren <guoren@kernel.org>
> > > 
> > > >                 break;
> > > >         case DMA_FROM_DEVICE:
> > > > -               ALT_CMO_OP(clean, vaddr, size,
> > > > riscv_cbom_block_size);
> > > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > > riscv_cbom_block_size);
> > > >                 break;
> > > >         case DMA_BIDIRECTIONAL:
> > > > -               ALT_CMO_OP(flush, vaddr, size,
> > > > riscv_cbom_block_size);
> > > > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > > > riscv_cbom_block_size);
> > > >                 break;
> > > >         default:
> > > >                 break;
> > > > @@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr,
> > > > size_t size,
> > > >                 break;
> > > >         case DMA_FROM_DEVICE:
> > > >         case DMA_BIDIRECTIONAL:
> > > > -               ALT_CMO_OP(flush, vaddr, size,
> > > > riscv_cbom_block_size);
> > > > +               ALT_CMO_OP_VPA(flush, vaddr, paddr, size,
> > > > riscv_cbom_block_size);
> > > >                 break;
> > > >         default:
> > > >                 break;
> > > > --
> > > > 2.38.1
> > > > 
> > > 
> > > 
> > 
> 
> 

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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Heiko Stübner]

Hi,

Am Mittwoch, 4. Januar 2023, 10:27:53 CET schrieb Icenowy Zheng:
> 在 2023-01-04星期三的 17:24 +0800，Guo Ren写道：
> > On Wed, Jan 4, 2023 at 4:59 PM Icenowy Zheng <uwu@icenowy.me> wrote:
> > > 
> > > 在 2023-01-04星期三的 16:50 +0800，Guo Ren写道：
> > > > On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me>
> > > > wrote:
> > > > > 
> > > > > DMA synchorization is done on PA and the VA is calculated from
> > > > > the
> > > > > PA.
> > > > > 
> > > > > Use the alternative macro variant that takes both VA and PA as
> > > > > parameters, thus in case the ISA extension used support PA
> > > > > directly, the
> > > > > overhead for re-converting VA to PA can be omitted.
> > > > > 
> > > > > Suggested-by: Guo Ren <guoren@kernel.org>
> > > > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > > > ---
> > > > >  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> > > > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > > > 
> > > > > diff --git a/arch/riscv/mm/dma-noncoherent.c
> > > > > b/arch/riscv/mm/dma-
> > > > > noncoherent.c
> > > > > index d919efab6eba..a751f4aece62 100644
> > > > > --- a/arch/riscv/mm/dma-noncoherent.c
> > > > > +++ b/arch/riscv/mm/dma-noncoherent.c
> > > > > @@ -19,13 +19,13 @@ void arch_sync_dma_for_device(phys_addr_t
> > > > > paddr, size_t size,
> > > > > 
> > > > >         switch (dir) {
> > > > >         case DMA_TO_DEVICE:
> > > > > -               ALT_CMO_OP(clean, vaddr, size,
> > > > > riscv_cbom_block_size);
> > > > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > > > riscv_cbom_block_size);
> > > > ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?
> > > 
> > > I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is
> > > something
> > > new.
> > The ##_VPA is really strange.
> > 
> > How about:
> > ALT_CMO_OP          -> ALT_CMO_OP_VA
> > ALT_CMO_OP_VPA -> ALT_CMO_OP
> 
> It's thus a much bigger change.
> 
> If you are not fond of _VPA, I can rename it to _VA_PA.

before you spend too much time on this, there is currently a parallel
discussion running about including all the other different vendor-
specific cache management.

See [0] and the thread before that for reference.

The consensus seems to be that cache-handling itself is not fast anyway,
and therefore to reduce complexity for the cache handling and move
non-zicbom cache-handling into a indirect function call that the can be
overridden at runtime.


Heiko

[0] https://lore.kernel.org/all/43aee000-5b89-4d94-98d2-b37b1a18a83e@app.fastmail.com/



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Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA synchorization

[Icenowy Zheng]

在 2023-01-04星期三的 13:16 +0100，Heiko Stübner写道：
> Hi,
> 
> Am Mittwoch, 4. Januar 2023, 10:27:53 CET schrieb Icenowy Zheng:
> > 在 2023-01-04星期三的 17:24 +0800，Guo Ren写道：
> > > On Wed, Jan 4, 2023 at 4:59 PM Icenowy Zheng <uwu@icenowy.me>
> > > wrote:
> > > > 
> > > > 在 2023-01-04星期三的 16:50 +0800，Guo Ren写道：
> > > > > On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me>
> > > > > wrote:
> > > > > > 
> > > > > > DMA synchorization is done on PA and the VA is calculated
> > > > > > from
> > > > > > the
> > > > > > PA.
> > > > > > 
> > > > > > Use the alternative macro variant that takes both VA and PA
> > > > > > as
> > > > > > parameters, thus in case the ISA extension used support PA
> > > > > > directly, the
> > > > > > overhead for re-converting VA to PA can be omitted.
> > > > > > 
> > > > > > Suggested-by: Guo Ren <guoren@kernel.org>
> > > > > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > > > > ---
> > > > > >  arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> > > > > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > > > > 
> > > > > > diff --git a/arch/riscv/mm/dma-noncoherent.c
> > > > > > b/arch/riscv/mm/dma-
> > > > > > noncoherent.c
> > > > > > index d919efab6eba..a751f4aece62 100644
> > > > > > --- a/arch/riscv/mm/dma-noncoherent.c
> > > > > > +++ b/arch/riscv/mm/dma-noncoherent.c
> > > > > > @@ -19,13 +19,13 @@ void
> > > > > > arch_sync_dma_for_device(phys_addr_t
> > > > > > paddr, size_t size,
> > > > > > 
> > > > > >         switch (dir) {
> > > > > >         case DMA_TO_DEVICE:
> > > > > > -               ALT_CMO_OP(clean, vaddr, size,
> > > > > > riscv_cbom_block_size);
> > > > > > +               ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > > > > riscv_cbom_block_size);
> > > > > ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?
> > > > 
> > > > I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is
> > > > something
> > > > new.
> > > The ##_VPA is really strange.
> > > 
> > > How about:
> > > ALT_CMO_OP          -> ALT_CMO_OP_VA
> > > ALT_CMO_OP_VPA -> ALT_CMO_OP
> > 
> > It's thus a much bigger change.
> > 
> > If you are not fond of _VPA, I can rename it to _VA_PA.
> 
> before you spend too much time on this, there is currently a parallel
> discussion running about including all the other different vendor-
> specific cache management.
> 
> See [0] and the thread before that for reference.

The code shown here seems to be only a draft, and not even testable.

> 
> The consensus seems to be that cache-handling itself is not fast
> anyway,
> and therefore to reduce complexity for the cache handling and move
> non-zicbom cache-handling into a indirect function call that the can
> be
> overridden at runtime.

Well yes I tested this patchset on my LiteX with OpenC906, and it does
not help at all on LiteETH throughtput. So maybe this is only some
theortical gain.

> 
> 
> Heiko
> 
> [0]
> https://lore.kernel.org/all/43aee000-5b89-4d94-98d2-b37b1a18a83e@app.fastmail.com/
> 
> 


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