Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/misc

From: Arnd Bergmann <arnd@arndb.de>
To: Christoph Hellwig <hch@lst.de>
Cc: Greg KH <gregkh@linuxfoundation.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	James Morse <james.morse@arm.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	linux-edac@vger.kernel.org
Subject: Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/misc
Date: Thu, 8 Aug 2019 10:07:26 +0200	[thread overview]
Message-ID: <CAK8P3a1nwTjt7gbL7bCa11-smQ0c6o-6QUL0vLZnZxzT_aa4-g@mail.gmail.com> (raw)
In-Reply-To: <20190808075029.GB30308@lst.de>

On Thu, Aug 8, 2019 at 9:50 AM Christoph Hellwig <hch@lst.de> wrote:
> On Wed, Aug 07, 2019 at 08:40:58AM -0700, Paul Walmsley wrote:
> > On Wed, 7 Aug 2019, Christoph Hellwig wrote:
> > > On Wed, Aug 07, 2019 at 05:22:15PM +0200, Greg KH wrote:
> > > > > Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
> > > > > Signed-off-by: Christoph Hellwig <hch@lst.de>
> > > > > ---
> > > > >  arch/riscv/mm/Makefile                            | 1 -
> > > > >  drivers/misc/Makefile                             | 1 +
> > > > >  {arch/riscv/mm => drivers/misc}/sifive_l2_cache.c | 0
> > > > >  3 files changed, 1 insertion(+), 1 deletion(-)
> > > > >  rename {arch/riscv/mm => drivers/misc}/sifive_l2_cache.c (100%)
> > > >
> > > > Why isn't this in drivers/edac/ ?
> > > > why is this a misc driver?  Seems like it should sit next to the edac
> > > > stuff.
> > >
> > > No idea.  EDAC maintainers, would you object to taking what is
> > > currently in arch/riscv/mm//sifive_l2_cache.c to drivers/edac/ ?
> >
> > If this driver is moved out of arch/riscv/mm, it should ideally go into
> > some sort of common L2 cache controller driver directory, along
> > with other L2 cache controller drivers like arch/arm/mm/*l2c*.
> >
> > Like many L2 cache controllers, this controller also supports cache
> > flushing operations and SoC-specific way operations.  We just don't use
> > those on RISC-V - yet.
>
> Well, another reason to not have it under arch/riscv/ as it is a SOC
> specific driver, which we all have somewhere else, just like arm64
> and new arm ports do.  And especially not unconditionally built.

soc specific drivers that don't have their own subsystem can
go into drivers/soc/$VENDOR/.

For this driver, I would also think that the edac subsystem is the
best fit. Right now, the driver is split in two halves: there
is drivers/edac/sifive_edac.c and arch/riscv/mm/sifive_l2_cache.c,
with neither of those working without the other.

Moving both into a single file would seem to allow simplifying
it as a proper 'platform_driver', which the drivers/edac side today
is not (it just registers a platform device in its module_init call).

      Arnd

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv