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From: Conor Dooley <conor.dooley@microchip.com>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: Conor Dooley <conor@kernel.org>,
	<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree
Date: Mon, 13 Feb 2023 10:07:38 +0000	[thread overview]
Message-ID: <Y+oL6l5LzUyAzOgC@wendy> (raw)
In-Reply-To: <e1d2646e-b5de-298e-bb91-19ad12fd31af@starfivetech.com>


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On Mon, Feb 13, 2023 at 05:41:02PM +0800, Hal Feng wrote:
> On Thu, 9 Feb 2023 11:11:51 +0000, Conor Dooley wrote:
> > On Thu, Feb 02, 2023 at 07:41:33PM +0000, Conor Dooley wrote:
> >> On Fri, Feb 03, 2023 at 02:56:41AM +0800, Hal Feng wrote:
> >> > On Wed, 1 Feb 2023 08:21:05 +0000, Conor Dooley wrote:
> >> > > On Wed, Feb 01, 2023 at 03:21:48PM +0800, Hal Feng wrote:
> >> > >> On Wed, 28 Dec 2022 22:48:43 +0000, Conor Dooley wrote:
> >> > >> > On Tue, Dec 20, 2022 at 09:12:46AM +0800, Hal Feng wrote:
> > 
> >> FWIW, the deadline for getting material in for v6.3 has already passed,
> >> so you can send the next version of this series without waiting for
> >> clarification on the compatibles & ISA string. We should have plenty of
> >> time to get those fixed up before the series gets applied.
> > 
> > Also, as it looks like the pinctrl driver is going to land in time for
> > v6.3, that leaves just this series and the clock driver required for
> > base support.
> > 
> > In the original submission, you sent the clock driver and dt in the same
> > series & I think it might make the process a bit faster if you sent them
> > both together for the next version again.
> > 
> > That way, both the drivers and dts can go together as their have an
> > inter dependence.
> > 
> > That's my opinion anyway, will make trying to sequence things between
> > trees easier.
> 
> Good idea. But how can I write the change log if we do so? Will it make
> the history confused? Thanks.

I'm not sure what you mean w.r.t. history.
Both series are on V3 I think, so just make the next version v4 title it
something like "Basic clock, reset & dt support..."
For the changelogs, just mention you merged the two series again in
the cover letter & add the changelogs that you would have made for each
series to the cover as a single changelog.
Say somewhere in the cover that I suggested merging the series together
so that they could go via the same tree as the dt-binding headers are
required by both driver & devicetree.

Cheers,
Conor.


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  reply	other threads:[~2023-02-13 10:08 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-20  1:12 [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-12-20  1:12 ` [PATCH v3 1/7] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Hal Feng
2022-12-20 10:05   ` Krzysztof Kozlowski
2022-12-23  2:05     ` Hal Feng
2022-12-20 20:58   ` Conor Dooley
2022-12-23  2:15     ` Hal Feng
2022-12-20  1:12 ` [PATCH v3 2/7] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-12-20  1:12 ` [PATCH v3 3/7] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-12-20  1:12 ` [PATCH v3 4/7] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-12-20 20:21   ` Rob Herring
2022-12-20  1:12 ` [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-12-20 21:14   ` Conor Dooley
2022-12-20  1:12 ` [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-12-20 10:10   ` Krzysztof Kozlowski
2022-12-25 10:31     ` Hal Feng
2022-12-25 11:56       ` Krzysztof Kozlowski
2022-12-20 21:31   ` Conor Dooley
2022-12-25 14:31     ` Hal Feng
2022-12-27 20:58       ` Conor Dooley
2022-12-28 22:48   ` Conor Dooley
2022-12-29  5:25     ` Icenowy Zheng
2022-12-29  9:02       ` Conor Dooley
2023-02-01  7:53         ` Hal Feng
2023-02-01  7:31       ` Hal Feng
2023-02-01  7:21     ` Hal Feng
2023-02-01  8:21       ` Conor Dooley
2023-02-02 18:56         ` Hal Feng
2023-02-02 19:41           ` Conor Dooley
2023-02-09 11:11             ` Conor Dooley
2023-02-13  9:41               ` Hal Feng
2023-02-13 10:07                 ` Conor Dooley [this message]
2023-02-14  2:37                   ` Hal Feng
2023-02-15  3:07             ` Hal Feng
2023-02-15  7:42               ` Conor Dooley
2023-02-15  7:59                 ` Conor Dooley
2023-01-31  2:00   ` Hal Feng
2023-01-31  6:17     ` Conor Dooley
2023-02-02  2:42       ` Hal Feng
2023-02-02  6:19         ` Conor Dooley
2022-12-20  1:12 ` [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board " Hal Feng
2022-12-20 21:26   ` Conor Dooley
2022-12-23  3:12     ` Hal Feng
2022-12-28 22:49       ` Conor Dooley
2023-01-10 17:59   ` Conor Dooley
2023-01-18 23:43     ` Conor Dooley
2023-02-14  9:53   ` Emil Renner Berthing
2023-02-15 14:03     ` Hal Feng
2023-02-16  9:27       ` Emil Renner Berthing
2023-02-16  9:50         ` Conor Dooley
2023-02-16 10:09           ` Conor Dooley
2023-02-16 10:32             ` Emil Renner Berthing
2023-02-16 12:27               ` Hal Feng
2023-02-16 13:02                 ` Conor Dooley
2022-12-26 23:01 ` [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Conor Dooley
2022-12-27  7:58   ` Krzysztof Kozlowski
2022-12-27 14:20     ` Conor Dooley

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