From: Samuel Ortiz <sameo@rivosinc.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: "Hongren (Zenithal) Zheng" <i@zenithal.me>,
Palmer Dabbelt <palmer@rivosinc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@rivosinc.com>,
Anup Patel <anup@brainfault.org>,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
linux-mm@kvack.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-api@vger.kernel.org,
Michael Kerrisk <mtk.manpages@gmail.com>,
linux-man@vger.kernel.org, Jiatai He <jiatai2021@iscas.ac.cn>,
Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH v3 2/3] RISC-V: uapi: add HWCAP for Bitmanip/Scalar Crypto
Date: Thu, 24 Nov 2022 18:12:36 +0100 [thread overview]
Message-ID: <Y3+mBAV8oxphjHcJ@vermeer> (raw)
In-Reply-To: <Y39blUaC/jHiOYCk@wendy>
On Thu, Nov 24, 2022 at 11:55:01AM +0000, Conor Dooley wrote:
> On Thu, Nov 24, 2022 at 11:47:30AM +0100, Samuel Ortiz wrote:
>
> > Patch #1 is definitely needed regardless of which interface we pick for
> > exposing the ISA strings to userspace.
>
> I took another look at #1, and I feel more confused about what
> constitutes canonical order than I did before! If you know better than
> I, and you probably do since you're interested in these 6 month old
> patches, some insight would be appreciated!
Assuming we don't go with hwcap, I dont think the order of the
riscv_isa_ext_id enum matters that much?
iiuc we're building the cpuinfo string from the riscv_isa_ext_data
array, and I think the current code is incorrect:
static struct riscv_isa_ext_data isa_ext_arr[] = {
__RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
__RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
__RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),
__RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
__RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
__RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
};
zicbom and zihintpause should come before supervisor level extensions.
I'm going to send a patch for that.
And the Zb/Zk ones should come after the Zi ones, and before the
supervisor level ones (The I category comes before the B or the K one).
So we should check that when patch #1 is rebased.
Cheers,
Samuel.
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next prev parent reply other threads:[~2022-11-24 17:12 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-12 18:44 [PATCH v3 0/3] RISC-V: Add Bitmanip/Scalar Crypto HWCAP Hongren (Zenithal) Zheng
2022-06-12 18:46 ` [PATCH v3 1/3] RISC-V: add Bitmanip/Scalar Crypto parsing from DT Hongren (Zenithal) Zheng
2022-11-24 9:19 ` Samuel Ortiz
2022-11-24 11:53 ` Conor Dooley
2022-06-12 18:46 ` [PATCH v3 2/3] RISC-V: uapi: add HWCAP for Bitmanip/Scalar Crypto Hongren (Zenithal) Zheng
2022-11-24 9:30 ` Samuel Ortiz
2022-11-24 9:58 ` Conor Dooley
2022-11-24 10:47 ` Samuel Ortiz
2022-11-24 11:55 ` Conor Dooley
2022-11-24 17:12 ` Samuel Ortiz [this message]
2022-11-24 17:20 ` Conor Dooley
2022-11-24 17:34 ` Samuel Ortiz
2022-11-24 17:54 ` Conor Dooley
2022-11-24 18:09 ` Samuel Ortiz
2022-06-12 18:47 ` [PATCH v3 3/3] RISC-V: HWCAP: parse Bitmanip/Scalar Crypto HWCAP from DT Hongren (Zenithal) Zheng
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