* [PATCH v5 0/3] Add TDM audio on StarFive JH7110
@ 2023-05-26 14:53 Walker Chen
2023-05-26 14:54 ` [PATCH v5 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Walker Chen @ 2023-05-26 14:53 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Hal Feng, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
This patchset adds TDM audio driver for the StarFive JH7110 SoC. The
first patch adds device tree binding for TDM module. The second patch
adds tdm driver support for JH7110 SoC. The last patch adds device tree
node and pins configuration of tdm to JH7110 dts.
The series has been tested on the VisionFive 2 board by plugging an
audio expansion board.
For more information of audio expansion board, you can take a look
at the following webpage:
https://wiki.seeedstudio.com/ReSpeaker_2_Mics_Pi_HAT/
The last patch should be applied after the following patch:
https://lore.kernel.org/all/20230322094820.24738-5-walker.chen@starfivetech.com/
Changes since v4:
- Rebased on Linux 6.4-rc2.
- Adjusted code indentation in jh7110_tdm_syncdiv().
- Removed '__maybe_unused' for jh7110_tdm_system_suspend() and
jh7110_tdm_system_resume().
- Removed initialization for variable 'ret' in jh7110_tdm_hw_params().
- Return immedially when entering unsurpported case in
jh7110_tdm_set_dai_fmt().
- Check the return value with IS_ERR_OR_NULL() for the call to
devm_reset_control_array_get_exclusive().
- Dropped the jh7110_tdm_clk_enable() in probe and rely on runtime PM
check if CONFIG_PM is enabled.
- Used RUNTIME_PM_OPS() instead of SET_RUNTIME_PM_OPS() and
SYSTEM_SLEEP_PM_OPS() instead of SET_SYSTEM_SLEEP_PM_OPS() in
structure jh7110_tdm_pm_ops.
Changes since v3:
- Modified the subject of patch [1/3] to reflect which subsystem it is.
- Use the set of functions with 'clk_bulk_' to get/enable/disable clocks.
- Dropped the overlay from patch [3/3].
- Dropped the redundant macro 'CONFIG_PM' and 'CONFIG_PM_SLEEP' around
suspend() and resume().
Changes since v2:
- Use dt-overlay to describe sound card because need to plug the audio
expansion board into the VisionFive2 board.
- Modified the coding style for driver.
- Moved assignment of stop_dma_first to startup function of dai_driver.
- Dropped some useless macro definition.
- Use loops to get/enable/disable clocks.
Changes since v1:
- Rebased on Linux 6.3-rc4.
- Added the dts file dedicated to describe audio card.
- Added the item for JH7110 audio board to the dt-binding of StarFive
SoC-based boards.
---
v4: https://lore.kernel.org/all/20230511091549.28003-1-walker.chen@starfivetech.com/
v3: https://lore.kernel.org/all/20230506090116.9206-1-walker.chen@starfivetech.com/
v2: https://lore.kernel.org/all/20230420024118.22677-1-walker.chen@starfivetech.com/
v1: https://lore.kernel.org/all/20230329153320.31390-1-walker.chen@starfivetech.com/
Walker Chen (3):
ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
ASoC: starfive: Add JH7110 TDM driver
riscv: dts: starfive: add the node and pins configuration for tdm
.../bindings/sound/starfive,jh7110-tdm.yaml | 98 +++
MAINTAINERS | 6 +
.../jh7110-starfive-visionfive-2.dtsi | 40 ++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/starfive/Kconfig | 15 +
sound/soc/starfive/Makefile | 2 +
sound/soc/starfive/jh7110_tdm.c | 679 ++++++++++++++++++
9 files changed, 863 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
create mode 100644 sound/soc/starfive/Kconfig
create mode 100644 sound/soc/starfive/Makefile
create mode 100644 sound/soc/starfive/jh7110_tdm.c
base-commit: f1fcbaa18b28dec10281551dfe6ed3a3ed80e3d6
prerequisite-patch-id: 398744c61913c76a35754de867c4f820ca7a8d99
prerequisite-patch-id: 07986c6e98ce85d3ee84f38c780e72145f098fc8
prerequisite-patch-id: 1babe83d6bf999bad17584dc595480f9070a5369
prerequisite-patch-id: 63c1f70ca2bcf827429542e60d74411b7666ceff
prerequisite-patch-id: 9fbb7ad1dd258bb8ff5946c4a0e59de4bfd82a04
prerequisite-patch-id: a7f61973ccb6bc425daa8a86c048fd0f5a915b76
prerequisite-patch-id: 39e1be2a3d1593577ab997f55f59367cba665aa7
prerequisite-patch-id: 0159f09bb0a1ff711a00ae17ef5b12662c9c7d3d
prerequisite-patch-id: 2ddada18ab6ea5cd1da14212aaf59632f5203d40
prerequisite-patch-id: 584c256c9acb52ee2773d0c81c3f4977fc18155a
prerequisite-patch-id: b37ac15032973e1fcd918f157c82a0606775c9e9
prerequisite-patch-id: 6abf359fa445f4104432ddee27044dfbfb128417
--
2.17.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5 1/3] ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
2023-05-26 14:53 [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Walker Chen
@ 2023-05-26 14:54 ` Walker Chen
2023-05-26 14:54 ` [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
` (2 subsequent siblings)
3 siblings, 0 replies; 11+ messages in thread
From: Walker Chen @ 2023-05-26 14:54 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Hal Feng, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add bindings for TDM driver which supports multi-channel audio playback
and capture on JH7110 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
.../bindings/sound/starfive,jh7110-tdm.yaml | 98 +++++++++++++++++++
1 file changed, 98 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
new file mode 100644
index 000000000000..abb373fbfa26
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 TDM Controller
+
+description: |
+ The TDM Controller is a Time Division Multiplexed audio interface
+ integrated in StarFive JH7110 SoC, allowing up to 8 channels of
+ audio over a serial interface. The TDM controller can operate both
+ in master and slave mode.
+
+maintainers:
+ - Walker Chen <walker.chen@starfivetech.com>
+
+allOf:
+ - $ref: dai-common.yaml#
+
+properties:
+ compatible:
+ enum:
+ - starfive,jh7110-tdm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: TDM AHB Clock
+ - description: TDM APB Clock
+ - description: TDM Internal Clock
+ - description: TDM Clock
+ - description: Inner MCLK
+ - description: TDM External Clock
+
+ clock-names:
+ items:
+ - const: tdm_ahb
+ - const: tdm_apb
+ - const: tdm_internal
+ - const: tdm
+ - const: mclk_inner
+ - const: tdm_ext
+
+ resets:
+ items:
+ - description: tdm ahb reset line
+ - description: tdm apb reset line
+ - description: tdm core reset line
+
+ dmas:
+ items:
+ - description: RX DMA Channel
+ - description: TX DMA Channel
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ "#sound-dai-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - dmas
+ - dma-names
+ - "#sound-dai-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x10090000 0x1000>;
+ clocks = <&syscrg 184>,
+ <&syscrg 185>,
+ <&syscrg 186>,
+ <&syscrg 187>,
+ <&syscrg 17>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg 105>,
+ <&syscrg 107>,
+ <&syscrg 106>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ };
--
2.17.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-26 14:53 [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-26 14:54 ` [PATCH v5 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
@ 2023-05-26 14:54 ` Walker Chen
2023-05-30 6:47 ` Claudiu.Beznea
2023-05-26 14:54 ` [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
2023-06-01 15:44 ` (subset) [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Mark Brown
3 siblings, 1 reply; 11+ messages in thread
From: Walker Chen @ 2023-05-26 14:54 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Hal Feng, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add tdm driver support for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
MAINTAINERS | 6 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/starfive/Kconfig | 15 +
sound/soc/starfive/Makefile | 2 +
sound/soc/starfive/jh7110_tdm.c | 679 ++++++++++++++++++++++++++++++++
6 files changed, 704 insertions(+)
create mode 100644 sound/soc/starfive/Kconfig
create mode 100644 sound/soc/starfive/Makefile
create mode 100644 sound/soc/starfive/jh7110_tdm.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 2a0496448b7f..00478d07a9f4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20132,6 +20132,12 @@ F: Documentation/devicetree/bindings/power/starfive*
F: drivers/soc/starfive/jh71xx_pmu.c
F: include/dt-bindings/power/starfive,jh7110-pmu.h
+STARFIVE JH7110 TDM DRIVER
+M: Walker Chen <walker.chen@starfivetech.com>
+S: Maintained
+F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
+F: sound/soc/starfive/jh7110_tdm.c
+
STARFIVE SOC DRIVERS
M: Conor Dooley <conor@kernel.org>
S: Maintained
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 848fbae26c3b..8d1d9401ecf2 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
source "sound/soc/sof/Kconfig"
source "sound/soc/spear/Kconfig"
source "sound/soc/sprd/Kconfig"
+source "sound/soc/starfive/Kconfig"
source "sound/soc/sti/Kconfig"
source "sound/soc/stm/Kconfig"
source "sound/soc/sunxi/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 507eaed1d6a1..65aeb4ef4068 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
obj-$(CONFIG_SND_SOC) += sof/
obj-$(CONFIG_SND_SOC) += spear/
obj-$(CONFIG_SND_SOC) += sprd/
+obj-$(CONFIG_SND_SOC) += starfive/
obj-$(CONFIG_SND_SOC) += sti/
obj-$(CONFIG_SND_SOC) += stm/
obj-$(CONFIG_SND_SOC) += sunxi/
diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
new file mode 100644
index 000000000000..fafb681f8c0a
--- /dev/null
+++ b/sound/soc/starfive/Kconfig
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config SND_SOC_STARFIVE
+ tristate "Audio support for StarFive SoC"
+ depends on COMPILE_TEST || ARCH_STARFIVE
+ help
+ Say Y or M if you want to add support for codecs attached to
+ the Starfive SoCs' Audio interfaces. You will also need to
+ select the audio interfaces to support below.
+
+config SND_SOC_JH7110_TDM
+ tristate "JH7110 TDM device driver"
+ depends on HAVE_CLK && SND_SOC_STARFIVE
+ select SND_SOC_GENERIC_DMAENGINE_PCM
+ help
+ Say Y or M if you want to add support for StarFive TDM driver.
diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
new file mode 100644
index 000000000000..f7d960211d72
--- /dev/null
+++ b/sound/soc/starfive/Makefile
@@ -0,0 +1,2 @@
+# StarFive Platform Support
+obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
new file mode 100644
index 000000000000..973b910d2d3e
--- /dev/null
+++ b/sound/soc/starfive/jh7110_tdm.c
@@ -0,0 +1,679 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * jh7110_tdm.c -- StarFive JH7110 TDM driver
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ *
+ * Author: Walker Chen <walker.chen@starfivetech.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/dmaengine.h>
+#include <linux/module.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+#include <linux/types.h>
+#include <sound/dmaengine_pcm.h>
+#include <sound/initval.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+
+#define TDM_PCMGBCR 0x00
+ #define PCMGBCR_MASK 0x1e
+ #define PCMGBCR_ENABLE BIT(0)
+ #define PCMGBCR_TRITXEN BIT(4)
+ #define CLKPOL_BIT 5
+ #define TRITXEN_BIT 4
+ #define ELM_BIT 3
+ #define SYNCM_BIT 2
+ #define MS_BIT 1
+#define TDM_PCMTXCR 0x04
+ #define PCMTXCR_TXEN BIT(0)
+ #define IFL_BIT 11
+ #define WL_BIT 8
+ #define SSCALE_BIT 4
+ #define SL_BIT 2
+ #define LRJ_BIT 1
+#define TDM_PCMRXCR 0x08
+ #define PCMRXCR_RXEN BIT(0)
+ #define PCMRXCR_RXSL_MASK 0xc
+ #define PCMRXCR_RXSL_16BIT 0x4
+ #define PCMRXCR_RXSL_32BIT 0x8
+ #define PCMRXCR_SCALE_MASK 0xf0
+ #define PCMRXCR_SCALE_1CH 0x10
+#define TDM_PCMDIV 0x0c
+
+#define JH7110_TDM_FIFO 0x170c0000
+#define JH7110_TDM_FIFO_DEPTH 32
+
+enum TDM_MASTER_SLAVE_MODE {
+ TDM_AS_MASTER = 0,
+ TDM_AS_SLAVE,
+};
+
+enum TDM_CLKPOL {
+ /* tx raising and rx falling */
+ TDM_TX_RASING_RX_FALLING = 0,
+ /* tx falling and rx raising */
+ TDM_TX_FALLING_RX_RASING,
+};
+
+enum TDM_ELM {
+ /* only work while SYNCM=0 */
+ TDM_ELM_LATE = 0,
+ TDM_ELM_EARLY,
+};
+
+enum TDM_SYNCM {
+ /* short frame sync */
+ TDM_SYNCM_SHORT = 0,
+ /* long frame sync */
+ TDM_SYNCM_LONG,
+};
+
+enum TDM_IFL {
+ /* FIFO to send or received : half-1/2, Quarter-1/4 */
+ TDM_FIFO_HALF = 0,
+ TDM_FIFO_QUARTER,
+};
+
+enum TDM_WL {
+ /* send or received word length */
+ TDM_8BIT_WORD_LEN = 0,
+ TDM_16BIT_WORD_LEN,
+ TDM_20BIT_WORD_LEN,
+ TDM_24BIT_WORD_LEN,
+ TDM_32BIT_WORD_LEN,
+};
+
+enum TDM_SL {
+ /* send or received slot length */
+ TDM_8BIT_SLOT_LEN = 0,
+ TDM_16BIT_SLOT_LEN,
+ TDM_32BIT_SLOT_LEN,
+};
+
+enum TDM_LRJ {
+ /* left-justify or right-justify */
+ TDM_RIGHT_JUSTIFY = 0,
+ TDM_LEFT_JUSTIFT,
+};
+
+struct tdm_chan_cfg {
+ enum TDM_IFL ifl;
+ enum TDM_WL wl;
+ unsigned char sscale;
+ enum TDM_SL sl;
+ enum TDM_LRJ lrj;
+ unsigned char enable;
+};
+
+struct jh7110_tdm_dev {
+ void __iomem *tdm_base;
+ struct device *dev;
+ struct clk_bulk_data clks[6];
+ struct reset_control *resets;
+
+ enum TDM_CLKPOL clkpolity;
+ enum TDM_ELM elm;
+ enum TDM_SYNCM syncm;
+ enum TDM_MASTER_SLAVE_MODE ms_mode;
+
+ struct tdm_chan_cfg tx;
+ struct tdm_chan_cfg rx;
+
+ u16 syncdiv;
+ u32 samplerate;
+ u32 pcmclk;
+
+ /* data related to DMA transfers b/w tdm and DMAC */
+ struct snd_dmaengine_dai_dma_data play_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+ u32 saved_pcmgbcr;
+ u32 saved_pcmtxcr;
+ u32 saved_pcmrxcr;
+ u32 saved_pcmdiv;
+};
+
+static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
+{
+ return readl_relaxed(tdm->tdm_base + reg);
+}
+
+static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
+{
+ writel_relaxed(val, tdm->tdm_base + reg);
+}
+
+static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
+ else
+ tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
+}
+
+static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ u32 data;
+
+ data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
+
+ /* restore context */
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
+ else
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
+}
+
+static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ unsigned int val;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
+ val &= ~PCMTXCR_TXEN;
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
+ } else {
+ val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
+ val &= ~PCMRXCR_RXEN;
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
+ }
+}
+
+static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
+{
+ u32 sl, sscale, syncdiv;
+
+ if (tdm->rx.sl >= tdm->tx.sl)
+ sl = tdm->rx.sl;
+ else
+ sl = tdm->tx.sl;
+
+ if (tdm->rx.sscale >= tdm->tx.sscale)
+ sscale = tdm->rx.sscale;
+ else
+ sscale = tdm->tx.sscale;
+
+ syncdiv = tdm->pcmclk / tdm->samplerate - 1;
+
+ if ((syncdiv + 1) < (sl * sscale)) {
+ dev_err(tdm->dev, "Failed to set syncdiv!\n");
+ return -EINVAL;
+ }
+
+ if (tdm->syncm == TDM_SYNCM_LONG &&
+ (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) &&
+ ((syncdiv + 1) <= sl)) {
+ dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
+ return -EINVAL;
+ }
+
+ jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
+ return 0;
+}
+
+static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ u32 datarx, datatx;
+ int ret;
+
+ ret = jh7110_tdm_syncdiv(tdm);
+ if (ret)
+ return ret;
+
+ datarx = (tdm->rx.ifl << IFL_BIT) |
+ (tdm->rx.wl << WL_BIT) |
+ (tdm->rx.sscale << SSCALE_BIT) |
+ (tdm->rx.sl << SL_BIT) |
+ (tdm->rx.lrj << LRJ_BIT);
+
+ datatx = (tdm->tx.ifl << IFL_BIT) |
+ (tdm->tx.wl << WL_BIT) |
+ (tdm->tx.sscale << SSCALE_BIT) |
+ (tdm->tx.sl << SL_BIT) |
+ (tdm->tx.lrj << LRJ_BIT);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
+ else
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
+
+ return 0;
+}
+
+static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
+{
+ clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
+}
+
+static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
+{
+ int ret;
+
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
+ if (ret) {
+ dev_err(tdm->dev, "Failed to enable tdm clocks\n");
+ return ret;
+ }
+
+ ret = reset_control_deassert(tdm->resets);
+ if (ret) {
+ dev_err(tdm->dev, "Failed to deassert tdm resets\n");
+ goto dis_tdm_clk;
+ }
+
+ /* select tdm_ext clock as the clock source for tdm */
+ ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
+ if (ret) {
+ dev_err(tdm->dev, "Can't set extern clock source for clk_tdm\n");
+ goto dis_tdm_clk;
+ }
+
+ return 0;
+
+dis_tdm_clk:
+ clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
+
+ return ret;
+}
+
+static int jh7110_tdm_runtime_suspend(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ jh7110_tdm_clk_disable(tdm);
+ return 0;
+}
+
+static int jh7110_tdm_runtime_resume(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ return jh7110_tdm_clk_enable(tdm);
+}
+
+static int jh7110_tdm_system_suspend(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ /* save context */
+ tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
+ tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
+
+ return pm_runtime_force_suspend(dev);
+}
+
+static int jh7110_tdm_system_resume(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ /* restore context */
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
+ jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
+
+ return pm_runtime_force_resume(dev);
+}
+
+static const struct snd_soc_component_driver jh7110_tdm_component = {
+ .name = "jh7110-tdm",
+};
+
+static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *cpu_dai)
+{
+ struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
+ struct snd_soc_dai_link *dai_link = rtd->dai_link;
+
+ dai_link->stop_dma_first = 1;
+
+ return 0;
+}
+
+static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+ int chan_wl, chan_sl, chan_nr;
+ unsigned int data_width;
+ unsigned int dma_bus_width;
+ struct snd_dmaengine_dai_dma_data *dma_data = NULL;
+ int ret;
+
+ data_width = params_width(params);
+
+ tdm->samplerate = params_rate(params);
+ tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ chan_wl = TDM_16BIT_WORD_LEN;
+ chan_sl = TDM_16BIT_SLOT_LEN;
+ dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ break;
+
+ case SNDRV_PCM_FORMAT_S32_LE:
+ chan_wl = TDM_32BIT_WORD_LEN;
+ chan_sl = TDM_32BIT_SLOT_LEN;
+ dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ break;
+
+ default:
+ dev_err(tdm->dev, "tdm: unsupported PCM fmt");
+ return -EINVAL;
+ }
+
+ chan_nr = params_channels(params);
+ switch (chan_nr) {
+ case 1:
+ case 2:
+ case 4:
+ case 6:
+ case 8:
+ break;
+ default:
+ dev_err(tdm->dev, "channel not supported\n");
+ return -EINVAL;
+ }
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ tdm->tx.wl = chan_wl;
+ tdm->tx.sl = chan_sl;
+ tdm->tx.sscale = chan_nr;
+ tdm->play_dma_data.addr_width = dma_bus_width;
+ dma_data = &tdm->play_dma_data;
+ } else {
+ tdm->rx.wl = chan_wl;
+ tdm->rx.sl = chan_sl;
+ tdm->rx.sscale = chan_nr;
+ tdm->capture_dma_data.addr_width = dma_bus_width;
+ dma_data = &tdm->capture_dma_data;
+ }
+
+ snd_soc_dai_set_dma_data(dai, substream, dma_data);
+
+ ret = jh7110_tdm_config(tdm, substream);
+ if (ret)
+ return ret;
+
+ jh7110_tdm_save_context(tdm, substream);
+ return 0;
+}
+
+static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
+ int cmd, struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ jh7110_tdm_start(tdm, substream);
+ break;
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ jh7110_tdm_stop(tdm, substream);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
+ unsigned int fmt)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
+ unsigned int gbcr;
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
+ case SND_SOC_DAIFMT_BP_FP:
+ /* cpu is master */
+ tdm->ms_mode = TDM_AS_MASTER;
+ break;
+ case SND_SOC_DAIFMT_BC_FC:
+ /* codec is master */
+ tdm->ms_mode = TDM_AS_SLAVE;
+ break;
+ case SND_SOC_DAIFMT_BC_FP:
+ case SND_SOC_DAIFMT_BP_FC:
+ return -EINVAL;
+ default:
+ dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
+ return -EINVAL;
+ }
+
+ gbcr = (tdm->clkpolity << CLKPOL_BIT) |
+ (tdm->elm << ELM_BIT) |
+ (tdm->syncm << SYNCM_BIT) |
+ (tdm->ms_mode << MS_BIT);
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
+
+ return 0;
+}
+
+static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
+ .startup = jh7110_tdm_startup,
+ .hw_params = jh7110_tdm_hw_params,
+ .trigger = jh7110_tdm_trigger,
+ .set_fmt = jh7110_tdm_set_dai_fmt,
+};
+
+static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+
+ snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
+ snd_soc_dai_set_drvdata(dai, tdm);
+ return 0;
+}
+
+#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
+
+#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static struct snd_soc_dai_driver jh7110_tdm_dai = {
+ .name = "sf_tdm",
+ .id = 0,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = JH7110_TDM_RATES,
+ .formats = JH7110_TDM_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = JH7110_TDM_RATES,
+ .formats = JH7110_TDM_FORMATS,
+ },
+ .ops = &jh7110_tdm_dai_ops,
+ .probe = jh7110_tdm_dai_probe,
+ .symmetric_rate = 1,
+};
+
+static const struct snd_pcm_hardware jh7110_pcm_hardware = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER),
+ .buffer_bytes_max = 192512,
+ .period_bytes_min = 4096,
+ .period_bytes_max = 32768,
+ .periods_min = 1,
+ .periods_max = 48,
+ .fifo_size = 16,
+};
+
+static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
+ .pcm_hardware = &jh7110_pcm_hardware,
+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
+ .prealloc_buffer_size = 192512,
+};
+
+static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
+{
+ tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
+ tdm->elm = TDM_ELM_LATE;
+ tdm->syncm = TDM_SYNCM_SHORT;
+
+ tdm->rx.ifl = TDM_FIFO_HALF;
+ tdm->tx.ifl = TDM_FIFO_HALF;
+ tdm->rx.wl = TDM_16BIT_WORD_LEN;
+ tdm->tx.wl = TDM_16BIT_WORD_LEN;
+ tdm->rx.sscale = 2;
+ tdm->tx.sscale = 2;
+ tdm->rx.lrj = TDM_LEFT_JUSTIFT;
+ tdm->tx.lrj = TDM_LEFT_JUSTIFT;
+
+ tdm->play_dma_data.addr = JH7110_TDM_FIFO;
+ tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
+ tdm->play_dma_data.maxburst = 16;
+
+ tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
+ tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
+ tdm->capture_dma_data.maxburst = 8;
+}
+
+static int jh7110_tdm_clk_reset_get(struct platform_device *pdev,
+ struct jh7110_tdm_dev *tdm)
+{
+ int ret;
+
+ tdm->clks[0].id = "mclk_inner";
+ tdm->clks[1].id = "tdm_ahb";
+ tdm->clks[2].id = "tdm_apb";
+ tdm->clks[3].id = "tdm_internal";
+ tdm->clks[4].id = "tdm_ext";
+ tdm->clks[5].id = "tdm";
+
+ ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to get tdm clocks\n");
+ return ret;
+ }
+
+ tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
+ if (IS_ERR_OR_NULL(tdm->resets)) {
+ ret = PTR_ERR(tdm->resets);
+ dev_err(&pdev->dev, "Failed to get tdm resets");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int jh7110_tdm_probe(struct platform_device *pdev)
+{
+ struct jh7110_tdm_dev *tdm;
+ int ret;
+
+ tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
+ if (!tdm)
+ return -ENOMEM;
+
+ tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(tdm->tdm_base))
+ return PTR_ERR(tdm->tdm_base);
+
+ tdm->dev = &pdev->dev;
+
+ ret = jh7110_tdm_clk_reset_get(pdev, tdm);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
+ return ret;
+ }
+
+ jh7110_tdm_init_params(tdm);
+
+ dev_set_drvdata(&pdev->dev, tdm);
+ ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
+ &jh7110_tdm_dai, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to register dai\n");
+ return ret;
+ }
+
+ ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
+ &jh7110_dmaengine_pcm_config,
+ SND_DMAENGINE_PCM_FLAG_COMPAT);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
+ return ret;
+ }
+
+ pm_runtime_enable(&pdev->dev);
+ if (!pm_runtime_enabled(&pdev->dev)) {
+ ret = jh7110_tdm_runtime_resume(&pdev->dev);
+ if (ret)
+ goto err_pm_disable;
+ }
+
+ return 0;
+
+err_pm_disable:
+ pm_runtime_disable(&pdev->dev);
+
+ return ret;
+}
+
+static int jh7110_tdm_dev_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+ return 0;
+}
+
+static const struct of_device_id jh7110_tdm_of_match[] = {
+ { .compatible = "starfive,jh7110-tdm", },
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
+
+static const struct dev_pm_ops jh7110_tdm_pm_ops = {
+ RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
+ jh7110_tdm_runtime_resume, NULL)
+ SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
+ jh7110_tdm_system_resume)
+};
+
+static struct platform_driver jh7110_tdm_driver = {
+ .driver = {
+ .name = "jh7110-tdm",
+ .of_match_table = jh7110_tdm_of_match,
+ .pm = pm_ptr(&jh7110_tdm_pm_ops),
+ },
+ .probe = jh7110_tdm_probe,
+ .remove = jh7110_tdm_dev_remove,
+};
+module_platform_driver(jh7110_tdm_driver);
+
+MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
+MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
+MODULE_LICENSE("GPL");
--
2.17.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-26 14:53 [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-26 14:54 ` [PATCH v5 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
2023-05-26 14:54 ` [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
@ 2023-05-26 14:54 ` Walker Chen
2023-05-31 6:23 ` Hal Feng
2023-06-01 15:44 ` (subset) [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Mark Brown
3 siblings, 1 reply; 11+ messages in thread
From: Walker Chen @ 2023-05-26 14:54 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Hal Feng, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
.../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
2 files changed, 61 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 1155b97b593d..19b5954ee72d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -214,6 +214,40 @@
slew-rate = <0>;
};
};
+
+ tdm0_pins: tdm0-pins {
+ tdm0-pins-tx {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ tdm0-pins-rx {
+ pinmux = <GPIOMUX(61, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_RXD)>;
+ input-enable;
+ };
+
+ tdm0-pins-sync {
+ pinmux = <GPIOMUX(63, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_SYNC)>;
+ input-enable;
+ };
+
+ tdm0-pins-pcmclk {
+ pinmux = <GPIOMUX(38, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_CLK)>;
+ input-enable;
+ };
+ };
};
&uart0 {
@@ -221,3 +255,9 @@
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
+
+&tdm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tdm0_pins>;
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 866313570a7e..cfda6fb0d91b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -366,6 +366,27 @@
status = "disabled";
};
+ tdm: tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x0 0x10090000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
+ <&syscrg JH7110_SYSCLK_TDM_APB>,
+ <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
+ <&syscrg JH7110_SYSCLK_TDM_TDM>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
+ <&syscrg JH7110_SYSRST_TDM_APB>,
+ <&syscrg JH7110_SYSRST_TDM_CORE>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
stgcrg: clock-controller@10230000 {
compatible = "starfive,jh7110-stgcrg";
reg = <0x0 0x10230000 0x0 0x10000>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-26 14:54 ` [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
@ 2023-05-30 6:47 ` Claudiu.Beznea
2023-05-30 7:06 ` Claudiu.Beznea
2023-05-30 7:31 ` Walker Chen
0 siblings, 2 replies; 11+ messages in thread
From: Claudiu.Beznea @ 2023-05-30 6:47 UTC (permalink / raw)
To: walker.chen, broonie, lgirdwood, perex, tiwai, robh+dt,
krzysztof.kozlowski+dt, Conor.Dooley, emil.renner.berthing,
hal.feng
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 26.05.2023 17:54, Walker Chen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add tdm driver support for the StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
> MAINTAINERS | 6 +
> sound/soc/Kconfig | 1 +
> sound/soc/Makefile | 1 +
> sound/soc/starfive/Kconfig | 15 +
> sound/soc/starfive/Makefile | 2 +
> sound/soc/starfive/jh7110_tdm.c | 679 ++++++++++++++++++++++++++++++++
> 6 files changed, 704 insertions(+)
> create mode 100644 sound/soc/starfive/Kconfig
> create mode 100644 sound/soc/starfive/Makefile
> create mode 100644 sound/soc/starfive/jh7110_tdm.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2a0496448b7f..00478d07a9f4 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20132,6 +20132,12 @@ F: Documentation/devicetree/bindings/power/starfive*
> F: drivers/soc/starfive/jh71xx_pmu.c
> F: include/dt-bindings/power/starfive,jh7110-pmu.h
>
> +STARFIVE JH7110 TDM DRIVER
> +M: Walker Chen <walker.chen@starfivetech.com>
> +S: Maintained
> +F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
> +F: sound/soc/starfive/jh7110_tdm.c
> +
> STARFIVE SOC DRIVERS
> M: Conor Dooley <conor@kernel.org>
> S: Maintained
> diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
> index 848fbae26c3b..8d1d9401ecf2 100644
> --- a/sound/soc/Kconfig
> +++ b/sound/soc/Kconfig
> @@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
> source "sound/soc/sof/Kconfig"
> source "sound/soc/spear/Kconfig"
> source "sound/soc/sprd/Kconfig"
> +source "sound/soc/starfive/Kconfig"
> source "sound/soc/sti/Kconfig"
> source "sound/soc/stm/Kconfig"
> source "sound/soc/sunxi/Kconfig"
> diff --git a/sound/soc/Makefile b/sound/soc/Makefile
> index 507eaed1d6a1..65aeb4ef4068 100644
> --- a/sound/soc/Makefile
> +++ b/sound/soc/Makefile
> @@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
> obj-$(CONFIG_SND_SOC) += sof/
> obj-$(CONFIG_SND_SOC) += spear/
> obj-$(CONFIG_SND_SOC) += sprd/
> +obj-$(CONFIG_SND_SOC) += starfive/
> obj-$(CONFIG_SND_SOC) += sti/
> obj-$(CONFIG_SND_SOC) += stm/
> obj-$(CONFIG_SND_SOC) += sunxi/
> diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
> new file mode 100644
> index 000000000000..fafb681f8c0a
> --- /dev/null
> +++ b/sound/soc/starfive/Kconfig
> @@ -0,0 +1,15 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +config SND_SOC_STARFIVE
> + tristate "Audio support for StarFive SoC"
> + depends on COMPILE_TEST || ARCH_STARFIVE
> + help
> + Say Y or M if you want to add support for codecs attached to
> + the Starfive SoCs' Audio interfaces. You will also need to
> + select the audio interfaces to support below.
> +
> +config SND_SOC_JH7110_TDM
> + tristate "JH7110 TDM device driver"
> + depends on HAVE_CLK && SND_SOC_STARFIVE
> + select SND_SOC_GENERIC_DMAENGINE_PCM
> + help
> + Say Y or M if you want to add support for StarFive TDM driver.
> diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
> new file mode 100644
> index 000000000000..f7d960211d72
> --- /dev/null
> +++ b/sound/soc/starfive/Makefile
> @@ -0,0 +1,2 @@
> +# StarFive Platform Support
> +obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
> diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
> new file mode 100644
> index 000000000000..973b910d2d3e
> --- /dev/null
> +++ b/sound/soc/starfive/jh7110_tdm.c
> @@ -0,0 +1,679 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * jh7110_tdm.c -- StarFive JH7110 TDM driver
> + *
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + *
> + * Author: Walker Chen <walker.chen@starfivetech.com>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/dmaengine.h>
> +#include <linux/module.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
> +#include <linux/reset.h>
> +#include <linux/types.h>
> +#include <sound/dmaengine_pcm.h>
> +#include <sound/initval.h>
> +#include <sound/pcm.h>
> +#include <sound/pcm_params.h>
> +#include <sound/soc.h>
> +#include <sound/soc-dai.h>
> +
> +#define TDM_PCMGBCR 0x00
> + #define PCMGBCR_MASK 0x1e
This is not used.
> + #define PCMGBCR_ENABLE BIT(0)
Same
> + #define PCMGBCR_TRITXEN BIT(4)
This is not used
> + #define CLKPOL_BIT 5
> + #define TRITXEN_BIT 4
> + #define ELM_BIT 3
> + #define SYNCM_BIT 2
> + #define MS_BIT 1
Instead of these *_BIT defines as plain numbers you can defined them using
BIT() macro and use macros in place instead of
enum TDM_CLKPOL clkpolity;
enum TDM_ELM elm;
enum TDM_SYNCM syncm;
enum TDM_MASTER_SLAVE_MODE ms_mode;
These 1 tab indentation in defines seems a bit odd.
> +#define TDM_PCMTXCR 0x04
> + #define PCMTXCR_TXEN BIT(0)
> + #define IFL_BIT 11
> + #define WL_BIT 8
> + #define SSCALE_BIT 4
> + #define SL_BIT 2
> + #define LRJ_BIT 1
> +#define TDM_PCMRXCR 0x08
> + #define PCMRXCR_RXEN BIT(0)
> + #define PCMRXCR_RXSL_MASK 0xc
These:
> + #define PCMRXCR_RXSL_16BIT 0x4
> + #define PCMRXCR_RXSL_32BIT 0x8
> + #define PCMRXCR_SCALE_MASK 0xf0
> + #define PCMRXCR_SCALE_1CH 0x10
are not used
> +#define TDM_PCMDIV 0x0c
> +
> +#define JH7110_TDM_FIFO 0x170c0000
> +#define JH7110_TDM_FIFO_DEPTH 32
> +
> +enum TDM_MASTER_SLAVE_MODE {
> + TDM_AS_MASTER = 0,
> + TDM_AS_SLAVE,
> +};
> +
> +enum TDM_CLKPOL {
> + /* tx raising and rx falling */
> + TDM_TX_RASING_RX_FALLING = 0,
> + /* tx falling and rx raising */
> + TDM_TX_FALLING_RX_RASING,
> +};
> +
> +enum TDM_ELM {
> + /* only work while SYNCM=0 */
> + TDM_ELM_LATE = 0,
> + TDM_ELM_EARLY,
> +};
> +
> +enum TDM_SYNCM {
> + /* short frame sync */
> + TDM_SYNCM_SHORT = 0,
> + /* long frame sync */
> + TDM_SYNCM_LONG,
> +};
> +
> +enum TDM_IFL {
> + /* FIFO to send or received : half-1/2, Quarter-1/4 */
> + TDM_FIFO_HALF = 0,
> + TDM_FIFO_QUARTER,
> +};
> +
> +enum TDM_WL {
> + /* send or received word length */
> + TDM_8BIT_WORD_LEN = 0,
> + TDM_16BIT_WORD_LEN,
> + TDM_20BIT_WORD_LEN,
> + TDM_24BIT_WORD_LEN,
> + TDM_32BIT_WORD_LEN,
> +};
> +
> +enum TDM_SL {
> + /* send or received slot length */
> + TDM_8BIT_SLOT_LEN = 0,
> + TDM_16BIT_SLOT_LEN,
> + TDM_32BIT_SLOT_LEN,
> +};
> +
> +enum TDM_LRJ {
> + /* left-justify or right-justify */
> + TDM_RIGHT_JUSTIFY = 0,
> + TDM_LEFT_JUSTIFT,
> +};
> +
> +struct tdm_chan_cfg {
> + enum TDM_IFL ifl;
> + enum TDM_WL wl;
> + unsigned char sscale;
> + enum TDM_SL sl;
> + enum TDM_LRJ lrj;
> + unsigned char enable;
> +};
> +
> +struct jh7110_tdm_dev {
> + void __iomem *tdm_base;
> + struct device *dev;
> + struct clk_bulk_data clks[6];
> + struct reset_control *resets;
> +
> + enum TDM_CLKPOL clkpolity;
> + enum TDM_ELM elm;
> + enum TDM_SYNCM syncm;
> + enum TDM_MASTER_SLAVE_MODE ms_mode;
> +
> + struct tdm_chan_cfg tx;
> + struct tdm_chan_cfg rx;
> +
> + u16 syncdiv;
> + u32 samplerate;
> + u32 pcmclk;
> +
> + /* data related to DMA transfers b/w tdm and DMAC */
> + struct snd_dmaengine_dai_dma_data play_dma_data;
> + struct snd_dmaengine_dai_dma_data capture_dma_data;
> + u32 saved_pcmgbcr;
> + u32 saved_pcmtxcr;
> + u32 saved_pcmrxcr;
> + u32 saved_pcmdiv;
> +};
> +
> +static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
> +{
> + return readl_relaxed(tdm->tdm_base + reg);
> +}
> +
> +static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
> +{
> + writel_relaxed(val, tdm->tdm_base + reg);
> +}
> +
> +static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
> + else
> + tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
> +}
> +
> +static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + u32 data;
> +
> + data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
> +
> + /* restore context */
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
> + else
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
> +}
> +
> +static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + unsigned int val;
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
> + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
> + val &= ~PCMTXCR_TXEN;
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
> + } else {
> + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
> + val &= ~PCMRXCR_RXEN;
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
> + }
> +}
> +
> +static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
> +{
> + u32 sl, sscale, syncdiv;
> +
> + if (tdm->rx.sl >= tdm->tx.sl)
> + sl = tdm->rx.sl;
> + else
> + sl = tdm->tx.sl;
> +
> + if (tdm->rx.sscale >= tdm->tx.sscale)
> + sscale = tdm->rx.sscale;
> + else
> + sscale = tdm->tx.sscale;
> +
> + syncdiv = tdm->pcmclk / tdm->samplerate - 1;
> +
> + if ((syncdiv + 1) < (sl * sscale)) {
> + dev_err(tdm->dev, "Failed to set syncdiv!\n");
> + return -EINVAL;
> + }
> +
> + if (tdm->syncm == TDM_SYNCM_LONG &&
> + (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) &&
> + ((syncdiv + 1) <= sl)) {
> + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
> + return -EINVAL;
> + }
> +
> + jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
> + return 0;
> +}
> +
> +static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + u32 datarx, datatx;
> + int ret;
> +
> + ret = jh7110_tdm_syncdiv(tdm);
> + if (ret)
> + return ret;
> +
> + datarx = (tdm->rx.ifl << IFL_BIT) |
> + (tdm->rx.wl << WL_BIT) |
> + (tdm->rx.sscale << SSCALE_BIT) |
> + (tdm->rx.sl << SL_BIT) |
> + (tdm->rx.lrj << LRJ_BIT);
> +
> + datatx = (tdm->tx.ifl << IFL_BIT) |
> + (tdm->tx.wl << WL_BIT) |
> + (tdm->tx.sscale << SSCALE_BIT) |
> + (tdm->tx.sl << SL_BIT) |
> + (tdm->tx.lrj << LRJ_BIT);
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
> + else
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
> +
> + return 0;
> +}
> +
> +static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
> +{
> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
> +}
> +
> +static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
> +{
> + int ret;
> +
> + ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
> + if (ret) {
> + dev_err(tdm->dev, "Failed to enable tdm clocks\n");
> + return ret;
> + }
> +
> + ret = reset_control_deassert(tdm->resets);
> + if (ret) {
> + dev_err(tdm->dev, "Failed to deassert tdm resets\n");
> + goto dis_tdm_clk;
> + }
> +
> + /* select tdm_ext clock as the clock source for tdm */
> + ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
> + if (ret) {
> + dev_err(tdm->dev, "Can't set extern clock source for clk_tdm\n");
> + goto dis_tdm_clk;
> + }
> +
> + return 0;
> +
> +dis_tdm_clk:
> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
> +
> + return ret;
> +}
> +
> +static int jh7110_tdm_runtime_suspend(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + jh7110_tdm_clk_disable(tdm);
> + return 0;
> +}
> +
> +static int jh7110_tdm_runtime_resume(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + return jh7110_tdm_clk_enable(tdm);
> +}
> +
> +static int jh7110_tdm_system_suspend(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + /* save context */
> + tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
> + tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
> +
> + return pm_runtime_force_suspend(dev);
> +}
> +
> +static int jh7110_tdm_system_resume(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + /* restore context */
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
> + jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
> +
> + return pm_runtime_force_resume(dev);
> +}
> +
> +static const struct snd_soc_component_driver jh7110_tdm_component = {
> + .name = "jh7110-tdm",
> +};
> +
> +static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
> + struct snd_soc_dai *cpu_dai)
> +{
> + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
> + struct snd_soc_dai_link *dai_link = rtd->dai_link;
> +
> + dai_link->stop_dma_first = 1;
> +
> + return 0;
> +}
> +
> +static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> + int chan_wl, chan_sl, chan_nr;
> + unsigned int data_width;
> + unsigned int dma_bus_width;
> + struct snd_dmaengine_dai_dma_data *dma_data = NULL;
> + int ret;
> +
> + data_width = params_width(params);
> +
> + tdm->samplerate = params_rate(params);
> + tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
> +
> + switch (params_format(params)) {
> + case SNDRV_PCM_FORMAT_S16_LE:
> + chan_wl = TDM_16BIT_WORD_LEN;
> + chan_sl = TDM_16BIT_SLOT_LEN;
> + dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + break;
> +
> + case SNDRV_PCM_FORMAT_S32_LE:
> + chan_wl = TDM_32BIT_WORD_LEN;
> + chan_sl = TDM_32BIT_SLOT_LEN;
> + dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> + break;
> +
> + default:
> + dev_err(tdm->dev, "tdm: unsupported PCM fmt");
> + return -EINVAL;
> + }
> +
> + chan_nr = params_channels(params);
> + switch (chan_nr) {
> + case 1:
> + case 2:
> + case 4:
> + case 6:
> + case 8:
> + break;
> + default:
> + dev_err(tdm->dev, "channel not supported\n");
> + return -EINVAL;
> + }
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
> + tdm->tx.wl = chan_wl;
> + tdm->tx.sl = chan_sl;
> + tdm->tx.sscale = chan_nr;
> + tdm->play_dma_data.addr_width = dma_bus_width;
> + dma_data = &tdm->play_dma_data;
> + } else {
> + tdm->rx.wl = chan_wl;
> + tdm->rx.sl = chan_sl;
> + tdm->rx.sscale = chan_nr;
> + tdm->capture_dma_data.addr_width = dma_bus_width;
> + dma_data = &tdm->capture_dma_data;
> + }
> +
> + snd_soc_dai_set_dma_data(dai, substream, dma_data);
> +
> + ret = jh7110_tdm_config(tdm, substream);
> + if (ret)
> + return ret;
> +
> + jh7110_tdm_save_context(tdm, substream);
> + return 0;
> +}
> +
> +static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
> + int cmd, struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> + int ret = 0;
> +
> + switch (cmd) {
> + case SNDRV_PCM_TRIGGER_START:
> + case SNDRV_PCM_TRIGGER_RESUME:
> + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
> + jh7110_tdm_start(tdm, substream);
> + break;
> +
> + case SNDRV_PCM_TRIGGER_STOP:
> + case SNDRV_PCM_TRIGGER_SUSPEND:
> + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
> + jh7110_tdm_stop(tdm, substream);
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> +
> + return ret;
> +}
> +
> +static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
> + unsigned int fmt)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int gbcr;
> +
> + /* set master/slave audio interface */
> + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
> + case SND_SOC_DAIFMT_BP_FP:
> + /* cpu is master */
> + tdm->ms_mode = TDM_AS_MASTER;
> + break;
> + case SND_SOC_DAIFMT_BC_FC:
> + /* codec is master */
> + tdm->ms_mode = TDM_AS_SLAVE;
> + break;
> + case SND_SOC_DAIFMT_BC_FP:
> + case SND_SOC_DAIFMT_BP_FC:
> + return -EINVAL;
> + default:
> + dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
> + return -EINVAL;
> + }
> +
> + gbcr = (tdm->clkpolity << CLKPOL_BIT) |
> + (tdm->elm << ELM_BIT) |
> + (tdm->syncm << SYNCM_BIT) |
> + (tdm->ms_mode << MS_BIT);
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
> +
> + return 0;
> +}
> +
> +static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
> + .startup = jh7110_tdm_startup,
> + .hw_params = jh7110_tdm_hw_params,
> + .trigger = jh7110_tdm_trigger,
> + .set_fmt = jh7110_tdm_set_dai_fmt,
> +};
> +
> +static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> +
> + snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
> + snd_soc_dai_set_drvdata(dai, tdm);
> + return 0;
> +}
> +
> +#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
> +
> +#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
> + SNDRV_PCM_FMTBIT_S32_LE)
> +
> +static struct snd_soc_dai_driver jh7110_tdm_dai = {
> + .name = "sf_tdm",
> + .id = 0,
> + .playback = {
> + .stream_name = "Playback",
> + .channels_min = 1,
> + .channels_max = 8,
> + .rates = JH7110_TDM_RATES,
> + .formats = JH7110_TDM_FORMATS,
> + },
> + .capture = {
> + .stream_name = "Capture",
> + .channels_min = 1,
> + .channels_max = 8,
> + .rates = JH7110_TDM_RATES,
> + .formats = JH7110_TDM_FORMATS,
> + },
> + .ops = &jh7110_tdm_dai_ops,
> + .probe = jh7110_tdm_dai_probe,
> + .symmetric_rate = 1,
> +};
> +
> +static const struct snd_pcm_hardware jh7110_pcm_hardware = {
> + .info = (SNDRV_PCM_INFO_MMAP |
> + SNDRV_PCM_INFO_MMAP_VALID |
> + SNDRV_PCM_INFO_PAUSE |
> + SNDRV_PCM_INFO_RESUME |
> + SNDRV_PCM_INFO_INTERLEAVED |
> + SNDRV_PCM_INFO_BLOCK_TRANSFER),
> + .buffer_bytes_max = 192512,
> + .period_bytes_min = 4096,
> + .period_bytes_max = 32768,
> + .periods_min = 1,
> + .periods_max = 48,
> + .fifo_size = 16,
> +};
> +
> +static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
> + .pcm_hardware = &jh7110_pcm_hardware,
> + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
> + .prealloc_buffer_size = 192512,
> +};
> +
> +static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
> +{
> + tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
> + tdm->elm = TDM_ELM_LATE;
> + tdm->syncm = TDM_SYNCM_SHORT;
> +
> + tdm->rx.ifl = TDM_FIFO_HALF;
> + tdm->tx.ifl = TDM_FIFO_HALF;
> + tdm->rx.wl = TDM_16BIT_WORD_LEN;
> + tdm->tx.wl = TDM_16BIT_WORD_LEN;
> + tdm->rx.sscale = 2;
> + tdm->tx.sscale = 2;
> + tdm->rx.lrj = TDM_LEFT_JUSTIFT;
> + tdm->tx.lrj = TDM_LEFT_JUSTIFT;
> +
> + tdm->play_dma_data.addr = JH7110_TDM_FIFO;
> + tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
> + tdm->play_dma_data.maxburst = 16;
> +
> + tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
> + tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
> + tdm->capture_dma_data.maxburst = 8;
> +}
> +
> +static int jh7110_tdm_clk_reset_get(struct platform_device *pdev,
> + struct jh7110_tdm_dev *tdm)
> +{
> + int ret;
> +
> + tdm->clks[0].id = "mclk_inner";
> + tdm->clks[1].id = "tdm_ahb";
> + tdm->clks[2].id = "tdm_apb";
> + tdm->clks[3].id = "tdm_internal";
> + tdm->clks[4].id = "tdm_ext";
> + tdm->clks[5].id = "tdm";
> +
> + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to get tdm clocks\n");
> + return ret;
> + }
> +
> + tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
> + if (IS_ERR_OR_NULL(tdm->resets)) {
Looking in depth on devm_reset_control_array_get_exclusive() it seems the
NULL cannot be returned by devm_reset_control_array_get_exclusive() as
optinal argument is false, thus the IS_ERR() that was here on previous
version was good. Could you return back to that? Sorry for the confusion.
> + ret = PTR_ERR(tdm->resets);
> + dev_err(&pdev->dev, "Failed to get tdm resets");
> + return ret;
Also, you could avoid this return
> + }
> +
> + return 0;
and do here:
return ret;
Other than this:
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> +}
> +
> +static int jh7110_tdm_probe(struct platform_device *pdev)
> +{
> + struct jh7110_tdm_dev *tdm;
> + int ret;
> +
> + tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
> + if (!tdm)
> + return -ENOMEM;
> +
> + tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(tdm->tdm_base))
> + return PTR_ERR(tdm->tdm_base);
> +
> + tdm->dev = &pdev->dev;
> +
> + ret = jh7110_tdm_clk_reset_get(pdev, tdm);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
> + return ret;
> + }
> +
> + jh7110_tdm_init_params(tdm);
> +
> + dev_set_drvdata(&pdev->dev, tdm);
> + ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
> + &jh7110_tdm_dai, 1);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to register dai\n");
> + return ret;
> + }
> +
> + ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
> + &jh7110_dmaengine_pcm_config,
> + SND_DMAENGINE_PCM_FLAG_COMPAT);
> + if (ret) {
> + dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
> + return ret;
> + }
> +
> + pm_runtime_enable(&pdev->dev);
> + if (!pm_runtime_enabled(&pdev->dev)) {
> + ret = jh7110_tdm_runtime_resume(&pdev->dev);
> + if (ret)
> + goto err_pm_disable;
> + }
> +
> + return 0;
> +
> +err_pm_disable:
> + pm_runtime_disable(&pdev->dev);
> +
> + return ret;
> +}
> +
> +static int jh7110_tdm_dev_remove(struct platform_device *pdev)
> +{
> + pm_runtime_disable(&pdev->dev);
> + return 0;
> +}
> +
> +static const struct of_device_id jh7110_tdm_of_match[] = {
> + { .compatible = "starfive,jh7110-tdm", },
> + {}
> +};
> +
> +MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
> +
> +static const struct dev_pm_ops jh7110_tdm_pm_ops = {
> + RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
> + jh7110_tdm_runtime_resume, NULL)
> + SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
> + jh7110_tdm_system_resume)
> +};
> +
> +static struct platform_driver jh7110_tdm_driver = {
> + .driver = {
> + .name = "jh7110-tdm",
> + .of_match_table = jh7110_tdm_of_match,
> + .pm = pm_ptr(&jh7110_tdm_pm_ops),
> + },
> + .probe = jh7110_tdm_probe,
> + .remove = jh7110_tdm_dev_remove,
> +};
> +module_platform_driver(jh7110_tdm_driver);
> +
> +MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
> +MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
> +MODULE_LICENSE("GPL");
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-30 6:47 ` Claudiu.Beznea
@ 2023-05-30 7:06 ` Claudiu.Beznea
2023-05-30 7:31 ` Walker Chen
1 sibling, 0 replies; 11+ messages in thread
From: Claudiu.Beznea @ 2023-05-30 7:06 UTC (permalink / raw)
To: walker.chen, broonie, lgirdwood, perex, tiwai, robh+dt,
krzysztof.kozlowski+dt, Conor.Dooley, emil.renner.berthing,
hal.feng
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 30.05.2023 09:47, Claudiu Beznea - M18063 wrote:
>> + #define CLKPOL_BIT 5
>> + #define TRITXEN_BIT 4
>> + #define ELM_BIT 3
>> + #define SYNCM_BIT 2
>> + #define MS_BIT 1
> Instead of these *_BIT defines as plain numbers you can defined them using
> BIT() macro and use macros in place instead of
> enum TDM_CLKPOL clkpolity;
> enum TDM_ELM elm;
> enum TDM_SYNCM syncm;
> enum TDM_MASTER_SLAVE_MODE ms_mode;
Something happens w/ my email client and I sent this section by accident.
Thus you can ignore it.
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-30 6:47 ` Claudiu.Beznea
2023-05-30 7:06 ` Claudiu.Beznea
@ 2023-05-30 7:31 ` Walker Chen
1 sibling, 0 replies; 11+ messages in thread
From: Walker Chen @ 2023-05-30 7:31 UTC (permalink / raw)
To: Claudiu.Beznea, broonie, lgirdwood, perex, tiwai, robh+dt,
krzysztof.kozlowski+dt, Conor.Dooley, emil.renner.berthing,
hal.feng
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 2023/5/30 14:47, Claudiu.Beznea@microchip.com wrote:
> On 26.05.2023 17:54, Walker Chen wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Add tdm driver support for the StarFive JH7110 SoC.
>>
>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> ---
>> MAINTAINERS | 6 +
>> sound/soc/Kconfig | 1 +
>> sound/soc/Makefile | 1 +
>> sound/soc/starfive/Kconfig | 15 +
>> sound/soc/starfive/Makefile | 2 +
>> sound/soc/starfive/jh7110_tdm.c | 679 ++++++++++++++++++++++++++++++++
>> 6 files changed, 704 insertions(+)
>> create mode 100644 sound/soc/starfive/Kconfig
>> create mode 100644 sound/soc/starfive/Makefile
>> create mode 100644 sound/soc/starfive/jh7110_tdm.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 2a0496448b7f..00478d07a9f4 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -20132,6 +20132,12 @@ F: Documentation/devicetree/bindings/power/starfive*
>> F: drivers/soc/starfive/jh71xx_pmu.c
>> F: include/dt-bindings/power/starfive,jh7110-pmu.h
>>
>> +STARFIVE JH7110 TDM DRIVER
>> +M: Walker Chen <walker.chen@starfivetech.com>
>> +S: Maintained
>> +F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
>> +F: sound/soc/starfive/jh7110_tdm.c
>> +
>> STARFIVE SOC DRIVERS
>> M: Conor Dooley <conor@kernel.org>
>> S: Maintained
>> diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
>> index 848fbae26c3b..8d1d9401ecf2 100644
>> --- a/sound/soc/Kconfig
>> +++ b/sound/soc/Kconfig
>> @@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
>> source "sound/soc/sof/Kconfig"
>> source "sound/soc/spear/Kconfig"
>> source "sound/soc/sprd/Kconfig"
>> +source "sound/soc/starfive/Kconfig"
>> source "sound/soc/sti/Kconfig"
>> source "sound/soc/stm/Kconfig"
>> source "sound/soc/sunxi/Kconfig"
>> diff --git a/sound/soc/Makefile b/sound/soc/Makefile
>> index 507eaed1d6a1..65aeb4ef4068 100644
>> --- a/sound/soc/Makefile
>> +++ b/sound/soc/Makefile
>> @@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
>> obj-$(CONFIG_SND_SOC) += sof/
>> obj-$(CONFIG_SND_SOC) += spear/
>> obj-$(CONFIG_SND_SOC) += sprd/
>> +obj-$(CONFIG_SND_SOC) += starfive/
>> obj-$(CONFIG_SND_SOC) += sti/
>> obj-$(CONFIG_SND_SOC) += stm/
>> obj-$(CONFIG_SND_SOC) += sunxi/
>> diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
>> new file mode 100644
>> index 000000000000..fafb681f8c0a
>> --- /dev/null
>> +++ b/sound/soc/starfive/Kconfig
>> @@ -0,0 +1,15 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +config SND_SOC_STARFIVE
>> + tristate "Audio support for StarFive SoC"
>> + depends on COMPILE_TEST || ARCH_STARFIVE
>> + help
>> + Say Y or M if you want to add support for codecs attached to
>> + the Starfive SoCs' Audio interfaces. You will also need to
>> + select the audio interfaces to support below.
>> +
>> +config SND_SOC_JH7110_TDM
>> + tristate "JH7110 TDM device driver"
>> + depends on HAVE_CLK && SND_SOC_STARFIVE
>> + select SND_SOC_GENERIC_DMAENGINE_PCM
>> + help
>> + Say Y or M if you want to add support for StarFive TDM driver.
>> diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
>> new file mode 100644
>> index 000000000000..f7d960211d72
>> --- /dev/null
>> +++ b/sound/soc/starfive/Makefile
>> @@ -0,0 +1,2 @@
>> +# StarFive Platform Support
>> +obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
>> diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
>> new file mode 100644
>> index 000000000000..973b910d2d3e
>> --- /dev/null
>> +++ b/sound/soc/starfive/jh7110_tdm.c
>> @@ -0,0 +1,679 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * jh7110_tdm.c -- StarFive JH7110 TDM driver
>> + *
>> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
>> + *
>> + * Author: Walker Chen <walker.chen@starfivetech.com>
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/device.h>
>> +#include <linux/dmaengine.h>
>> +#include <linux/module.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/pm_runtime.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset.h>
>> +#include <linux/types.h>
>> +#include <sound/dmaengine_pcm.h>
>> +#include <sound/initval.h>
>> +#include <sound/pcm.h>
>> +#include <sound/pcm_params.h>
>> +#include <sound/soc.h>
>> +#include <sound/soc-dai.h>
>> +
>> +#define TDM_PCMGBCR 0x00
>> + #define PCMGBCR_MASK 0x1e
>
> This is not used.
>
>> + #define PCMGBCR_ENABLE BIT(0)
>
> Same
>
>> + #define PCMGBCR_TRITXEN BIT(4)
>
> This is not used
>
>> + #define CLKPOL_BIT 5
>> + #define TRITXEN_BIT 4
>> + #define ELM_BIT 3
>> + #define SYNCM_BIT 2
>> + #define MS_BIT 1
>
> Instead of these *_BIT defines as plain numbers you can defined them using
> BIT() macro and use macros in place instead of
> enum TDM_CLKPOL clkpolity;
> enum TDM_ELM elm;
> enum TDM_SYNCM syncm;
> enum TDM_MASTER_SLAVE_MODE ms_mode;
>
> These 1 tab indentation in defines seems a bit odd.
Hi Claudiu,
Thank you very much for quick response!
Although I have already submitted the 5th version, you still helped me identify so many bugs
or areas that are not good enough. Thank you again for your strong support!
These issues you mentioned above will be fixed in the next submission.
>
>> +#define TDM_PCMTXCR 0x04
>> + #define PCMTXCR_TXEN BIT(0)
>> + #define IFL_BIT 11
>> + #define WL_BIT 8
>> + #define SSCALE_BIT 4
>> + #define SL_BIT 2
>> + #define LRJ_BIT 1
>> +#define TDM_PCMRXCR 0x08
>> + #define PCMRXCR_RXEN BIT(0)
>> + #define PCMRXCR_RXSL_MASK 0xc
>
> These:
>
>> + #define PCMRXCR_RXSL_16BIT 0x4
>> + #define PCMRXCR_RXSL_32BIT 0x8
>> + #define PCMRXCR_SCALE_MASK 0xf0
>> + #define PCMRXCR_SCALE_1CH 0x10
>
> are not used
>
>> +#define TDM_PCMDIV 0x0c
>> +
>> +#define JH7110_TDM_FIFO 0x170c0000
>> +#define JH7110_TDM_FIFO_DEPTH 32
>> +
>> +enum TDM_MASTER_SLAVE_MODE {
>> + TDM_AS_MASTER = 0,
>> + TDM_AS_SLAVE,
>> +};
>> +
>> +enum TDM_CLKPOL {
>> + /* tx raising and rx falling */
>> + TDM_TX_RASING_RX_FALLING = 0,
>> + /* tx falling and rx raising */
>> + TDM_TX_FALLING_RX_RASING,
>> +};
>> +
>> +enum TDM_ELM {
>> + /* only work while SYNCM=0 */
>> + TDM_ELM_LATE = 0,
>> + TDM_ELM_EARLY,
>> +};
>> +
>> +enum TDM_SYNCM {
>> + /* short frame sync */
>> + TDM_SYNCM_SHORT = 0,
>> + /* long frame sync */
>> + TDM_SYNCM_LONG,
>> +};
>> +
>> +enum TDM_IFL {
>> + /* FIFO to send or received : half-1/2, Quarter-1/4 */
>> + TDM_FIFO_HALF = 0,
>> + TDM_FIFO_QUARTER,
>> +};
>> +
>> +enum TDM_WL {
>> + /* send or received word length */
>> + TDM_8BIT_WORD_LEN = 0,
>> + TDM_16BIT_WORD_LEN,
>> + TDM_20BIT_WORD_LEN,
>> + TDM_24BIT_WORD_LEN,
>> + TDM_32BIT_WORD_LEN,
>> +};
>> +
>> +enum TDM_SL {
>> + /* send or received slot length */
>> + TDM_8BIT_SLOT_LEN = 0,
>> + TDM_16BIT_SLOT_LEN,
>> + TDM_32BIT_SLOT_LEN,
>> +};
>> +
>> +enum TDM_LRJ {
>> + /* left-justify or right-justify */
>> + TDM_RIGHT_JUSTIFY = 0,
>> + TDM_LEFT_JUSTIFT,
>> +};
>> +
>> +struct tdm_chan_cfg {
>> + enum TDM_IFL ifl;
>> + enum TDM_WL wl;
>> + unsigned char sscale;
>> + enum TDM_SL sl;
>> + enum TDM_LRJ lrj;
>> + unsigned char enable;
>> +};
>> +
>> +struct jh7110_tdm_dev {
>> + void __iomem *tdm_base;
>> + struct device *dev;
>> + struct clk_bulk_data clks[6];
>> + struct reset_control *resets;
>> +
>> + enum TDM_CLKPOL clkpolity;
>> + enum TDM_ELM elm;
>> + enum TDM_SYNCM syncm;
>> + enum TDM_MASTER_SLAVE_MODE ms_mode;
>> +
>> + struct tdm_chan_cfg tx;
>> + struct tdm_chan_cfg rx;
>> +
>> + u16 syncdiv;
>> + u32 samplerate;
>> + u32 pcmclk;
>> +
>> + /* data related to DMA transfers b/w tdm and DMAC */
>> + struct snd_dmaengine_dai_dma_data play_dma_data;
>> + struct snd_dmaengine_dai_dma_data capture_dma_data;
>> + u32 saved_pcmgbcr;
>> + u32 saved_pcmtxcr;
>> + u32 saved_pcmrxcr;
>> + u32 saved_pcmdiv;
>> +};
>> +
>> +static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
>> +{
>> + return readl_relaxed(tdm->tdm_base + reg);
>> +}
>> +
>> +static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
>> +{
>> + writel_relaxed(val, tdm->tdm_base + reg);
>> +}
>> +
>> +static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
>> + else
>> + tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
>> +}
>> +
>> +static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + u32 data;
>> +
>> + data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
>> +
>> + /* restore context */
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
>> + else
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
>> +}
>> +
>> +static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + unsigned int val;
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
>> + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
>> + val &= ~PCMTXCR_TXEN;
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
>> + } else {
>> + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
>> + val &= ~PCMRXCR_RXEN;
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
>> + }
>> +}
>> +
>> +static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
>> +{
>> + u32 sl, sscale, syncdiv;
>> +
>> + if (tdm->rx.sl >= tdm->tx.sl)
>> + sl = tdm->rx.sl;
>> + else
>> + sl = tdm->tx.sl;
>> +
>> + if (tdm->rx.sscale >= tdm->tx.sscale)
>> + sscale = tdm->rx.sscale;
>> + else
>> + sscale = tdm->tx.sscale;
>> +
>> + syncdiv = tdm->pcmclk / tdm->samplerate - 1;
>> +
>> + if ((syncdiv + 1) < (sl * sscale)) {
>> + dev_err(tdm->dev, "Failed to set syncdiv!\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (tdm->syncm == TDM_SYNCM_LONG &&
>> + (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) &&
>> + ((syncdiv + 1) <= sl)) {
>> + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
>> + return -EINVAL;
>> + }
>> +
>> + jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + u32 datarx, datatx;
>> + int ret;
>> +
>> + ret = jh7110_tdm_syncdiv(tdm);
>> + if (ret)
>> + return ret;
>> +
>> + datarx = (tdm->rx.ifl << IFL_BIT) |
>> + (tdm->rx.wl << WL_BIT) |
>> + (tdm->rx.sscale << SSCALE_BIT) |
>> + (tdm->rx.sl << SL_BIT) |
>> + (tdm->rx.lrj << LRJ_BIT);
>> +
>> + datatx = (tdm->tx.ifl << IFL_BIT) |
>> + (tdm->tx.wl << WL_BIT) |
>> + (tdm->tx.sscale << SSCALE_BIT) |
>> + (tdm->tx.sl << SL_BIT) |
>> + (tdm->tx.lrj << LRJ_BIT);
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
>> + else
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
>> +
>> + return 0;
>> +}
>> +
>> +static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
>> +{
>> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
>> +}
>> +
>> +static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
>> +{
>> + int ret;
>> +
>> + ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
>> + if (ret) {
>> + dev_err(tdm->dev, "Failed to enable tdm clocks\n");
>> + return ret;
>> + }
>> +
>> + ret = reset_control_deassert(tdm->resets);
>> + if (ret) {
>> + dev_err(tdm->dev, "Failed to deassert tdm resets\n");
>> + goto dis_tdm_clk;
>> + }
>> +
>> + /* select tdm_ext clock as the clock source for tdm */
>> + ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
>> + if (ret) {
>> + dev_err(tdm->dev, "Can't set extern clock source for clk_tdm\n");
>> + goto dis_tdm_clk;
>> + }
>> +
>> + return 0;
>> +
>> +dis_tdm_clk:
>> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
>> +
>> + return ret;
>> +}
>> +
>> +static int jh7110_tdm_runtime_suspend(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + jh7110_tdm_clk_disable(tdm);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_runtime_resume(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + return jh7110_tdm_clk_enable(tdm);
>> +}
>> +
>> +static int jh7110_tdm_system_suspend(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + /* save context */
>> + tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
>> + tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
>> +
>> + return pm_runtime_force_suspend(dev);
>> +}
>> +
>> +static int jh7110_tdm_system_resume(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + /* restore context */
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
>> + jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
>> +
>> + return pm_runtime_force_resume(dev);
>> +}
>> +
>> +static const struct snd_soc_component_driver jh7110_tdm_component = {
>> + .name = "jh7110-tdm",
>> +};
>> +
>> +static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
>> + struct snd_soc_dai *cpu_dai)
>> +{
>> + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
>> + struct snd_soc_dai_link *dai_link = rtd->dai_link;
>> +
>> + dai_link->stop_dma_first = 1;
>> +
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
>> + struct snd_pcm_hw_params *params,
>> + struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> + int chan_wl, chan_sl, chan_nr;
>> + unsigned int data_width;
>> + unsigned int dma_bus_width;
>> + struct snd_dmaengine_dai_dma_data *dma_data = NULL;
>> + int ret;
>> +
>> + data_width = params_width(params);
>> +
>> + tdm->samplerate = params_rate(params);
>> + tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
>> +
>> + switch (params_format(params)) {
>> + case SNDRV_PCM_FORMAT_S16_LE:
>> + chan_wl = TDM_16BIT_WORD_LEN;
>> + chan_sl = TDM_16BIT_SLOT_LEN;
>> + dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + break;
>> +
>> + case SNDRV_PCM_FORMAT_S32_LE:
>> + chan_wl = TDM_32BIT_WORD_LEN;
>> + chan_sl = TDM_32BIT_SLOT_LEN;
>> + dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
>> + break;
>> +
>> + default:
>> + dev_err(tdm->dev, "tdm: unsupported PCM fmt");
>> + return -EINVAL;
>> + }
>> +
>> + chan_nr = params_channels(params);
>> + switch (chan_nr) {
>> + case 1:
>> + case 2:
>> + case 4:
>> + case 6:
>> + case 8:
>> + break;
>> + default:
>> + dev_err(tdm->dev, "channel not supported\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
>> + tdm->tx.wl = chan_wl;
>> + tdm->tx.sl = chan_sl;
>> + tdm->tx.sscale = chan_nr;
>> + tdm->play_dma_data.addr_width = dma_bus_width;
>> + dma_data = &tdm->play_dma_data;
>> + } else {
>> + tdm->rx.wl = chan_wl;
>> + tdm->rx.sl = chan_sl;
>> + tdm->rx.sscale = chan_nr;
>> + tdm->capture_dma_data.addr_width = dma_bus_width;
>> + dma_data = &tdm->capture_dma_data;
>> + }
>> +
>> + snd_soc_dai_set_dma_data(dai, substream, dma_data);
>> +
>> + ret = jh7110_tdm_config(tdm, substream);
>> + if (ret)
>> + return ret;
>> +
>> + jh7110_tdm_save_context(tdm, substream);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
>> + int cmd, struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> + int ret = 0;
>> +
>> + switch (cmd) {
>> + case SNDRV_PCM_TRIGGER_START:
>> + case SNDRV_PCM_TRIGGER_RESUME:
>> + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
>> + jh7110_tdm_start(tdm, substream);
>> + break;
>> +
>> + case SNDRV_PCM_TRIGGER_STOP:
>> + case SNDRV_PCM_TRIGGER_SUSPEND:
>> + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
>> + jh7110_tdm_stop(tdm, substream);
>> + break;
>> + default:
>> + ret = -EINVAL;
>> + break;
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
>> + unsigned int fmt)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
>> + unsigned int gbcr;
>> +
>> + /* set master/slave audio interface */
>> + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
>> + case SND_SOC_DAIFMT_BP_FP:
>> + /* cpu is master */
>> + tdm->ms_mode = TDM_AS_MASTER;
>> + break;
>> + case SND_SOC_DAIFMT_BC_FC:
>> + /* codec is master */
>> + tdm->ms_mode = TDM_AS_SLAVE;
>> + break;
>> + case SND_SOC_DAIFMT_BC_FP:
>> + case SND_SOC_DAIFMT_BP_FC:
>> + return -EINVAL;
>> + default:
>> + dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
>> + return -EINVAL;
>> + }
>> +
>> + gbcr = (tdm->clkpolity << CLKPOL_BIT) |
>> + (tdm->elm << ELM_BIT) |
>> + (tdm->syncm << SYNCM_BIT) |
>> + (tdm->ms_mode << MS_BIT);
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
>> + .startup = jh7110_tdm_startup,
>> + .hw_params = jh7110_tdm_hw_params,
>> + .trigger = jh7110_tdm_trigger,
>> + .set_fmt = jh7110_tdm_set_dai_fmt,
>> +};
>> +
>> +static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> +
>> + snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
>> + snd_soc_dai_set_drvdata(dai, tdm);
>> + return 0;
>> +}
>> +
>> +#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
>> +
>> +#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
>> + SNDRV_PCM_FMTBIT_S32_LE)
>> +
>> +static struct snd_soc_dai_driver jh7110_tdm_dai = {
>> + .name = "sf_tdm",
>> + .id = 0,
>> + .playback = {
>> + .stream_name = "Playback",
>> + .channels_min = 1,
>> + .channels_max = 8,
>> + .rates = JH7110_TDM_RATES,
>> + .formats = JH7110_TDM_FORMATS,
>> + },
>> + .capture = {
>> + .stream_name = "Capture",
>> + .channels_min = 1,
>> + .channels_max = 8,
>> + .rates = JH7110_TDM_RATES,
>> + .formats = JH7110_TDM_FORMATS,
>> + },
>> + .ops = &jh7110_tdm_dai_ops,
>> + .probe = jh7110_tdm_dai_probe,
>> + .symmetric_rate = 1,
>> +};
>> +
>> +static const struct snd_pcm_hardware jh7110_pcm_hardware = {
>> + .info = (SNDRV_PCM_INFO_MMAP |
>> + SNDRV_PCM_INFO_MMAP_VALID |
>> + SNDRV_PCM_INFO_PAUSE |
>> + SNDRV_PCM_INFO_RESUME |
>> + SNDRV_PCM_INFO_INTERLEAVED |
>> + SNDRV_PCM_INFO_BLOCK_TRANSFER),
>> + .buffer_bytes_max = 192512,
>> + .period_bytes_min = 4096,
>> + .period_bytes_max = 32768,
>> + .periods_min = 1,
>> + .periods_max = 48,
>> + .fifo_size = 16,
>> +};
>> +
>> +static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
>> + .pcm_hardware = &jh7110_pcm_hardware,
>> + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
>> + .prealloc_buffer_size = 192512,
>> +};
>> +
>> +static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
>> +{
>> + tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
>> + tdm->elm = TDM_ELM_LATE;
>> + tdm->syncm = TDM_SYNCM_SHORT;
>> +
>> + tdm->rx.ifl = TDM_FIFO_HALF;
>> + tdm->tx.ifl = TDM_FIFO_HALF;
>> + tdm->rx.wl = TDM_16BIT_WORD_LEN;
>> + tdm->tx.wl = TDM_16BIT_WORD_LEN;
>> + tdm->rx.sscale = 2;
>> + tdm->tx.sscale = 2;
>> + tdm->rx.lrj = TDM_LEFT_JUSTIFT;
>> + tdm->tx.lrj = TDM_LEFT_JUSTIFT;
>> +
>> + tdm->play_dma_data.addr = JH7110_TDM_FIFO;
>> + tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
>> + tdm->play_dma_data.maxburst = 16;
>> +
>> + tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
>> + tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
>> + tdm->capture_dma_data.maxburst = 8;
>> +}
>> +
>> +static int jh7110_tdm_clk_reset_get(struct platform_device *pdev,
>> + struct jh7110_tdm_dev *tdm)
>> +{
>> + int ret;
>> +
>> + tdm->clks[0].id = "mclk_inner";
>> + tdm->clks[1].id = "tdm_ahb";
>> + tdm->clks[2].id = "tdm_apb";
>> + tdm->clks[3].id = "tdm_internal";
>> + tdm->clks[4].id = "tdm_ext";
>> + tdm->clks[5].id = "tdm";
>> +
>> + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to get tdm clocks\n");
>> + return ret;
>> + }
>> +
>> + tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
>> + if (IS_ERR_OR_NULL(tdm->resets)) {
>
> Looking in depth on devm_reset_control_array_get_exclusive() it seems the
> NULL cannot be returned by devm_reset_control_array_get_exclusive() as
> optinal argument is false, thus the IS_ERR() that was here on previous
> version was good. Could you return back to that? Sorry for the confusion.
Yes, I have seen the usage of devm_reset_control_array_get_exclusive() for other platform in kernel.
They all use the macro IS_ERR(), like this:
priv->reset = devm_reset_control_array_get_exclusive(dev);
if (IS_ERR(priv->reset))
return PTR_ERR(priv->reset);
So I would like to return back to that.
>
>> + ret = PTR_ERR(tdm->resets);
>> + dev_err(&pdev->dev, "Failed to get tdm resets");
>> + return ret;
>
> Also, you could avoid this return
>> + }
>> +
>> + return 0;
>
> and do here:
> return ret;
>
> Other than this:
>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Best regards,
Walker
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-26 14:54 ` [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
@ 2023-05-31 6:23 ` Hal Feng
2023-05-31 6:30 ` Walker Chen
0 siblings, 1 reply; 11+ messages in thread
From: Hal Feng @ 2023-05-31 6:23 UTC (permalink / raw)
To: Walker Chen, Mark Brown, Liam Girdwood, Claudiu Beznea,
Jaroslav Kysela, Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Emil Renner Berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
> Add the tdm controller node and pins configuration of tdm for the
> StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 1155b97b593d..19b5954ee72d 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -214,6 +214,40 @@
> slew-rate = <0>;
> };
> };
> +
> + tdm0_pins: tdm0-pins {
> + tdm0-pins-tx {
Use consistent naming, so
tdm_pins: tdm-0 {
tx-pins {
> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + tdm0-pins-rx {
rx-pins {
> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_RXD)>;
> + input-enable;
> + };
> +
> + tdm0-pins-sync {
sync-pins {
> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_SYNC)>;
> + input-enable;
> + };
> +
> + tdm0-pins-pcmclk {
pcmclk-pins {
> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_CLK)>;
> + input-enable;
> + };
> + };
> };
>
> &uart0 {
> @@ -221,3 +255,9 @@
> pinctrl-0 = <&uart0_pins>;
> status = "okay";
> };
> +
> +&tdm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tdm0_pins>;
pinctrl-0 = <&tdm_pins>;
Best regards,
Hal
> + status = "okay";
> +};
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-31 6:23 ` Hal Feng
@ 2023-05-31 6:30 ` Walker Chen
2023-05-31 6:42 ` Hal Feng
0 siblings, 1 reply; 11+ messages in thread
From: Walker Chen @ 2023-05-31 6:30 UTC (permalink / raw)
To: Hal Feng, Mark Brown, Liam Girdwood, Claudiu Beznea,
Jaroslav Kysela, Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Emil Renner Berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 2023/5/31 14:23, Hal Feng wrote:
> On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
>> Add the tdm controller node and pins configuration of tdm for the
>> StarFive JH7110 SoC.
>>
>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> ---
>> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
>> 2 files changed, 61 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index 1155b97b593d..19b5954ee72d 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -214,6 +214,40 @@
>> slew-rate = <0>;
>> };
>> };
>> +
>> + tdm0_pins: tdm0-pins {
>> + tdm0-pins-tx {
>
> Use consistent naming, so
>
> tdm_pins: tdm-0 {
> tx-pins {
>
>> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>> + GPOEN_ENABLE,
>> + GPI_NONE)>;
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + input-disable;
>> + input-schmitt-disable;
>> + slew-rate = <0>;
>> + };
>> +
>> + tdm0-pins-rx {
>
> rx-pins {
>
>> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_RXD)>;
>> + input-enable;
>> + };
>> +
>> + tdm0-pins-sync {
>
> sync-pins {
>
>> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_SYNC)>;
>> + input-enable;
>> + };
>> +
>> + tdm0-pins-pcmclk {
>
> pcmclk-pins {
>
>> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
>> + GPOEN_DISABLE,
>> + GPI_SYS_TDM_CLK)>;
>> + input-enable;
>> + };
>> + };
>> };
>>
>> &uart0 {
>> @@ -221,3 +255,9 @@
>> pinctrl-0 = <&uart0_pins>;
>> status = "okay";
>> };
>> +
>> +&tdm {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&tdm0_pins>;
>
> pinctrl-0 = <&tdm_pins>;
>
> Best regards,
> Hal
OK, I'll update these node's name in the next submit.
Thanks.
Best regards,
Walker
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-31 6:30 ` Walker Chen
@ 2023-05-31 6:42 ` Hal Feng
0 siblings, 0 replies; 11+ messages in thread
From: Hal Feng @ 2023-05-31 6:42 UTC (permalink / raw)
To: Walker Chen, Mark Brown, Liam Girdwood, Claudiu Beznea,
Jaroslav Kysela, Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Emil Renner Berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On Wed, 31 May 2023 14:30:19 +0800, Walker Chen wrote:
> On 2023/5/31 14:23, Hal Feng wrote:
>> On Fri, 26 May 2023 22:54:02 +0800, Walker Chen wrote:
>>> Add the tdm controller node and pins configuration of tdm for the
>>> StarFive JH7110 SoC.
>>>
>>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>>> ---
>>> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
>>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
>>> 2 files changed, 61 insertions(+)
>>>
>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> index 1155b97b593d..19b5954ee72d 100644
>>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>>> @@ -214,6 +214,40 @@
>>> slew-rate = <0>;
>>> };
>>> };
>>> +
>>> + tdm0_pins: tdm0-pins {
>>> + tdm0-pins-tx {
>>
>> Use consistent naming, so
>>
>> tdm_pins: tdm-0 {
>> tx-pins {
>>
>>> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>>> + GPOEN_ENABLE,
>>> + GPI_NONE)>;
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + input-disable;
>>> + input-schmitt-disable;
>>> + slew-rate = <0>;
>>> + };
>>> +
>>> + tdm0-pins-rx {
>>
>> rx-pins {
>>
>>> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_RXD)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-sync {
>>
>> sync-pins {
>>
>>> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_SYNC)>;
>>> + input-enable;
>>> + };
>>> +
>>> + tdm0-pins-pcmclk {
>>
>> pcmclk-pins {
>>
>>> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
>>> + GPOEN_DISABLE,
>>> + GPI_SYS_TDM_CLK)>;
>>> + input-enable;
>>> + };
>>> + };
>>> };
>>>
>>> &uart0 {
>>> @@ -221,3 +255,9 @@
>>> pinctrl-0 = <&uart0_pins>;
>>> status = "okay";
>>> };
>>> +
>>> +&tdm {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&tdm0_pins>;
>>
>> pinctrl-0 = <&tdm_pins>;
>>
>> Best regards,
>> Hal
>
> OK, I'll update these node's name in the next submit.
> Thanks.
With that fixed,
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Best regards,
Hal
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v5 0/3] Add TDM audio on StarFive JH7110
2023-05-26 14:53 [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Walker Chen
` (2 preceding siblings ...)
2023-05-26 14:54 ` [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
@ 2023-06-01 15:44 ` Mark Brown
3 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2023-06-01 15:44 UTC (permalink / raw)
To: Liam Girdwood, Claudiu Beznea, Jaroslav Kysela, Takashi Iwai,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Hal Feng, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On Fri, 26 May 2023 22:53:59 +0800, Walker Chen wrote:
> This patchset adds TDM audio driver for the StarFive JH7110 SoC. The
> first patch adds device tree binding for TDM module. The second patch
> adds tdm driver support for JH7110 SoC. The last patch adds device tree
> node and pins configuration of tdm to JH7110 dts.
>
> The series has been tested on the VisionFive 2 board by plugging an
> audio expansion board.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/3] ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
commit: d9afe0d36cc27dcacbcecf02fe803a30d544698c
[2/3] ASoC: starfive: Add JH7110 TDM driver
commit: fd4762b6b5cfa27bf44f5d624ce74b7dce4a479c
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
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^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-06-01 15:44 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-26 14:53 [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-26 14:54 ` [PATCH v5 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
2023-05-26 14:54 ` [PATCH v5 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
2023-05-30 6:47 ` Claudiu.Beznea
2023-05-30 7:06 ` Claudiu.Beznea
2023-05-30 7:31 ` Walker Chen
2023-05-26 14:54 ` [PATCH v5 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
2023-05-31 6:23 ` Hal Feng
2023-05-31 6:30 ` Walker Chen
2023-05-31 6:42 ` Hal Feng
2023-06-01 15:44 ` (subset) [PATCH v5 0/3] Add TDM audio on StarFive JH7110 Mark Brown
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