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From: Paul Walmsley <paul.walmsley@sifive.com>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-riscv@lists.infradead.org, lollivier@baylibre.com,
	paul@pwsan.com, linux-kernel@vger.kernel.org,
	aou@eecs.berkeley.edu
Subject: Re: [PATCH v3 1/5] arch: riscv: add support for building DTB files from DT source data
Date: Sat, 8 Jun 2019 22:50:14 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.21.9999.1906082245300.720@viisi.sifive.com> (raw)
In-Reply-To: <mhng-802d67ce-9f78-4ebc-9981-a27e5e4e40df@palmer-si-x1e>

On Sat, 8 Jun 2019, Palmer Dabbelt wrote:

> On Thu, 06 Jun 2019 22:12:05 PDT (-0700), Paul Walmsley wrote:
> > On Tue, 4 Jun 2019, Loys Ollivier wrote:
> > 
> > > Always build it ?
> > > Any particular reason to drop ARCH_SIFIVE ?
> > 
> > Palmer had some reservations about it, so I dropped it for now.  But then
> > as I was thinking about it, I remembered that I also had some reservations
> > about it, years ago: that everyone should use CONFIG_SOC_* for this,
> > rather than CONFIG_ARCH.  CONFIG_ARCH_* seems better reserved for
> > CPU architectures.
> 
> The SOC stuff will, of course, be vendor specific.  In this idealized world
> SiFive's SOC support has nothing to do with RISC-V, but of course all of
> SiFive's SOCs are RISC-V based so the separation is a bit of pedantry.  That
> said, in this case I think getting the name right does make it slightly easier
> to espouse this "one kernel can run on all RISC-V systems" philosophy.
> Balancing the SiFive and RISC-V stuff can be a bit tricky, which is why I am
> sometimes a bit pedantic about these sorts of things.

Once there are SoC variants that have different CPU cores, but with the 
remaining chip integration the same, I think it would make sense to move 
the CONFIG_SOC_ stuff out from ARM, RISC-V, etc., into something that's 
not CPU architecture-specific.  But for the time being, that seems 
premature.  Might as well have it be driven by an actual use-case.


- Paul

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  reply	other threads:[~2019-06-09  5:50 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-02  8:04 [PATCH v3 0/5] arch: riscv: add board and SoC DT file support Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 1/5] arch: riscv: add support for building DTB files from DT source data Paul Walmsley
2019-06-04 14:37   ` Loys Ollivier
2019-06-07  5:12     ` Paul Walmsley
2019-06-07  9:49       ` Loys Ollivier
2019-06-08 17:56       ` Palmer Dabbelt
2019-06-09  5:50         ` Paul Walmsley [this message]
2019-06-09  7:49           ` Christoph Hellwig
2019-06-02  8:04 ` [PATCH v3 2/5] dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 Paul Walmsley
2019-06-10 21:44   ` Rob Herring
2019-06-16 18:39     ` Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 3/5] dt-bindings: riscv: convert cpu binding to json-schema Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 4/5] riscv: dts: add initial support for the SiFive FU540-C000 SoC Paul Walmsley
2019-06-04 14:38   ` Loys Ollivier
2019-06-02  8:05 ` [PATCH v3 5/5] riscv: dts: add initial board data for the SiFive HiFive Unleashed Paul Walmsley
2019-06-04 14:41   ` Loys Ollivier
2019-06-09  6:18   ` Antony Pavlov
2019-06-16 18:36     ` Paul Walmsley
2019-06-04 14:31 ` [PATCH v3 0/5] arch: riscv: add board and SoC DT file support Loys Ollivier
2019-06-07  5:14   ` Paul Walmsley
2019-06-05 17:36 ` Kevin Hilman
2019-06-06 23:15   ` Atish Patra
2019-06-07 16:51     ` Kevin Hilman
2019-06-07 17:58       ` Atish Patra
2019-06-07 20:55         ` Auer, Lukas
2019-06-07  5:18   ` Paul Walmsley

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