From: Palmer Dabbelt <palmer@dabbelt.com>
To: alex@ghiti.fr
Cc: alex@ghiti.fr, anup@brainfault.org, linux-kernel@vger.kernel.org,
zong.li@sifive.com, Paul Walmsley <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org, Christoph Hellwig <hch@lst.de>
Subject: Re: [RFC PATCH 2/7] riscv: Allow to dynamically define VA_BITS
Date: Fri, 03 Apr 2020 08:17:04 -0700 (PDT) [thread overview]
Message-ID: <mhng-1f8477e3-7cb4-454f-b443-8cf032325385@palmerdabbelt-glaptop1> (raw)
In-Reply-To: <20200322110028.18279-3-alex@ghiti.fr>
On Sun, 22 Mar 2020 04:00:23 PDT (-0700), alex@ghiti.fr wrote:
> With 4-level page table folding at runtime, we don't know at compile time
> the size of the virtual address space so we must set VA_BITS dynamically
> so that sparsemem reserves the right amount of memory for struct pages.
>
> Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
> ---
> arch/riscv/Kconfig | 10 ----------
> arch/riscv/include/asm/pgtable.h | 10 +++++++++-
> arch/riscv/include/asm/sparsemem.h | 2 +-
> 3 files changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index f5f3d474504d..8e4b1cbcf2c2 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -99,16 +99,6 @@ config ZONE_DMA32
> bool
> default y if 64BIT
>
> -config VA_BITS
> - int
> - default 32 if 32BIT
> - default 39 if 64BIT
> -
> -config PA_BITS
> - int
> - default 34 if 32BIT
> - default 56 if 64BIT
> -
> config PAGE_OFFSET
> hex
> default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 185ffe3723ec..dce401eed1d3 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -26,6 +26,14 @@
> #endif /* CONFIG_64BIT */
>
> #ifdef CONFIG_MMU
> +#ifdef CONFIG_64BIT
> +#define VA_BITS 39
> +#define PA_BITS 56
> +#else
> +#define VA_BITS 32
> +#define PA_BITS 34
We've moved to 32-bit physical addresses on rv32 in Linux. The mismatch was
causing too many issues in generic code.
> +#endif
> +
> /* Number of entries in the page global directory */
> #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
> /* Number of entries in the page table */
> @@ -108,7 +116,7 @@ extern pgd_t swapper_pg_dir[];
> * position vmemmap directly below the VMALLOC region.
> */
> #define VMEMMAP_SHIFT \
> - (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
> + (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
> #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
> #define VMEMMAP_END (VMALLOC_START - 1)
> #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
> diff --git a/arch/riscv/include/asm/sparsemem.h b/arch/riscv/include/asm/sparsemem.h
> index 45a7018a8118..f08d72155bc8 100644
> --- a/arch/riscv/include/asm/sparsemem.h
> +++ b/arch/riscv/include/asm/sparsemem.h
> @@ -4,7 +4,7 @@
> #define _ASM_RISCV_SPARSEMEM_H
>
> #ifdef CONFIG_SPARSEMEM
> -#define MAX_PHYSMEM_BITS CONFIG_PA_BITS
> +#define MAX_PHYSMEM_BITS PA_BITS
> #define SECTION_SIZE_BITS 27
> #endif /* CONFIG_SPARSEMEM */
Aside from the 32-bit PA issue:
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
next prev parent reply other threads:[~2020-04-03 15:17 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-22 11:00 [RFC PATCH 0/7] Introduce sv48 support Alexandre Ghiti
2020-03-22 11:00 ` [RFC PATCH 1/7] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2020-03-26 6:10 ` Anup Patel
2020-04-03 15:17 ` Palmer Dabbelt
2020-04-07 5:12 ` Alex Ghiti
2020-03-22 11:00 ` [RFC PATCH 2/7] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti
2020-03-26 6:12 ` Anup Patel
2020-04-03 15:17 ` Palmer Dabbelt [this message]
2020-04-07 5:12 ` Alex Ghiti
2020-03-22 11:00 ` [RFC PATCH 3/7] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti
2020-03-26 6:22 ` Anup Patel
2020-03-26 6:34 ` Anup Patel
2020-04-03 15:53 ` Palmer Dabbelt
2020-04-07 5:13 ` Alex Ghiti
2020-03-22 11:00 ` [RFC PATCH 4/7] riscv: Implement sv48 support Alexandre Ghiti
2020-03-26 7:00 ` Anup Patel
2020-03-31 16:31 ` Alex Ghiti
2020-04-03 15:53 ` Palmer Dabbelt
2020-04-07 5:14 ` Alex Ghiti
2020-04-07 5:56 ` Anup Patel
2020-04-08 4:39 ` Alex Ghiti
2020-04-08 5:06 ` Anup Patel
2020-03-22 11:00 ` [RFC PATCH 5/7] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti
2020-03-26 7:01 ` Anup Patel
2020-04-03 15:53 ` Palmer Dabbelt
2020-04-07 5:14 ` Alex Ghiti
2020-03-22 11:00 ` [RFC PATCH 6/7] dt-bindings: riscv: Remove "riscv, svXX" property from device-tree Alexandre Ghiti
2020-03-26 7:03 ` Anup Patel
2020-04-03 15:53 ` Palmer Dabbelt
2020-04-07 5:14 ` Alex Ghiti
2020-03-22 11:00 ` [RFC PATCH 7/7] riscv: Explicit comment about user virtual address space size Alexandre Ghiti
2020-03-26 7:05 ` Anup Patel
2020-04-03 15:53 ` Palmer Dabbelt
2020-04-07 5:15 ` Alex Ghiti
2020-03-31 19:53 ` [RFC PATCH 0/7] Introduce sv48 support Palmer Dabbelt
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