From: Conor Dooley <conor@kernel.org>
To: Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Damien Le Moal <damien.lemoal@opensource.wdc.com>,
Serge Semin <fancer.lancer@gmail.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
linux-ide@vger.kernel.org, linux-phy@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH v2 2/6] dt-bindings: ata: ahci: add RK3588 AHCI controller
Date: Mon, 22 May 2023 20:33:18 +0100 [thread overview]
Message-ID: <20230522-galore-unchain-12ad8d5a8536@spud> (raw)
In-Reply-To: <20230522173423.64691-3-sebastian.reichel@collabora.com>
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On Mon, May 22, 2023 at 07:34:19PM +0200, Sebastian Reichel wrote:
> Just like RK3568, the RK3588 has a DWC based AHCI controller.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
> .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++--
> Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml | 6 ++++--
> 2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> index c1457910520b..34c5bf65b02d 100644
> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
> @@ -31,11 +31,11 @@ properties:
> PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)
> clock, etc.
> minItems: 1
> - maxItems: 4
> + maxItems: 6
>
> clock-names:
> minItems: 1
> - maxItems: 4
> + maxItems: 6
> items:
> oneOf:
> - description: Application APB/AHB/AXI BIU clock
> @@ -48,6 +48,10 @@ properties:
> const: pmalive
> - description: RxOOB detection clock
> const: rxoob
> + - description: PHY Transmit Clock
> + const: asic
> + - description: PHY Receive Clock
> + const: rbc
> - description: SATA Ports reference clock
> const: ref
My brain is failing me at the moment, what is the reason for adding
these into the middle of the list, as opposed to tacking them onto the
end? Apologies if this came up on some past version that Rob or
Krzysztof had a look at.
Cheers,
Conor.
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next prev parent reply other threads:[~2023-05-22 19:33 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-22 17:34 [PATCH v2 0/6] Add RK3588 SATA support Sebastian Reichel
2023-05-22 17:34 ` [PATCH v2 1/6] dt-bindings: soc: rockchip: add rk3588 pipe-phy syscon Sebastian Reichel
2023-05-22 17:34 ` [PATCH v2 2/6] dt-bindings: ata: ahci: add RK3588 AHCI controller Sebastian Reichel
2023-05-22 19:33 ` Conor Dooley [this message]
2023-06-04 18:58 ` Serge Semin
2023-05-22 17:34 ` [PATCH v2 3/6] dt-bindings: ata: ahci: dwc: enforce rockchip clocks Sebastian Reichel
2023-06-04 19:11 ` Serge Semin
2023-05-22 17:34 ` [PATCH v2 4/6] dt-bindings: phy: rockchip: rk3588 has two reset lines Sebastian Reichel
2023-05-22 19:24 ` Conor Dooley
2023-05-22 17:34 ` [PATCH v2 5/6] arm64: dts: rockchip: rk3588: add combo PHYs Sebastian Reichel
2023-05-22 17:34 ` [PATCH v2 6/6] arm64: dts: rockchip: rk3588: add SATA support Sebastian Reichel
2023-05-31 11:35 ` [PATCH v2 0/6] Add RK3588 " Serge Semin
2023-06-06 17:07 ` (subset) " Heiko Stuebner
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