[PATCH V3 0/7] rtc: ls2x: Add support for the Loongson-2K/LS7A RTC

[PATCH V3 0/7] rtc: ls2x: Add support for the Loongson-2K/LS7A RTC

[Binbin Zhou]

Hi all:

The initial DT-base ls2x rtc driver was written by Wang Xuerui, He has
released five versions of patchset before, and all related mail records
are shown below if you are interested:

https://lore.kernel.org/all/?q=ls2x-rtc

In this series of patches, based on the code above, I have added the
following support:

1. Add ACPI-related support, as Loongson-3A5000 + LS7A is now ACPI-base
   by default under LoongArch architecture;
2. Add rtc alarm/walarm related functions.

I have tested on Loongson-3A5000LA+LS7A1000/LS7A2000, Loongson-2K1000LA
and Loongson-2K0500.

BTW:
As LS1X does not support DT, we will merge LS2X and LS1X after keguang
has completed DT support for LS1X.

-------
Changes since v2:
- Rebase on the top of rtc-next.
patch(1/7):
 - The new patch.
patch(2/7):
 - Check patchset with "checkpatch.pl --strict";
 - Drop static inline functions which are used only once, such as
   ls2x_rtc_regs_to_time;
 - Remove the suruct ls2x_rtc_regs and regmap_bulk_xxx() is used to read
   and write rtc registers;
 - Clear the RTC wakeup interrupt manually;
 - Enable the RTC in set_time() and check in read_time();
 - device_get_match_data() is used to get ls2x_pm_offset, for LS2k1000
   has the different value;
 - Remove some inexact CONFIG_ACPI;
 - remove()->remove_new().

Changes since v1:
1. Rebased on top of latest loongarch-next;
2. Add interrupt descriptions to the ls2k and ls7a DTS files to avoid
errors when the driver gets the IRQ number, Thanks to Qing Zhang for
testing;
3. Remove some inexact CONFIG_ACPI.

Thanks.

Binbin Zhou (7):
  dt-bindings: rtc: Subdivision of LS2X RTC compatible
  rtc: Add support for the Loongson-2K/LS7A RTC
  LoongArch: Enable LS2X RTC in loongson3_defconfig
  MIPS: Loongson64: DTS: Add RTC support to LS7A
  MIPS: Loongson: Enable LS2X RTC in loongson3_defconfig
  MIPS: Loongson64: DTS: Add RTC support to Loongson-2K
  MIPS: Loongson: Enable LS2X RTC in loongson2k_defconfig

 .../devicetree/bindings/rtc/trivial-rtc.yaml  |   7 +-
 arch/loongarch/configs/loongson3_defconfig    |   1 +
 .../boot/dts/loongson/loongson64-2k1000.dtsi  |   7 +
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi     |   7 +
 arch/mips/configs/loongson2k_defconfig        |   1 +
 arch/mips/configs/loongson3_defconfig         |   1 +
 drivers/rtc/Kconfig                           |  11 +
 drivers/rtc/Makefile                          |   1 +
 drivers/rtc/rtc-ls2x.c                        | 345 ++++++++++++++++++
 9 files changed, 379 insertions(+), 2 deletions(-)
 create mode 100644 drivers/rtc/rtc-ls2x.c

-- 
2.39.1

[PATCH V3 1/7] dt-bindings: rtc: Subdivision of LS2X RTC compatible

[Binbin Zhou]

The LS2X RTC alarm depends on the associated registers in a separate
power management domain.

In order to define the PM domain addresses of the different chips, a
more detailed description of compatible is required.

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
index a3603e638c37..2928811b83a0 100644
--- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
@@ -47,8 +47,11 @@ properties:
       - isil,isl1218
       # Intersil ISL12022 Real-time Clock
       - isil,isl12022
-      # Loongson-2K Socs/LS7A bridge Real-time Clock
-      - loongson,ls2x-rtc
+      # Loongson LS7A bridge Real-time Clock
+      - loongson,ls7a-rtc
+      # Loongson-2K Socs Real-time Clock
+      - loongson,ls2k0500-rtc
+      - loongson,ls2k1000-rtc
       # Real Time Clock Module with I2C-Bus
       - microcrystal,rv3029
       # Real Time Clock
-- 
2.39.1

[PATCH V3 2/7] rtc: Add support for the Loongson-2K/LS7A RTC

[Binbin Zhou]

This RTC module is integrated into the Loongson-2K SoC and the LS7A
bridge chip. This version is almost entirely rewritten to make use of
current kernel API, and it supports both ACPI and DT.

This driver is shared by MIPS-based Loongson-3A4000 system (use FDT) and
LoongArch-based Loongson-3A5000 system (use ACPI).

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: WANG Xuerui <git@xen0n.name>
---
 drivers/rtc/Kconfig    |  11 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rtc-ls2x.c | 345 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 357 insertions(+)
 create mode 100644 drivers/rtc/rtc-ls2x.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 753872408615..e1b9d64d2678 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1706,6 +1706,17 @@ config RTC_DRV_LPC32XX
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-lpc32xx.
 
+config RTC_DRV_LS2X
+	tristate "Loongson LS2X RTC"
+	depends on MACH_LOONGSON64 || COMPILE_TEST
+	select REGMAP_MMIO
+	help
+	  If you say yes here you get support for the RTC on the Loongson-2K
+	  SoC and LS7A bridge, which first appeared on the Loongson-2H.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-ls2x.
+
 config RTC_DRV_PM8XXX
 	tristate "Qualcomm PMIC8XXX RTC"
 	depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index ea445d1ebb17..cff5df09fc60 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -82,6 +82,7 @@ obj-$(CONFIG_RTC_DRV_LOONGSON1)	+= rtc-ls1x.o
 obj-$(CONFIG_RTC_DRV_LP8788)	+= rtc-lp8788.o
 obj-$(CONFIG_RTC_DRV_LPC24XX)	+= rtc-lpc24xx.o
 obj-$(CONFIG_RTC_DRV_LPC32XX)	+= rtc-lpc32xx.o
+obj-$(CONFIG_RTC_DRV_LS2X)	+= rtc-ls2x.o
 obj-$(CONFIG_RTC_DRV_M41T80)	+= rtc-m41t80.o
 obj-$(CONFIG_RTC_DRV_M41T93)	+= rtc-m41t93.o
 obj-$(CONFIG_RTC_DRV_M41T94)	+= rtc-m41t94.o
diff --git a/drivers/rtc/rtc-ls2x.c b/drivers/rtc/rtc-ls2x.c
new file mode 100644
index 000000000000..c74dd88ae11b
--- /dev/null
+++ b/drivers/rtc/rtc-ls2x.c
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Loongson-2K/LS7A RTC driver
+ *
+ * Based on the original out-of-tree Loongson-2H RTC driver for Linux 2.6.32,
+ * by Shaozong Liu <liushaozong@loongson.cn>.
+ *
+ * Maintained out-of-tree by Huacai Chen <chenhuacai@kernel.org>.
+ * Rewritten for mainline by WANG Xuerui <git@xen0n.name>.
+ *                           Binbin Zhou <zhoubinbin@loongson.cn>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+#include <linux/acpi.h>
+
+/* Time Of Year(TOY) counters registers */
+#define TOY_TRIM_REG		0x20 /* Must be initialized to 0 */
+#define TOY_WRITE0_REG		0x24 /* TOY low 32-bits value (write-only) */
+#define TOY_WRITE1_REG		0x28 /* TOY high 32-bits value (write-only) */
+#define TOY_READ0_REG		0x2c /* TOY low 32-bits value (read-only) */
+#define TOY_READ1_REG		0x30 /* TOY high 32-bits value (read-only) */
+#define TOY_MATCH0_REG		0x34 /* TOY timing interrupt 0 */
+#define TOY_MATCH1_REG		0x38 /* TOY timing interrupt 1 */
+#define TOY_MATCH2_REG		0x3c /* TOY timing interrupt 2 */
+
+/* RTC counters registers */
+#define RTC_CTRL_REG		0x40 /* TOY and RTC control register */
+#define RTC_TRIM_REG		0x60 /* Must be initialized to 0 */
+#define RTC_WRITE0_REG		0x64 /* RTC counters value (write-only) */
+#define RTC_READ0_REG		0x68 /* RTC counters value (read-only) */
+#define RTC_MATCH0_REG		0x6c /* RTC timing interrupt 0 */
+#define RTC_MATCH1_REG		0x70 /* RTC timing interrupt 1 */
+#define RTC_MATCH2_REG		0x74 /* RTC timing interrupt 2 */
+
+/* bitmask of TOY_WRITE0_REG */
+#define TOY_MON			GENMASK(31, 26)
+#define TOY_DAY			GENMASK(25, 21)
+#define TOY_HOUR		GENMASK(20, 16)
+#define TOY_MIN			GENMASK(15, 10)
+#define TOY_SEC			GENMASK(9, 4)
+#define TOY_MSEC		GENMASK(3, 0)
+
+/* bitmask of TOY_MATCH0/1/2_REG */
+#define TOY_MATCH_YEAR		GENMASK(31, 26)
+#define TOY_MATCH_MON		GENMASK(25, 22)
+#define TOY_MATCH_DAY		GENMASK(21, 17)
+#define TOY_MATCH_HOUR		GENMASK(16, 12)
+#define TOY_MATCH_MIN		GENMASK(11, 6)
+#define TOY_MATCH_SEC		GENMASK(5, 0)
+
+/* bitmask of RTC_CTRL_REG */
+#define RTC_ENABLE		BIT(13) /* 1: RTC counters enable */
+#define TOY_ENABLE		BIT(11) /* 1: TOY counters enable */
+#define OSC_ENABLE		BIT(8) /* 1: 32.768k crystal enable */
+#define TOY_ENABLE_MASK		(TOY_ENABLE | OSC_ENABLE)
+
+/* PM domain registers */
+#define PM1_STS_REG		0x0c /* Power management 1 status register */
+#define RTC_STS			BIT(10) /* RTC status */
+#define PM1_EN_REG		0x10 /* Power management 1 enable register */
+#define RTC_EN			BIT(10) /* RTC event enable */
+
+/* Offset of PM domain from RTC domain, for rtc alarm */
+enum ls2x_pm_offset {
+	GENERIC_OFFSET = 0x100,
+	LS2K1000_OFFSET = 0x800,
+};
+
+struct ls2x_rtc_priv {
+	spinlock_t lock; /* protects PM registers access */
+	int irq;
+	struct rtc_device *rtcdev;
+	struct regmap *regmap;
+	void __iomem *pm_base; /* PM domain base, for rtc alarm */
+};
+
+static const struct regmap_config ls2x_rtc_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+/* IRQ Handlers */
+static irqreturn_t ls2x_rtc_isr(int irq, void *id)
+{
+	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+	return IRQ_HANDLED;
+}
+
+static u32 ls2x_rtc_handler(void *id)
+{
+	u32 ret;
+	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+	spin_lock(&priv->lock);
+	/* Disable rtc event */
+	writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
+	       priv->pm_base + PM1_EN_REG);
+
+	/* Clear rtc interrupt status */
+	writel(RTC_STS, priv->pm_base + PM1_STS_REG);
+	spin_unlock(&priv->lock);
+
+	/*
+	 * The TOY_MATCH0_REG should be cleared 0 here,
+	 * otherwise the interrupt cannot be cleared.
+	 */
+	ret = regmap_write(priv->regmap, TOY_MATCH0_REG, 0);
+	if (ret < 0)
+		return ret;
+
+	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+	return 0;
+}
+
+static int ls2x_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	int ret;
+	u32 ctrl_data, rtc_data[2];
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	ret = regmap_read(priv->regmap, RTC_CTRL_REG, &ctrl_data);
+	if (ret < 0)
+		return ret;
+
+	if (!(ctrl_data & TOY_ENABLE_MASK))
+		return -EINVAL;
+
+	ret = regmap_bulk_read(priv->regmap, TOY_READ0_REG, rtc_data,
+			       ARRAY_SIZE(rtc_data));
+	if (ret < 0)
+		return ret;
+
+	tm->tm_sec = FIELD_GET(TOY_SEC, rtc_data[0]);
+	tm->tm_min = FIELD_GET(TOY_MIN, rtc_data[0]);
+	tm->tm_hour = FIELD_GET(TOY_HOUR, rtc_data[0]);
+	tm->tm_mday = FIELD_GET(TOY_DAY, rtc_data[0]);
+	tm->tm_mon = FIELD_GET(TOY_MON, rtc_data[0]) - 1;
+	tm->tm_year = rtc_data[1];
+
+	return 0;
+}
+
+static int ls2x_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	int ret;
+	u32 rtc_data[2];
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)
+		    | FIELD_PREP(TOY_MIN, tm->tm_min)
+		    | FIELD_PREP(TOY_HOUR, tm->tm_hour)
+		    | FIELD_PREP(TOY_DAY, tm->tm_mday)
+		    | FIELD_PREP(TOY_MON, tm->tm_mon + 1);
+	rtc_data[1] = tm->tm_year;
+
+	ret = regmap_bulk_write(priv->regmap, TOY_WRITE0_REG, rtc_data,
+				ARRAY_SIZE(rtc_data));
+	if (ret < 0)
+		return ret;
+
+	/* Enable RTC TOY counters and crystal */
+	return regmap_update_bits(priv->regmap, RTC_CTRL_REG, TOY_ENABLE_MASK,
+				  TOY_ENABLE_MASK);
+}
+
+static int ls2x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	int ret;
+	u32 alarm_data;
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	ret = regmap_read(priv->regmap, TOY_MATCH0_REG, &alarm_data);
+	if (ret < 0)
+		return ret;
+
+	alrm->time.tm_sec = FIELD_GET(TOY_MATCH_SEC, alarm_data);
+	alrm->time.tm_min = FIELD_GET(TOY_MATCH_MIN, alarm_data);
+	alrm->time.tm_hour = FIELD_GET(TOY_MATCH_HOUR, alarm_data);
+	alrm->time.tm_mday = FIELD_GET(TOY_MATCH_DAY, alarm_data);
+	alrm->time.tm_mon = FIELD_GET(TOY_MATCH_MON, alarm_data) - 1;
+	/*
+	 * This is a hardware bug.
+	 * The year field in the SYS_TOYMATCH has only 6 bits(bits[31:26]),
+	 * so it can only be set from 1900 to 1963.
+	 * In order to avoid an invalid alarm value during booting, we manually
+	 * add 64 after reading the year field (equivalent to filling in the
+	 * high bits).
+	 */
+	alrm->time.tm_year = FIELD_GET(TOY_MATCH_YEAR, alarm_data) + 64;
+
+	alrm->enabled = !!(readl(priv->pm_base + PM1_EN_REG) & RTC_EN);
+	return 0;
+}
+
+static int ls2x_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
+{
+	u32 val;
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	spin_lock(&priv->lock);
+	val = readl(priv->pm_base + PM1_EN_REG);
+
+	/* Enable RTC alarm */
+	writel(enabled ? val | RTC_EN : val & ~RTC_EN,
+	       priv->pm_base + PM1_EN_REG);
+
+	/* Clear the pending events */
+	writel(RTC_STS, priv->pm_base + PM1_STS_REG);
+	spin_unlock(&priv->lock);
+
+	return 0;
+}
+
+static int ls2x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	int ret;
+	u32 alarm_data;
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	alarm_data = FIELD_PREP(TOY_MATCH_SEC, alrm->time.tm_sec)
+		   | FIELD_PREP(TOY_MATCH_MIN, alrm->time.tm_min)
+		   | FIELD_PREP(TOY_MATCH_HOUR, alrm->time.tm_hour)
+		   | FIELD_PREP(TOY_MATCH_DAY, alrm->time.tm_mday)
+		   | FIELD_PREP(TOY_MATCH_MON, alrm->time.tm_mon + 1)
+		   | FIELD_PREP(TOY_MATCH_YEAR, alrm->time.tm_year - 64);
+
+	ret = regmap_write(priv->regmap, TOY_MATCH0_REG, alarm_data);
+	if (ret < 0)
+		return ret;
+
+	return ls2x_rtc_alarm_irq_enable(dev, alrm->enabled);
+}
+
+static const struct rtc_class_ops ls2x_rtc_ops = {
+	.read_time = ls2x_rtc_read_time,
+	.set_time = ls2x_rtc_set_time,
+	.read_alarm = ls2x_rtc_read_alarm,
+	.set_alarm = ls2x_rtc_set_alarm,
+	.alarm_irq_enable = ls2x_rtc_alarm_irq_enable,
+};
+
+static int ls2x_rtc_probe(struct platform_device *pdev)
+{
+	int ret;
+	void __iomem *regs;
+	struct ls2x_rtc_priv *priv;
+	struct device *dev = &pdev->dev;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	regs = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(regs))
+		return dev_err_probe(dev, PTR_ERR(regs),
+				     "devm_platform_ioremap_resource failed\n");
+
+	priv->regmap = devm_regmap_init_mmio(dev, regs,
+					     &ls2x_rtc_regmap_config);
+	if (IS_ERR(priv->regmap))
+		return dev_err_probe(dev, PTR_ERR(priv->regmap),
+				     "devm_regmap_init_mmio failed\n");
+
+	device_init_wakeup(dev, 1);
+	spin_lock_init(&priv->lock);
+	platform_set_drvdata(pdev, priv);
+
+	priv->pm_base = regs - (enum ls2x_pm_offset)device_get_match_data(dev);
+
+	if (has_acpi_companion(dev))
+		acpi_install_fixed_event_handler(ACPI_EVENT_RTC,
+						 ls2x_rtc_handler, priv);
+
+	priv->rtcdev = devm_rtc_allocate_device(dev);
+	if (IS_ERR(priv->rtcdev))
+		return dev_err_probe(dev, PTR_ERR(priv->rtcdev),
+				     "devm_rtc_allocate_device failed\n");
+
+	priv->rtcdev->ops = &ls2x_rtc_ops;
+	priv->rtcdev->range_min = RTC_TIMESTAMP_BEGIN_2000;
+	priv->rtcdev->range_max = RTC_TIMESTAMP_END_2099;
+
+	priv->irq = platform_get_irq(pdev, 0);
+	if (priv->irq < 0)
+		return dev_err_probe(dev, priv->irq, "platform_get_irq failed\n");
+
+	ret = devm_request_irq(dev, priv->irq, ls2x_rtc_isr,
+			       IRQF_TRIGGER_RISING, "ls2x-alarm", priv);
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "Unable to request irq %d\n",
+				     priv->irq);
+
+	return devm_rtc_register_device(priv->rtcdev);
+}
+
+static void ls2x_rtc_remove(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+
+	if (has_acpi_companion(dev))
+		acpi_remove_fixed_event_handler(ACPI_EVENT_RTC,
+						ls2x_rtc_handler);
+
+	device_init_wakeup(dev, 0);
+	ls2x_rtc_alarm_irq_enable(dev, 0);
+}
+
+static const struct of_device_id ls2x_rtc_of_match[] = {
+	{ .compatible = "loongson,ls7a-rtc", .data = (void *)GENERIC_OFFSET },
+	{ .compatible = "loongson,ls2k0500-rtc", .data = (void *)GENERIC_OFFSET },
+	{ .compatible = "loongson,ls2k1000-rtc", .data = (void *)LS2K1000_OFFSET },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ls2x_rtc_of_match);
+
+static const struct acpi_device_id ls2x_rtc_acpi_match[] = {
+	{ "LOON0001", .driver_data = (kernel_ulong_t)GENERIC_OFFSET },
+	{ }
+};
+MODULE_DEVICE_TABLE(acpi, ls2x_rtc_acpi_match);
+
+static struct platform_driver ls2x_rtc_driver = {
+	.probe		= ls2x_rtc_probe,
+	.remove_new	= ls2x_rtc_remove,
+	.driver		= {
+		.name	= "ls2x-rtc",
+		.of_match_table = ls2x_rtc_of_match,
+		.acpi_match_table = ls2x_rtc_acpi_match,
+	},
+};
+module_platform_driver(ls2x_rtc_driver);
+
+MODULE_DESCRIPTION("Loongson LS2X RTC driver");
+MODULE_AUTHOR("Binbin Zhou <zhoubinbin@loongson.cn>");
+MODULE_AUTHOR("WANG Xuerui <git@xen0n.name>");
+MODULE_AUTHOR("Huacai Chen <chenhuacai@kernel.org>");
+MODULE_LICENSE("GPL");
-- 
2.39.1

[PATCH V3 3/7] LoongArch: Enable LS2X RTC in loongson3_defconfig

[Binbin Zhou]

This is now supported, enable for Loongson-3 systems. Other systems are
unaffected.

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 arch/loongarch/configs/loongson3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig
index e18213f01cc4..27f8408bb2ba 100644
--- a/arch/loongarch/configs/loongson3_defconfig
+++ b/arch/loongarch/configs/loongson3_defconfig
@@ -713,6 +713,7 @@ CONFIG_UCSI_ACPI=m
 CONFIG_INFINIBAND=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_LS2X=y
 CONFIG_DMADEVICES=y
 CONFIG_UIO=m
 CONFIG_UIO_PDRV_GENIRQ=m
-- 
2.39.1

[PATCH V3 4/7] MIPS: Loongson64: DTS: Add RTC support to LS7A

[Binbin Zhou]

The LS7A RTC module is now supported, enable it.

Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 2f45fce2cdc4..7c69e8245c2f 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -19,6 +19,13 @@ pic: interrupt-controller@10000000 {
 			#interrupt-cells = <2>;
 		};
 
+		rtc0: rtc@100d0100 {
+			compatible = "loongson,ls7a-rtc";
+			reg = <0 0x100d0100 0 0x78>;
+			interrupt-parent = <&pic>;
+			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		ls7a_uart0: serial@10080000 {
 			compatible = "ns16550a";
 			reg = <0 0x10080000 0 0x100>;
-- 
2.39.1

[PATCH V3 5/7] MIPS: Loongson: Enable LS2X RTC in loongson3_defconfig

[Binbin Zhou]

This is now supported, enable for Loongson-3 systems. Other systems are
unaffected.

Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 arch/mips/configs/loongson3_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig
index aca66a5f330d..4f55a02de9d8 100644
--- a/arch/mips/configs/loongson3_defconfig
+++ b/arch/mips/configs/loongson3_defconfig
@@ -319,6 +319,7 @@ CONFIG_USB_SERIAL_OPTION=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_CMOS=y
 CONFIG_RTC_DRV_GOLDFISH=y
+CONFIG_RTC_DRV_LS2X=y
 CONFIG_DMADEVICES=y
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_BALLOON=m
-- 
2.39.1

[PATCH V3 6/7] MIPS: Loongson64: DTS: Add RTC support to Loongson-2K

[Binbin Zhou]

The Loongson-2K RTC module is now supported, enable it.

Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 8143a61111e3..167b26b9beba 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -57,6 +57,13 @@ pm: reset-controller@1fe07000 {
 			reg = <0 0x1fe07000 0 0x422>;
 		};
 
+		rtc0: rtc@1fe07800 {
+			compatible = "loongson,ls2k1000-rtc";
+			reg = <0 0x1fe07800 0 0x78>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
+		};
+
 		liointc0: interrupt-controller@1fe11400 {
 			compatible = "loongson,liointc-2.0";
 			reg = <0 0x1fe11400 0 0x40>,
-- 
2.39.1

[PATCH V3 7/7] MIPS: Loongson: Enable LS2X RTC in loongson2k_defconfig

[Binbin Zhou]

This is now supported, enable for Loongson-2K systems. Other systems are
unaffected.

Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 arch/mips/configs/loongson2k_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/configs/loongson2k_defconfig b/arch/mips/configs/loongson2k_defconfig
index 728bef666f7a..8000cf838c17 100644
--- a/arch/mips/configs/loongson2k_defconfig
+++ b/arch/mips/configs/loongson2k_defconfig
@@ -278,6 +278,7 @@ CONFIG_USB_SERIAL=m
 CONFIG_USB_SERIAL_OPTION=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_CMOS=y
+CONFIG_RTC_DRV_LS2X=y
 CONFIG_DMADEVICES=y
 # CONFIG_CPU_HWMON is not set
 CONFIG_PM_DEVFREQ=y
-- 
2.39.1

Re: [PATCH V3 2/7] rtc: Add support for the Loongson-2K/LS7A RTC

[kernel test robot]

Hi Binbin,

kernel test robot noticed the following build warnings:

[auto build test WARNING on abelloni/rtc-next]
[also build test WARNING on robh/for-next linus/master v6.3-rc6 next-20230412]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Binbin-Zhou/dt-bindings-rtc-Subdivision-of-LS2X-RTC-compatible/20230413-155906
base:   https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git rtc-next
patch link:    https://lore.kernel.org/r/09f381f445cfbcf857845f61d10238452037b2e8.1681370153.git.zhoubinbin%40loongson.cn
patch subject: [PATCH V3 2/7] rtc: Add support for the Loongson-2K/LS7A RTC
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20230414/202304140202.URh2nrLx-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 9638da200e00bd069e6dd63604e14cbafede9324)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/30ef4691d0ab95241315bf9ba7cf20b7d549b071
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Binbin-Zhou/dt-bindings-rtc-Subdivision-of-LS2X-RTC-compatible/20230413-155906
        git checkout 30ef4691d0ab95241315bf9ba7cf20b7d549b071
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/rtc/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202304140202.URh2nrLx-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-ls2x.c:276:25: warning: cast to smaller integer type 'enum ls2x_pm_offset' from 'const void *' [-Wvoid-pointer-to-enum-cast]
           priv->pm_base = regs - (enum ls2x_pm_offset)device_get_match_data(dev);
                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   1 warning generated.


vim +276 drivers/rtc/rtc-ls2x.c

   249	
   250	static int ls2x_rtc_probe(struct platform_device *pdev)
   251	{
   252		int ret;
   253		void __iomem *regs;
   254		struct ls2x_rtc_priv *priv;
   255		struct device *dev = &pdev->dev;
   256	
   257		priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
   258		if (!priv)
   259			return -ENOMEM;
   260	
   261		regs = devm_platform_ioremap_resource(pdev, 0);
   262		if (IS_ERR(regs))
   263			return dev_err_probe(dev, PTR_ERR(regs),
   264					     "devm_platform_ioremap_resource failed\n");
   265	
   266		priv->regmap = devm_regmap_init_mmio(dev, regs,
   267						     &ls2x_rtc_regmap_config);
   268		if (IS_ERR(priv->regmap))
   269			return dev_err_probe(dev, PTR_ERR(priv->regmap),
   270					     "devm_regmap_init_mmio failed\n");
   271	
   272		device_init_wakeup(dev, 1);
   273		spin_lock_init(&priv->lock);
   274		platform_set_drvdata(pdev, priv);
   275	
 > 276		priv->pm_base = regs - (enum ls2x_pm_offset)device_get_match_data(dev);
   277	
   278		if (has_acpi_companion(dev))
   279			acpi_install_fixed_event_handler(ACPI_EVENT_RTC,
   280							 ls2x_rtc_handler, priv);
   281	
   282		priv->rtcdev = devm_rtc_allocate_device(dev);
   283		if (IS_ERR(priv->rtcdev))
   284			return dev_err_probe(dev, PTR_ERR(priv->rtcdev),
   285					     "devm_rtc_allocate_device failed\n");
   286	
   287		priv->rtcdev->ops = &ls2x_rtc_ops;
   288		priv->rtcdev->range_min = RTC_TIMESTAMP_BEGIN_2000;
   289		priv->rtcdev->range_max = RTC_TIMESTAMP_END_2099;
   290	
   291		priv->irq = platform_get_irq(pdev, 0);
   292		if (priv->irq < 0)
   293			return dev_err_probe(dev, priv->irq, "platform_get_irq failed\n");
   294	
   295		ret = devm_request_irq(dev, priv->irq, ls2x_rtc_isr,
   296				       IRQF_TRIGGER_RISING, "ls2x-alarm", priv);
   297		if (ret < 0)
   298			return dev_err_probe(dev, ret, "Unable to request irq %d\n",
   299					     priv->irq);
   300	
   301		return devm_rtc_register_device(priv->rtcdev);
   302	}
   303	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests

Re: [PATCH V3 1/7] dt-bindings: rtc: Subdivision of LS2X RTC compatible

[Krzysztof Kozlowski]

On 13/04/2023 09:57, Binbin Zhou wrote:
> The LS2X RTC alarm depends on the associated registers in a separate
> power management domain.
> 
> In order to define the PM domain addresses of the different chips, a
> more detailed description of compatible is required.

This does not match your diff at all.

> 
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> ---
>  Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> index a3603e638c37..2928811b83a0 100644
> --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> @@ -47,8 +47,11 @@ properties:
>        - isil,isl1218
>        # Intersil ISL12022 Real-time Clock
>        - isil,isl12022
> -      # Loongson-2K Socs/LS7A bridge Real-time Clock
> -      - loongson,ls2x-rtc

Why removing it?

> +      # Loongson LS7A bridge Real-time Clock
> +      - loongson,ls7a-rtc
> +      # Loongson-2K Socs Real-time Clock
> +      - loongson,ls2k0500-rtc
> +      - loongson,ls2k1000-rtc

That's even more surprising...

I don't understand what you are doing here at all.

Best regards,
Krzysztof

Re: [PATCH V3 7/7] MIPS: Loongson: Enable LS2X RTC in loongson2k_defconfig

[Krzysztof Kozlowski]

On 13/04/2023 09:58, Binbin Zhou wrote:
> This is now supported, enable for Loongson-2K systems. Other systems are
> unaffected.

I don't understand what do you want to say here. How defconfig change
could affect other systems?

> 
> Signed-off-by: WANG Xuerui <git@xen0n.name>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>

Squash with previous defconfig change. There is no point in enabling
options one by one.

Best regards,
Krzysztof

Re: [PATCH V3 2/7] rtc: Add support for the Loongson-2K/LS7A RTC

[Alexandre Belloni]

On 13/04/2023 15:57:34+0800, Binbin Zhou wrote:
> This RTC module is integrated into the Loongson-2K SoC and the LS7A
> bridge chip. This version is almost entirely rewritten to make use of
> current kernel API, and it supports both ACPI and DT.
> 
> This driver is shared by MIPS-based Loongson-3A4000 system (use FDT) and
> LoongArch-based Loongson-3A5000 system (use ACPI).
> 
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
> Signed-off-by: WANG Xuerui <git@xen0n.name>
> ---
>  drivers/rtc/Kconfig    |  11 ++
>  drivers/rtc/Makefile   |   1 +
>  drivers/rtc/rtc-ls2x.c | 345 +++++++++++++++++++++++++++++++++++++++++

This is v3 and this is still not merged in rtc-ls1x.c.

>  3 files changed, 357 insertions(+)
>  create mode 100644 drivers/rtc/rtc-ls2x.c
> 
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 753872408615..e1b9d64d2678 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -1706,6 +1706,17 @@ config RTC_DRV_LPC32XX
>  	  This driver can also be built as a module. If so, the module
>  	  will be called rtc-lpc32xx.
>  
> +config RTC_DRV_LS2X
> +	tristate "Loongson LS2X RTC"
> +	depends on MACH_LOONGSON64 || COMPILE_TEST
> +	select REGMAP_MMIO
> +	help
> +	  If you say yes here you get support for the RTC on the Loongson-2K
> +	  SoC and LS7A bridge, which first appeared on the Loongson-2H.
> +
> +	  This driver can also be built as a module. If so, the module
> +	  will be called rtc-ls2x.
> +
>  config RTC_DRV_PM8XXX
>  	tristate "Qualcomm PMIC8XXX RTC"
>  	depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST
> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> index ea445d1ebb17..cff5df09fc60 100644
> --- a/drivers/rtc/Makefile
> +++ b/drivers/rtc/Makefile
> @@ -82,6 +82,7 @@ obj-$(CONFIG_RTC_DRV_LOONGSON1)	+= rtc-ls1x.o
>  obj-$(CONFIG_RTC_DRV_LP8788)	+= rtc-lp8788.o
>  obj-$(CONFIG_RTC_DRV_LPC24XX)	+= rtc-lpc24xx.o
>  obj-$(CONFIG_RTC_DRV_LPC32XX)	+= rtc-lpc32xx.o
> +obj-$(CONFIG_RTC_DRV_LS2X)	+= rtc-ls2x.o
>  obj-$(CONFIG_RTC_DRV_M41T80)	+= rtc-m41t80.o
>  obj-$(CONFIG_RTC_DRV_M41T93)	+= rtc-m41t93.o
>  obj-$(CONFIG_RTC_DRV_M41T94)	+= rtc-m41t94.o
> diff --git a/drivers/rtc/rtc-ls2x.c b/drivers/rtc/rtc-ls2x.c
> new file mode 100644
> index 000000000000..c74dd88ae11b
> --- /dev/null
> +++ b/drivers/rtc/rtc-ls2x.c
> @@ -0,0 +1,345 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Loongson-2K/LS7A RTC driver
> + *
> + * Based on the original out-of-tree Loongson-2H RTC driver for Linux 2.6.32,
> + * by Shaozong Liu <liushaozong@loongson.cn>.
> + *
> + * Maintained out-of-tree by Huacai Chen <chenhuacai@kernel.org>.
> + * Rewritten for mainline by WANG Xuerui <git@xen0n.name>.
> + *                           Binbin Zhou <zhoubinbin@loongson.cn>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/rtc.h>
> +#include <linux/acpi.h>
> +
> +/* Time Of Year(TOY) counters registers */
> +#define TOY_TRIM_REG		0x20 /* Must be initialized to 0 */
> +#define TOY_WRITE0_REG		0x24 /* TOY low 32-bits value (write-only) */
> +#define TOY_WRITE1_REG		0x28 /* TOY high 32-bits value (write-only) */
> +#define TOY_READ0_REG		0x2c /* TOY low 32-bits value (read-only) */
> +#define TOY_READ1_REG		0x30 /* TOY high 32-bits value (read-only) */
> +#define TOY_MATCH0_REG		0x34 /* TOY timing interrupt 0 */
> +#define TOY_MATCH1_REG		0x38 /* TOY timing interrupt 1 */
> +#define TOY_MATCH2_REG		0x3c /* TOY timing interrupt 2 */
> +
> +/* RTC counters registers */
> +#define RTC_CTRL_REG		0x40 /* TOY and RTC control register */
> +#define RTC_TRIM_REG		0x60 /* Must be initialized to 0 */
> +#define RTC_WRITE0_REG		0x64 /* RTC counters value (write-only) */
> +#define RTC_READ0_REG		0x68 /* RTC counters value (read-only) */
> +#define RTC_MATCH0_REG		0x6c /* RTC timing interrupt 0 */
> +#define RTC_MATCH1_REG		0x70 /* RTC timing interrupt 1 */
> +#define RTC_MATCH2_REG		0x74 /* RTC timing interrupt 2 */
> +
> +/* bitmask of TOY_WRITE0_REG */
> +#define TOY_MON			GENMASK(31, 26)
> +#define TOY_DAY			GENMASK(25, 21)
> +#define TOY_HOUR		GENMASK(20, 16)
> +#define TOY_MIN			GENMASK(15, 10)
> +#define TOY_SEC			GENMASK(9, 4)
> +#define TOY_MSEC		GENMASK(3, 0)
> +
> +/* bitmask of TOY_MATCH0/1/2_REG */
> +#define TOY_MATCH_YEAR		GENMASK(31, 26)
> +#define TOY_MATCH_MON		GENMASK(25, 22)
> +#define TOY_MATCH_DAY		GENMASK(21, 17)
> +#define TOY_MATCH_HOUR		GENMASK(16, 12)
> +#define TOY_MATCH_MIN		GENMASK(11, 6)
> +#define TOY_MATCH_SEC		GENMASK(5, 0)
> +
> +/* bitmask of RTC_CTRL_REG */
> +#define RTC_ENABLE		BIT(13) /* 1: RTC counters enable */
> +#define TOY_ENABLE		BIT(11) /* 1: TOY counters enable */
> +#define OSC_ENABLE		BIT(8) /* 1: 32.768k crystal enable */
> +#define TOY_ENABLE_MASK		(TOY_ENABLE | OSC_ENABLE)
> +
> +/* PM domain registers */
> +#define PM1_STS_REG		0x0c /* Power management 1 status register */
> +#define RTC_STS			BIT(10) /* RTC status */
> +#define PM1_EN_REG		0x10 /* Power management 1 enable register */
> +#define RTC_EN			BIT(10) /* RTC event enable */
> +
> +/* Offset of PM domain from RTC domain, for rtc alarm */
> +enum ls2x_pm_offset {
> +	GENERIC_OFFSET = 0x100,
> +	LS2K1000_OFFSET = 0x800,
> +};
> +
> +struct ls2x_rtc_priv {
> +	spinlock_t lock; /* protects PM registers access */
> +	int irq;
> +	struct rtc_device *rtcdev;
> +	struct regmap *regmap;
> +	void __iomem *pm_base; /* PM domain base, for rtc alarm */
> +};
> +
> +static const struct regmap_config ls2x_rtc_regmap_config = {
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,
> +};
> +
> +/* IRQ Handlers */
> +static irqreturn_t ls2x_rtc_isr(int irq, void *id)
> +{
> +	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
> +
> +	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
> +	return IRQ_HANDLED;
> +}
> +
> +static u32 ls2x_rtc_handler(void *id)
> +{
> +	u32 ret;
> +	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
> +
> +	spin_lock(&priv->lock);
> +	/* Disable rtc event */
> +	writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
> +	       priv->pm_base + PM1_EN_REG);
> +
> +	/* Clear rtc interrupt status */
> +	writel(RTC_STS, priv->pm_base + PM1_STS_REG);
> +	spin_unlock(&priv->lock);
> +
> +	/*
> +	 * The TOY_MATCH0_REG should be cleared 0 here,
> +	 * otherwise the interrupt cannot be cleared.
> +	 */
> +	ret = regmap_write(priv->regmap, TOY_MATCH0_REG, 0);
> +	if (ret < 0)
> +		return ret;
> +
> +	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
> +	return 0;
> +}
> +
> +static int ls2x_rtc_read_time(struct device *dev, struct rtc_time *tm)
> +{
> +	int ret;
> +	u32 ctrl_data, rtc_data[2];
> +	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> +
> +	ret = regmap_read(priv->regmap, RTC_CTRL_REG, &ctrl_data);
> +	if (ret < 0)
> +		return ret;
> +
> +	if (!(ctrl_data & TOY_ENABLE_MASK))
> +		return -EINVAL;
> +
> +	ret = regmap_bulk_read(priv->regmap, TOY_READ0_REG, rtc_data,
> +			       ARRAY_SIZE(rtc_data));

There is still no answer on whether the TOY_READ0_REG and TOY_READ1_REG
are latched.

> +	if (ret < 0)
> +		return ret;
> +
> +	tm->tm_sec = FIELD_GET(TOY_SEC, rtc_data[0]);
> +	tm->tm_min = FIELD_GET(TOY_MIN, rtc_data[0]);
> +	tm->tm_hour = FIELD_GET(TOY_HOUR, rtc_data[0]);
> +	tm->tm_mday = FIELD_GET(TOY_DAY, rtc_data[0]);
> +	tm->tm_mon = FIELD_GET(TOY_MON, rtc_data[0]) - 1;
> +	tm->tm_year = rtc_data[1];
> +
> +	return 0;
> +}
> +
> +static int ls2x_rtc_set_time(struct device *dev, struct rtc_time *tm)
> +{
> +	int ret;
> +	u32 rtc_data[2];
> +	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> +
> +	rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)
> +		    | FIELD_PREP(TOY_MIN, tm->tm_min)
> +		    | FIELD_PREP(TOY_HOUR, tm->tm_hour)
> +		    | FIELD_PREP(TOY_DAY, tm->tm_mday)
> +		    | FIELD_PREP(TOY_MON, tm->tm_mon + 1);
> +	rtc_data[1] = tm->tm_year;
> +
> +	ret = regmap_bulk_write(priv->regmap, TOY_WRITE0_REG, rtc_data,
> +				ARRAY_SIZE(rtc_data));
> +	if (ret < 0)
> +		return ret;
> +
> +	/* Enable RTC TOY counters and crystal */
> +	return regmap_update_bits(priv->regmap, RTC_CTRL_REG, TOY_ENABLE_MASK,
> +				  TOY_ENABLE_MASK);
> +}
> +
> +static int ls2x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> +	int ret;
> +	u32 alarm_data;
> +	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> +
> +	ret = regmap_read(priv->regmap, TOY_MATCH0_REG, &alarm_data);
> +	if (ret < 0)
> +		return ret;
> +
> +	alrm->time.tm_sec = FIELD_GET(TOY_MATCH_SEC, alarm_data);
> +	alrm->time.tm_min = FIELD_GET(TOY_MATCH_MIN, alarm_data);
> +	alrm->time.tm_hour = FIELD_GET(TOY_MATCH_HOUR, alarm_data);
> +	alrm->time.tm_mday = FIELD_GET(TOY_MATCH_DAY, alarm_data);
> +	alrm->time.tm_mon = FIELD_GET(TOY_MATCH_MON, alarm_data) - 1;
> +	/*
> +	 * This is a hardware bug.
> +	 * The year field in the SYS_TOYMATCH has only 6 bits(bits[31:26]),
> +	 * so it can only be set from 1900 to 1963.
> +	 * In order to avoid an invalid alarm value during booting, we manually
> +	 * add 64 after reading the year field (equivalent to filling in the
> +	 * high bits).
> +	 */
> +	alrm->time.tm_year = FIELD_GET(TOY_MATCH_YEAR, alarm_data) + 64;

This is restricting to the 1964 to 2027 range whereas you claim the RTC
has a 2000 to 2099 range. Why don't you simply do 2000 to 2063 which
would at least match most of it.

I am very very disappointed. I had all these comments on v1 and v2, you
are sending v3 with the exact same issues. How can I trust this is ever
going to progress in the right direction?


-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH V3 0/7] rtc: ls2x: Add support for the Loongson-2K/LS7A RTC

[Alexandre Belloni]

On 13/04/2023 15:57:32+0800, Binbin Zhou wrote:
> Hi all:
> 
> The initial DT-base ls2x rtc driver was written by Wang Xuerui, He has
> released five versions of patchset before, and all related mail records
> are shown below if you are interested:
> 
> https://lore.kernel.org/all/?q=ls2x-rtc
> 
> In this series of patches, based on the code above, I have added the
> following support:
> 
> 1. Add ACPI-related support, as Loongson-3A5000 + LS7A is now ACPI-base
>    by default under LoongArch architecture;
> 2. Add rtc alarm/walarm related functions.
> 
> I have tested on Loongson-3A5000LA+LS7A1000/LS7A2000, Loongson-2K1000LA
> and Loongson-2K0500.
> 
> BTW:
> As LS1X does not support DT, we will merge LS2X and LS1X after keguang
> has completed DT support for LS1X.

Stop waiting and simply add it.

> 
> -------
> Changes since v2:
> - Rebase on the top of rtc-next.
> patch(1/7):
>  - The new patch.
> patch(2/7):
>  - Check patchset with "checkpatch.pl --strict";
>  - Drop static inline functions which are used only once, such as
>    ls2x_rtc_regs_to_time;
>  - Remove the suruct ls2x_rtc_regs and regmap_bulk_xxx() is used to read
>    and write rtc registers;
>  - Clear the RTC wakeup interrupt manually;
>  - Enable the RTC in set_time() and check in read_time();
>  - device_get_match_data() is used to get ls2x_pm_offset, for LS2k1000
>    has the different value;
>  - Remove some inexact CONFIG_ACPI;
>  - remove()->remove_new().
> 
> Changes since v1:
> 1. Rebased on top of latest loongarch-next;
> 2. Add interrupt descriptions to the ls2k and ls7a DTS files to avoid
> errors when the driver gets the IRQ number, Thanks to Qing Zhang for
> testing;
> 3. Remove some inexact CONFIG_ACPI.
> 
> Thanks.
> 
> Binbin Zhou (7):
>   dt-bindings: rtc: Subdivision of LS2X RTC compatible
>   rtc: Add support for the Loongson-2K/LS7A RTC
>   LoongArch: Enable LS2X RTC in loongson3_defconfig
>   MIPS: Loongson64: DTS: Add RTC support to LS7A
>   MIPS: Loongson: Enable LS2X RTC in loongson3_defconfig
>   MIPS: Loongson64: DTS: Add RTC support to Loongson-2K
>   MIPS: Loongson: Enable LS2X RTC in loongson2k_defconfig
> 
>  .../devicetree/bindings/rtc/trivial-rtc.yaml  |   7 +-
>  arch/loongarch/configs/loongson3_defconfig    |   1 +
>  .../boot/dts/loongson/loongson64-2k1000.dtsi  |   7 +
>  arch/mips/boot/dts/loongson/ls7a-pch.dtsi     |   7 +
>  arch/mips/configs/loongson2k_defconfig        |   1 +
>  arch/mips/configs/loongson3_defconfig         |   1 +
>  drivers/rtc/Kconfig                           |  11 +
>  drivers/rtc/Makefile                          |   1 +
>  drivers/rtc/rtc-ls2x.c                        | 345 ++++++++++++++++++
>  9 files changed, 379 insertions(+), 2 deletions(-)
>  create mode 100644 drivers/rtc/rtc-ls2x.c
> 
> -- 
> 2.39.1
> 

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH V3 1/7] dt-bindings: rtc: Subdivision of LS2X RTC compatible

[Binbin Zhou]

On Mon, Apr 17, 2023 at 1:31 AM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 13/04/2023 09:57, Binbin Zhou wrote:
> > The LS2X RTC alarm depends on the associated registers in a separate
> > power management domain.
> >
> > In order to define the PM domain addresses of the different chips, a
> > more detailed description of compatible is required.
>
> This does not match your diff at all.
>
> >
> > Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> > ---
> >  Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> > index a3603e638c37..2928811b83a0 100644
> > --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> > +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> > @@ -47,8 +47,11 @@ properties:
> >        - isil,isl1218
> >        # Intersil ISL12022 Real-time Clock
> >        - isil,isl12022
> > -      # Loongson-2K Socs/LS7A bridge Real-time Clock
> > -      - loongson,ls2x-rtc
>
> Why removing it?
>
> > +      # Loongson LS7A bridge Real-time Clock
> > +      - loongson,ls7a-rtc
> > +      # Loongson-2K Socs Real-time Clock
> > +      - loongson,ls2k0500-rtc
> > +      - loongson,ls2k1000-rtc
>
> That's even more surprising...
>
> I don't understand what you are doing here at all.
Hi Krzysztof:

Sorry, maybe my description was not accurate.

Looking back at my V2 patchset, the first patch was to add ls2x-rtc compatible.
(https://lore.kernel.org/linux-rtc/0288efeb4209e4a49af07de6399045aaa00a970c.1673227292.git.zhoubinbin@loongson.cn/)

In the process of modifying the V2 patchset, it was discovered that
the ACPI domain offset addresses on some of the socs (LS2K1000) were
different and I wanted to differentiate them by soc compatible. So I
was going to drop the ls2x-rtc compatible directly from the V3 patch
set.
However, when I rebased the V3 patchset, I found that the previous
ls2x-rtc compatible patch had been merged (commit 473a8ce756fd). So I
had to remove it and add soc compatible.

How about the following description:
Since commit 473a8ce756fd (dt-bindings: rtc: Add Loongson LS2X RTC
support), the ls2x-rtc compatible has been added. But the specific soc
compatible is needed to be used to define different ACPI domain offset
addresses.

Thanks.
Binbin

>
> Best regards,
> Krzysztof
>
>

Re: [PATCH V3 1/7] dt-bindings: rtc: Subdivision of LS2X RTC compatible

[Krzysztof Kozlowski]

On 19/04/2023 09:12, Binbin Zhou wrote:
> On Mon, Apr 17, 2023 at 1:31 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 13/04/2023 09:57, Binbin Zhou wrote:
>>> The LS2X RTC alarm depends on the associated registers in a separate
>>> power management domain.
>>>
>>> In order to define the PM domain addresses of the different chips, a
>>> more detailed description of compatible is required.
>>
>> This does not match your diff at all.
>>
>>>
>>> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
>>> ---
>>>  Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
>>>  1 file changed, 5 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
>>> index a3603e638c37..2928811b83a0 100644
>>> --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
>>> +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
>>> @@ -47,8 +47,11 @@ properties:
>>>        - isil,isl1218
>>>        # Intersil ISL12022 Real-time Clock
>>>        - isil,isl12022
>>> -      # Loongson-2K Socs/LS7A bridge Real-time Clock
>>> -      - loongson,ls2x-rtc
>>
>> Why removing it?
>>
>>> +      # Loongson LS7A bridge Real-time Clock
>>> +      - loongson,ls7a-rtc
>>> +      # Loongson-2K Socs Real-time Clock
>>> +      - loongson,ls2k0500-rtc
>>> +      - loongson,ls2k1000-rtc
>>
>> That's even more surprising...
>>
>> I don't understand what you are doing here at all.
> Hi Krzysztof:
> 
> Sorry, maybe my description was not accurate.
> 
> Looking back at my V2 patchset, the first patch was to add ls2x-rtc compatible.
> (https://lore.kernel.org/linux-rtc/0288efeb4209e4a49af07de6399045aaa00a970c.1673227292.git.zhoubinbin@loongson.cn/)
> 
> In the process of modifying the V2 patchset, it was discovered that
> the ACPI domain offset addresses on some of the socs (LS2K1000) were
> different and I wanted to differentiate them by soc compatible. So I
> was going to drop the ls2x-rtc compatible directly from the V3 patch
> set.
> However, when I rebased the V3 patchset, I found that the previous
> ls2x-rtc compatible patch had been merged (commit 473a8ce756fd). So I
> had to remove it and add soc compatible.

Can all folks in Loongson stop adding wildcards as compatibles? Several
compatibles were acked, because we do not know what 'x' stands for. Now,
it turns out it's a wildcard which is not allowed.

https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42

> 
> How about the following description:
> Since commit 473a8ce756fd (dt-bindings: rtc: Add Loongson LS2X RTC
> support), the ls2x-rtc compatible has been added. But the specific soc
> compatible is needed to be used to define different ACPI domain offset
> addresses.
> 
It's better. Anyway, SoC parts are rarely trivial devices, so this
should be probably moved to its own schema.

Best regards,
Krzysztof

Re: [PATCH V3 1/7] dt-bindings: rtc: Subdivision of LS2X RTC compatible

[Binbin Zhou]

On Wed, Apr 19, 2023 at 4:52 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 19/04/2023 09:12, Binbin Zhou wrote:
> > On Mon, Apr 17, 2023 at 1:31 AM Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 13/04/2023 09:57, Binbin Zhou wrote:
> >>> The LS2X RTC alarm depends on the associated registers in a separate
> >>> power management domain.
> >>>
> >>> In order to define the PM domain addresses of the different chips, a
> >>> more detailed description of compatible is required.
> >>
> >> This does not match your diff at all.
> >>
> >>>
> >>> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> >>> ---
> >>>  Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
> >>>  1 file changed, 5 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> >>> index a3603e638c37..2928811b83a0 100644
> >>> --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> >>> +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
> >>> @@ -47,8 +47,11 @@ properties:
> >>>        - isil,isl1218
> >>>        # Intersil ISL12022 Real-time Clock
> >>>        - isil,isl12022
> >>> -      # Loongson-2K Socs/LS7A bridge Real-time Clock
> >>> -      - loongson,ls2x-rtc
> >>
> >> Why removing it?
> >>
> >>> +      # Loongson LS7A bridge Real-time Clock
> >>> +      - loongson,ls7a-rtc
> >>> +      # Loongson-2K Socs Real-time Clock
> >>> +      - loongson,ls2k0500-rtc
> >>> +      - loongson,ls2k1000-rtc
> >>
> >> That's even more surprising...
> >>
> >> I don't understand what you are doing here at all.
> > Hi Krzysztof:
> >
> > Sorry, maybe my description was not accurate.
> >
> > Looking back at my V2 patchset, the first patch was to add ls2x-rtc compatible.
> > (https://lore.kernel.org/linux-rtc/0288efeb4209e4a49af07de6399045aaa00a970c.1673227292.git.zhoubinbin@loongson.cn/)
> >
> > In the process of modifying the V2 patchset, it was discovered that
> > the ACPI domain offset addresses on some of the socs (LS2K1000) were
> > different and I wanted to differentiate them by soc compatible. So I
> > was going to drop the ls2x-rtc compatible directly from the V3 patch
> > set.
> > However, when I rebased the V3 patchset, I found that the previous
> > ls2x-rtc compatible patch had been merged (commit 473a8ce756fd). So I
> > had to remove it and add soc compatible.
>
> Can all folks in Loongson stop adding wildcards as compatibles? Several
> compatibles were acked, because we do not know what 'x' stands for. Now,
> it turns out it's a wildcard which is not allowed.
>
> https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42
>
> >
> > How about the following description:
> > Since commit 473a8ce756fd (dt-bindings: rtc: Add Loongson LS2X RTC
> > support), the ls2x-rtc compatible has been added. But the specific soc
> > compatible is needed to be used to define different ACPI domain offset
> > addresses.
> >
> It's better. Anyway, SoC parts are rarely trivial devices, so this
> should be probably moved to its own schema.

OK, I'll move these from rivial-rtc.yaml to a separate schema file.


Thanks.
Binbin

>
> Best regards,
> Krzysztof
>

Re: [PATCH V3 2/7] rtc: Add support for the Loongson-2K/LS7A RTC

[Binbin Zhou]

On Mon, Apr 17, 2023 at 3:49 AM Alexandre Belloni
<alexandre.belloni@bootlin.com> wrote:
>
> On 13/04/2023 15:57:34+0800, Binbin Zhou wrote:
> > This RTC module is integrated into the Loongson-2K SoC and the LS7A
> > bridge chip. This version is almost entirely rewritten to make use of
> > current kernel API, and it supports both ACPI and DT.
> >
> > This driver is shared by MIPS-based Loongson-3A4000 system (use FDT) and
> > LoongArch-based Loongson-3A5000 system (use ACPI).
> >
> > Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> > Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
> > Signed-off-by: WANG Xuerui <git@xen0n.name>
> > ---
> >  drivers/rtc/Kconfig    |  11 ++
> >  drivers/rtc/Makefile   |   1 +
> >  drivers/rtc/rtc-ls2x.c | 345 +++++++++++++++++++++++++++++++++++++++++
>
> This is v3 and this is still not merged in rtc-ls1x.c.

Hi Alexandre:

The ls1x rtc has been merged in at my local repository and Keguang has
helped test it through, so it will be ready for release in the next
version.
In the meantime rtc-ls2x will be renamed to rtc-loongson.

>
> >  3 files changed, 357 insertions(+)
> >  create mode 100644 drivers/rtc/rtc-ls2x.c
> >
> > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> > index 753872408615..e1b9d64d2678 100644
> > --- a/drivers/rtc/Kconfig
> > +++ b/drivers/rtc/Kconfig
> > @@ -1706,6 +1706,17 @@ config RTC_DRV_LPC32XX
> >         This driver can also be built as a module. If so, the module
> >         will be called rtc-lpc32xx.
> >
> > +config RTC_DRV_LS2X
> > +     tristate "Loongson LS2X RTC"
> > +     depends on MACH_LOONGSON64 || COMPILE_TEST
> > +     select REGMAP_MMIO
> > +     help
> > +       If you say yes here you get support for the RTC on the Loongson-2K
> > +       SoC and LS7A bridge, which first appeared on the Loongson-2H.
> > +
> > +       This driver can also be built as a module. If so, the module
> > +       will be called rtc-ls2x.
> > +
> >  config RTC_DRV_PM8XXX
> >       tristate "Qualcomm PMIC8XXX RTC"
> >       depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST
> > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> > index ea445d1ebb17..cff5df09fc60 100644
> > --- a/drivers/rtc/Makefile
> > +++ b/drivers/rtc/Makefile
> > @@ -82,6 +82,7 @@ obj-$(CONFIG_RTC_DRV_LOONGSON1)     += rtc-ls1x.o
> >  obj-$(CONFIG_RTC_DRV_LP8788) += rtc-lp8788.o
> >  obj-$(CONFIG_RTC_DRV_LPC24XX)        += rtc-lpc24xx.o
> >  obj-$(CONFIG_RTC_DRV_LPC32XX)        += rtc-lpc32xx.o
> > +obj-$(CONFIG_RTC_DRV_LS2X)   += rtc-ls2x.o
> >  obj-$(CONFIG_RTC_DRV_M41T80) += rtc-m41t80.o
> >  obj-$(CONFIG_RTC_DRV_M41T93) += rtc-m41t93.o
> >  obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o
> > diff --git a/drivers/rtc/rtc-ls2x.c b/drivers/rtc/rtc-ls2x.c
> > new file mode 100644
> > index 000000000000..c74dd88ae11b
> > --- /dev/null
> > +++ b/drivers/rtc/rtc-ls2x.c
> > @@ -0,0 +1,345 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Loongson-2K/LS7A RTC driver
> > + *
> > + * Based on the original out-of-tree Loongson-2H RTC driver for Linux 2.6.32,
> > + * by Shaozong Liu <liushaozong@loongson.cn>.
> > + *
> > + * Maintained out-of-tree by Huacai Chen <chenhuacai@kernel.org>.
> > + * Rewritten for mainline by WANG Xuerui <git@xen0n.name>.
> > + *                           Binbin Zhou <zhoubinbin@loongson.cn>
> > + */
> > +
> > +#include <linux/bitfield.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +#include <linux/rtc.h>
> > +#include <linux/acpi.h>
> > +
> > +/* Time Of Year(TOY) counters registers */
> > +#define TOY_TRIM_REG         0x20 /* Must be initialized to 0 */
> > +#define TOY_WRITE0_REG               0x24 /* TOY low 32-bits value (write-only) */
> > +#define TOY_WRITE1_REG               0x28 /* TOY high 32-bits value (write-only) */
> > +#define TOY_READ0_REG                0x2c /* TOY low 32-bits value (read-only) */
> > +#define TOY_READ1_REG                0x30 /* TOY high 32-bits value (read-only) */
> > +#define TOY_MATCH0_REG               0x34 /* TOY timing interrupt 0 */
> > +#define TOY_MATCH1_REG               0x38 /* TOY timing interrupt 1 */
> > +#define TOY_MATCH2_REG               0x3c /* TOY timing interrupt 2 */
> > +
> > +/* RTC counters registers */
> > +#define RTC_CTRL_REG         0x40 /* TOY and RTC control register */
> > +#define RTC_TRIM_REG         0x60 /* Must be initialized to 0 */
> > +#define RTC_WRITE0_REG               0x64 /* RTC counters value (write-only) */
> > +#define RTC_READ0_REG                0x68 /* RTC counters value (read-only) */
> > +#define RTC_MATCH0_REG               0x6c /* RTC timing interrupt 0 */
> > +#define RTC_MATCH1_REG               0x70 /* RTC timing interrupt 1 */
> > +#define RTC_MATCH2_REG               0x74 /* RTC timing interrupt 2 */
> > +
> > +/* bitmask of TOY_WRITE0_REG */
> > +#define TOY_MON                      GENMASK(31, 26)
> > +#define TOY_DAY                      GENMASK(25, 21)
> > +#define TOY_HOUR             GENMASK(20, 16)
> > +#define TOY_MIN                      GENMASK(15, 10)
> > +#define TOY_SEC                      GENMASK(9, 4)
> > +#define TOY_MSEC             GENMASK(3, 0)
> > +
> > +/* bitmask of TOY_MATCH0/1/2_REG */
> > +#define TOY_MATCH_YEAR               GENMASK(31, 26)
> > +#define TOY_MATCH_MON                GENMASK(25, 22)
> > +#define TOY_MATCH_DAY                GENMASK(21, 17)
> > +#define TOY_MATCH_HOUR               GENMASK(16, 12)
> > +#define TOY_MATCH_MIN                GENMASK(11, 6)
> > +#define TOY_MATCH_SEC                GENMASK(5, 0)
> > +
> > +/* bitmask of RTC_CTRL_REG */
> > +#define RTC_ENABLE           BIT(13) /* 1: RTC counters enable */
> > +#define TOY_ENABLE           BIT(11) /* 1: TOY counters enable */
> > +#define OSC_ENABLE           BIT(8) /* 1: 32.768k crystal enable */
> > +#define TOY_ENABLE_MASK              (TOY_ENABLE | OSC_ENABLE)
> > +
> > +/* PM domain registers */
> > +#define PM1_STS_REG          0x0c /* Power management 1 status register */
> > +#define RTC_STS                      BIT(10) /* RTC status */
> > +#define PM1_EN_REG           0x10 /* Power management 1 enable register */
> > +#define RTC_EN                       BIT(10) /* RTC event enable */
> > +
> > +/* Offset of PM domain from RTC domain, for rtc alarm */
> > +enum ls2x_pm_offset {
> > +     GENERIC_OFFSET = 0x100,
> > +     LS2K1000_OFFSET = 0x800,
> > +};
> > +
> > +struct ls2x_rtc_priv {
> > +     spinlock_t lock; /* protects PM registers access */
> > +     int irq;
> > +     struct rtc_device *rtcdev;
> > +     struct regmap *regmap;
> > +     void __iomem *pm_base; /* PM domain base, for rtc alarm */
> > +};
> > +
> > +static const struct regmap_config ls2x_rtc_regmap_config = {
> > +     .reg_bits = 32,
> > +     .val_bits = 32,
> > +     .reg_stride = 4,
> > +};
> > +
> > +/* IRQ Handlers */
> > +static irqreturn_t ls2x_rtc_isr(int irq, void *id)
> > +{
> > +     struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
> > +
> > +     rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
> > +     return IRQ_HANDLED;
> > +}
> > +
> > +static u32 ls2x_rtc_handler(void *id)
> > +{
> > +     u32 ret;
> > +     struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
> > +
> > +     spin_lock(&priv->lock);
> > +     /* Disable rtc event */
> > +     writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
> > +            priv->pm_base + PM1_EN_REG);
> > +
> > +     /* Clear rtc interrupt status */
> > +     writel(RTC_STS, priv->pm_base + PM1_STS_REG);
> > +     spin_unlock(&priv->lock);
> > +
> > +     /*
> > +      * The TOY_MATCH0_REG should be cleared 0 here,
> > +      * otherwise the interrupt cannot be cleared.
> > +      */
> > +     ret = regmap_write(priv->regmap, TOY_MATCH0_REG, 0);
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
> > +     return 0;
> > +}
> > +
> > +static int ls2x_rtc_read_time(struct device *dev, struct rtc_time *tm)
> > +{
> > +     int ret;
> > +     u32 ctrl_data, rtc_data[2];
> > +     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> > +
> > +     ret = regmap_read(priv->regmap, RTC_CTRL_REG, &ctrl_data);
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     if (!(ctrl_data & TOY_ENABLE_MASK))
> > +             return -EINVAL;
> > +
> > +     ret = regmap_bulk_read(priv->regmap, TOY_READ0_REG, rtc_data,
> > +                            ARRAY_SIZE(rtc_data));
>
> There is still no answer on whether the TOY_READ0_REG and TOY_READ1_REG
> are latched.
>

After talking to colleagues offline, the RTC hardware itself can
guarantee atomicity for bulk reads.

> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     tm->tm_sec = FIELD_GET(TOY_SEC, rtc_data[0]);
> > +     tm->tm_min = FIELD_GET(TOY_MIN, rtc_data[0]);
> > +     tm->tm_hour = FIELD_GET(TOY_HOUR, rtc_data[0]);
> > +     tm->tm_mday = FIELD_GET(TOY_DAY, rtc_data[0]);
> > +     tm->tm_mon = FIELD_GET(TOY_MON, rtc_data[0]) - 1;
> > +     tm->tm_year = rtc_data[1];
> > +
> > +     return 0;
> > +}
> > +
> > +static int ls2x_rtc_set_time(struct device *dev, struct rtc_time *tm)
> > +{
> > +     int ret;
> > +     u32 rtc_data[2];
> > +     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> > +
> > +     rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)
> > +                 | FIELD_PREP(TOY_MIN, tm->tm_min)
> > +                 | FIELD_PREP(TOY_HOUR, tm->tm_hour)
> > +                 | FIELD_PREP(TOY_DAY, tm->tm_mday)
> > +                 | FIELD_PREP(TOY_MON, tm->tm_mon + 1);
> > +     rtc_data[1] = tm->tm_year;
> > +
> > +     ret = regmap_bulk_write(priv->regmap, TOY_WRITE0_REG, rtc_data,
> > +                             ARRAY_SIZE(rtc_data));
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     /* Enable RTC TOY counters and crystal */
> > +     return regmap_update_bits(priv->regmap, RTC_CTRL_REG, TOY_ENABLE_MASK,
> > +                               TOY_ENABLE_MASK);
> > +}
> > +
> > +static int ls2x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> > +{
> > +     int ret;
> > +     u32 alarm_data;
> > +     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
> > +
> > +     ret = regmap_read(priv->regmap, TOY_MATCH0_REG, &alarm_data);
> > +     if (ret < 0)
> > +             return ret;
> > +
> > +     alrm->time.tm_sec = FIELD_GET(TOY_MATCH_SEC, alarm_data);
> > +     alrm->time.tm_min = FIELD_GET(TOY_MATCH_MIN, alarm_data);
> > +     alrm->time.tm_hour = FIELD_GET(TOY_MATCH_HOUR, alarm_data);
> > +     alrm->time.tm_mday = FIELD_GET(TOY_MATCH_DAY, alarm_data);
> > +     alrm->time.tm_mon = FIELD_GET(TOY_MATCH_MON, alarm_data) - 1;
> > +     /*
> > +      * This is a hardware bug.
> > +      * The year field in the SYS_TOYMATCH has only 6 bits(bits[31:26]),
> > +      * so it can only be set from 1900 to 1963.
> > +      * In order to avoid an invalid alarm value during booting, we manually
> > +      * add 64 after reading the year field (equivalent to filling in the
> > +      * high bits).
> > +      */
> > +     alrm->time.tm_year = FIELD_GET(TOY_MATCH_YEAR, alarm_data) + 64;
>
> This is restricting to the 1964 to 2027 range whereas you claim the RTC
> has a 2000 to 2099 range. Why don't you simply do 2000 to 2063 which
> would at least match most of it.
>

I have compiled a description of this hardware defect:

Firstly, the root cause of the defect is that there are not enough
bits in the MATCH register to indicate the year, only 6 bits.
The rtc hardware uses the MATCH register to compare the alarm time
values and to determine if an alarm is triggered.

Therefore, we have to ensure that the lower 6 bits remain unchanged
during the conversion of the year value . Otherwise the rtc hardware
will definitely not succeed when matching and thus the alarm function
will not work.
In summary, here we can only add or subtract 64 (or a multiple of 64).

To avoid the year being described only up to 2027, how about the
following solution:
1. define the global variable year_offset, which holds the required offset.
2. In ls2x_rtc_read_time(), calculate year_offset = tm->tm_year / 64 * 64.

> I am very very disappointed. I had all these comments on v1 and v2, you
> are sending v3 with the exact same issues. How can I trust this is ever
> going to progress in the right direction?

I apologise that the time between these two patch sets is a bit long
and I did not double check the relevant change points.
I will double check each point that needs to be changed before sending
out subsequent patches.

Again, I apologise.

Thanks.
Binbin

>
>
> --
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
>