[PATCH v4 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it

[PATCH v4 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it

[Mark Hasemeyer]

Currently the cros_ec driver assumes that its associated interrupt is
wake capable. This is an incorrect assumption as some Chromebooks use a
separate wake pin, while others overload the interrupt for wake and IO.
This patch train updates the driver to query the underlying ACPI/DT data
to determine whether or not the IRQ should be enabled for wake.

Both the device tree and ACPI systems have methods for reporting IRQ
wake capability. In device tree based systems, a node can advertise
itself as a 'wakeup-source'. In ACPI based systems, GpioInt and
Interrupt resource descriptors can use the 'SharedAndWake' or
'ExclusiveAndWake' share types.

Some logic is added to the platform, ACPI, and DT subsystems to more
easily pipe wakeirq information up to the driver.

Changes in v4:
-Rebase on linux-next
-See each patch for patch specific changes

Changes in v3:
-Rebase on linux-next
-See each patch for patch specific changes

Changes in v2:
-Rebase on linux-next
-Add cover letter
-See each patch for patch specific changes

Mark Hasemeyer (24):
  resource: Add DEFINE_RES_*_NAMED_FLAGS macro
  gpiolib: acpi: Modify acpi_dev_irq_wake_get_by() to use resource
  i2c: acpi: Modify i2c_acpi_get_irq() to use resource
  dt-bindings: power: Clarify wording for wakeup-source property
  ARM: dts: tegra: Enable cros-ec-spi as wake source
  ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source
  ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source
  ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source
  arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source
  arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source
  arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source
  arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source
  arm64: dts: tegra: Enable cros-ec-spi as wake source
  arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source
  arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source
  arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source
  arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source
  of: irq: add wake capable bit to of_irq_resource()
  of: irq: Add default implementation for of_irq_to_resource()
  of: irq: Remove extern from function declarations
  device property: Modify fwnode irq_get() to use resource
  device property: Update functions to use EXPORT_SYMBOL_GPL()
  platform: Modify platform_get_irq_optional() to use resource
  platform/chrome: cros_ec: Use PM subsystem to manage wakeirq

 .../bindings/power/wakeup-source.txt          | 18 ++--
 arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi   |  1 +
 arch/arm/boot/dts/nvidia/tegra124-venice2.dts |  1 +
 .../rockchip/rk3288-veyron-chromebook.dtsi    |  1 +
 .../boot/dts/samsung/exynos5420-peach-pit.dts |  1 +
 .../boot/dts/samsung/exynos5800-peach-pi.dts  |  1 +
 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi  |  1 +
 .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi |  1 +
 .../boot/dts/mediatek/mt8192-asurada.dtsi     |  1 +
 .../boot/dts/mediatek/mt8195-cherry.dtsi      |  1 +
 .../arm64/boot/dts/nvidia/tegra132-norrin.dts |  1 +
 arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi  |  1 +
 .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi |  1 +
 .../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi |  1 +
 arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi    |  1 +
 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi  |  1 +
 drivers/acpi/property.c                       | 11 ++-
 drivers/base/platform.c                       | 90 ++++++++++++-------
 drivers/base/property.c                       | 40 ++++++---
 drivers/gpio/gpiolib-acpi.c                   | 28 ++++--
 drivers/i2c/i2c-core-acpi.c                   | 43 ++++-----
 drivers/i2c/i2c-core-base.c                   |  6 +-
 drivers/i2c/i2c-core.h                        |  4 +-
 drivers/of/irq.c                              | 39 +++++++-
 drivers/of/property.c                         |  8 +-
 drivers/platform/chrome/cros_ec.c             | 48 ++++++++--
 drivers/platform/chrome/cros_ec_lpc.c         | 40 +++++++--
 drivers/platform/chrome/cros_ec_spi.c         | 15 ++--
 drivers/platform/chrome/cros_ec_uart.c        | 14 ++-
 include/linux/acpi.h                          | 25 +++---
 include/linux/fwnode.h                        |  8 +-
 include/linux/ioport.h                        | 20 +++--
 include/linux/of_irq.h                        | 41 +++++----
 include/linux/platform_data/cros_ec_proto.h   |  4 +-
 include/linux/platform_device.h               |  3 +
 include/linux/property.h                      |  2 +
 36 files changed, 350 insertions(+), 172 deletions(-)

-- 
2.43.0.472.g3155946c3a-goog

[PATCH v4 07/24] ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source

[Mark Hasemeyer]

The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.

Some Chromebooks use a separate wake pin, while others overload the
interrupt for wake and IO. With the current assumption, spurious wakes
can occur on systems that use a separate wake pin. It is planned to
update the driver to no longer assume that the EC interrupt pin should
be enabled for wake.

Add the wakeup-source property to all cros-ec-spi compatible device
nodes to signify to the driver that they should still be a valid wakeup
source.

Signed-off-by: Mark Hasemeyer <markhas@chromium.org>
---

(no changes since v3)

Changes in v3:
-Update commit message to provide details of the motivation behind the
change

Changes in v2:
-Split by arch/soc

 arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
index 4e757b6e28e1c..3759742d38cac 100644
--- a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
@@ -967,6 +967,7 @@ cros_ec: cros-ec@0 {
 		reg = <0>;
 		spi-max-frequency = <3125000>;
 		google,has-vbc-nvram;
+		wakeup-source;
 
 		controller-data {
 			samsung,spi-feedback-delay = <1>;
-- 
2.43.0.472.g3155946c3a-goog

[PATCH v4 08/24] ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source

[Mark Hasemeyer]

The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.

Some Chromebooks use a separate wake pin, while others overload the
interrupt for wake and IO. With the current assumption, spurious wakes
can occur on systems that use a separate wake pin. It is planned to
update the driver to no longer assume that the EC interrupt pin should
be enabled for wake.

Add the wakeup-source property to all cros-ec-spi compatible device
nodes to signify to the driver that they should still be a valid wakeup
source.

Signed-off-by: Mark Hasemeyer <markhas@chromium.org>
---

(no changes since v3)

Changes in v3:
-Update commit message to provide details of the motivation behind the
change

Changes in v2:
-Split by arch/soc

 arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts
index f91bc4ae008e4..9bbbdce9103a6 100644
--- a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts
@@ -949,6 +949,7 @@ cros_ec: cros-ec@0 {
 		reg = <0>;
 		spi-max-frequency = <3125000>;
 		google,has-vbc-nvram;
+		wakeup-source;
 
 		controller-data {
 			samsung,spi-feedback-delay = <1>;
-- 
2.43.0.472.g3155946c3a-goog

Re: [PATCH v4 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it

[Matthias Brugger]

On 02/01/2024 22:07, Mark Hasemeyer wrote:
> Currently the cros_ec driver assumes that its associated interrupt is
> wake capable. This is an incorrect assumption as some Chromebooks use a
> separate wake pin, while others overload the interrupt for wake and IO.
> This patch train updates the driver to query the underlying ACPI/DT data
> to determine whether or not the IRQ should be enabled for wake.
> 
> Both the device tree and ACPI systems have methods for reporting IRQ
> wake capability. In device tree based systems, a node can advertise
> itself as a 'wakeup-source'. In ACPI based systems, GpioInt and
> Interrupt resource descriptors can use the 'SharedAndWake' or
> 'ExclusiveAndWake' share types.
> 
> Some logic is added to the platform, ACPI, and DT subsystems to more
> easily pipe wakeirq information up to the driver.
> 

Patch 9, 10, 11 and 12 applied to the mediatek tree.

Thanks!


> Changes in v4:
> -Rebase on linux-next
> -See each patch for patch specific changes
> 
> Changes in v3:
> -Rebase on linux-next
> -See each patch for patch specific changes
> 
> Changes in v2:
> -Rebase on linux-next
> -Add cover letter
> -See each patch for patch specific changes
> 
> Mark Hasemeyer (24):
>    resource: Add DEFINE_RES_*_NAMED_FLAGS macro
>    gpiolib: acpi: Modify acpi_dev_irq_wake_get_by() to use resource
>    i2c: acpi: Modify i2c_acpi_get_irq() to use resource
>    dt-bindings: power: Clarify wording for wakeup-source property
>    ARM: dts: tegra: Enable cros-ec-spi as wake source
>    ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source
>    ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source
>    ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source
>    arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source
>    arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source
>    arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source
>    arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source
>    arm64: dts: tegra: Enable cros-ec-spi as wake source
>    arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source
>    arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source
>    arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source
>    arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source
>    of: irq: add wake capable bit to of_irq_resource()
>    of: irq: Add default implementation for of_irq_to_resource()
>    of: irq: Remove extern from function declarations
>    device property: Modify fwnode irq_get() to use resource
>    device property: Update functions to use EXPORT_SYMBOL_GPL()
>    platform: Modify platform_get_irq_optional() to use resource
>    platform/chrome: cros_ec: Use PM subsystem to manage wakeirq
> 
>   .../bindings/power/wakeup-source.txt          | 18 ++--
>   arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi   |  1 +
>   arch/arm/boot/dts/nvidia/tegra124-venice2.dts |  1 +
>   .../rockchip/rk3288-veyron-chromebook.dtsi    |  1 +
>   .../boot/dts/samsung/exynos5420-peach-pit.dts |  1 +
>   .../boot/dts/samsung/exynos5800-peach-pi.dts  |  1 +
>   arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi  |  1 +
>   .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi |  1 +
>   .../boot/dts/mediatek/mt8192-asurada.dtsi     |  1 +
>   .../boot/dts/mediatek/mt8195-cherry.dtsi      |  1 +
>   .../arm64/boot/dts/nvidia/tegra132-norrin.dts |  1 +
>   arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi  |  1 +
>   .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi |  1 +
>   .../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi |  1 +
>   arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi    |  1 +
>   arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi  |  1 +
>   drivers/acpi/property.c                       | 11 ++-
>   drivers/base/platform.c                       | 90 ++++++++++++-------
>   drivers/base/property.c                       | 40 ++++++---
>   drivers/gpio/gpiolib-acpi.c                   | 28 ++++--
>   drivers/i2c/i2c-core-acpi.c                   | 43 ++++-----
>   drivers/i2c/i2c-core-base.c                   |  6 +-
>   drivers/i2c/i2c-core.h                        |  4 +-
>   drivers/of/irq.c                              | 39 +++++++-
>   drivers/of/property.c                         |  8 +-
>   drivers/platform/chrome/cros_ec.c             | 48 ++++++++--
>   drivers/platform/chrome/cros_ec_lpc.c         | 40 +++++++--
>   drivers/platform/chrome/cros_ec_spi.c         | 15 ++--
>   drivers/platform/chrome/cros_ec_uart.c        | 14 ++-
>   include/linux/acpi.h                          | 25 +++---
>   include/linux/fwnode.h                        |  8 +-
>   include/linux/ioport.h                        | 20 +++--
>   include/linux/of_irq.h                        | 41 +++++----
>   include/linux/platform_data/cros_ec_proto.h   |  4 +-
>   include/linux/platform_device.h               |  3 +
>   include/linux/property.h                      |  2 +
>   36 files changed, 350 insertions(+), 172 deletions(-)
> 

Re: (subset) [PATCH v4 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it

[Bjorn Andersson]

On Tue, 02 Jan 2024 14:07:24 -0700, Mark Hasemeyer wrote:
> Currently the cros_ec driver assumes that its associated interrupt is
> wake capable. This is an incorrect assumption as some Chromebooks use a
> separate wake pin, while others overload the interrupt for wake and IO.
> This patch train updates the driver to query the underlying ACPI/DT data
> to determine whether or not the IRQ should be enabled for wake.
> 
> Both the device tree and ACPI systems have methods for reporting IRQ
> wake capability. In device tree based systems, a node can advertise
> itself as a 'wakeup-source'. In ACPI based systems, GpioInt and
> Interrupt resource descriptors can use the 'SharedAndWake' or
> 'ExclusiveAndWake' share types.
> 
> [...]

Applied, thanks!

[14/24] arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source
        commit: f172a341ec1f66bac2866720931594e81f02ad4d
[15/24] arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source
        commit: a4b28b9ecc99673da875e214b1a06f1e0f0a24fa
[16/24] arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source
        commit: a7baa25bfbfdcd4e76414f29ab43317ded8d3e6e

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>