* [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board
[not found] <CGME20231031095014epcas2p2814fa2bb5f940ccb0d0951667df34f98@epcas2p2.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
[not found] ` <CGME20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9@epcas2p3.samsung.com>
` (10 more replies)
0 siblings, 11 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
ExynosAutov920[1] is ARMv8-based automotive-oriented SoC.
This SoC is the next generation of exynosautov9 and AE(Automotive Enhanced)
IPs are used for safety.
This patchset is the minimal set to ExynosAutov920 SoC and SADK board.
Currently, ramdisk console is available and Clock, UFS, and USI will be
added after this patchset.
[1] : https://semiconductor.samsung.com/processor/automotive-processor/exynos-auto-v920/
Jaewon Kim (10):
dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg
dt-bindings: soc: samsung: usi: add exynosautov920-usi compatible
dt-bindings: serial: samsung: add exynosautov920-uart compatible
dt-bindings: pwm: samsung: add exynosautov9 compatible
dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding
dt-bindings: arm: samsung: Document exynosautov920 SADK board binding
soc: samsung: exynos-chipid: add exynosautov920 SoC support
pinctrl: samsung: add exynosautv920 pinctrl
arm64: dts: exynos: add initial support for exynosautov920 SoC
arm64: dts: exynos: add minimal support for exynosautov920 sadk board
.../bindings/arm/samsung/samsung-boards.yaml | 6 +
.../samsung,pinctrl-wakeup-interrupt.yaml | 2 +
.../bindings/pinctrl/samsung,pinctrl.yaml | 1 +
.../devicetree/bindings/pwm/pwm-samsung.yaml | 1 +
.../bindings/serial/samsung_uart.yaml | 4 +-
.../bindings/soc/samsung/exynos-usi.yaml | 4 +-
.../soc/samsung/samsung,exynos-sysreg.yaml | 7 +
arch/arm64/boot/dts/exynos/Makefile | 3 +-
.../dts/exynos/exynosautov920-pinctrl.dtsi | 1266 +++++++++++++++++
.../boot/dts/exynos/exynosautov920-sadk.dts | 88 ++
.../arm64/boot/dts/exynos/exynosautov920.dtsi | 318 +++++
.../pinctrl/samsung/pinctrl-exynos-arm64.c | 131 ++
drivers/pinctrl/samsung/pinctrl-exynos.c | 99 +-
drivers/pinctrl/samsung/pinctrl-exynos.h | 27 +
drivers/pinctrl/samsung/pinctrl-samsung.c | 5 +
drivers/pinctrl/samsung/pinctrl-samsung.h | 13 +
drivers/soc/samsung/exynos-chipid.c | 1 +
17 files changed, 1966 insertions(+), 10 deletions(-)
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920.dtsi
--
2.42.0
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg
[not found] ` <CGME20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
2023-11-08 7:41 ` Krzysztof Kozlowski
0 siblings, 1 reply; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add compatible for ExynosAutov920 sysreg controllers.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
.../bindings/soc/samsung/samsung,exynos-sysreg.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
index 163e912e9cad..aa2a29ec6072 100644
--- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
@@ -35,6 +35,7 @@ properties:
- samsung,exynos5433-sysreg
- samsung,exynos850-sysreg
- samsung,exynosautov9-sysreg
+ - samsung,exynosautov920-sysreg
- const: syscon
deprecated: true
- items:
@@ -50,6 +51,12 @@ properties:
- samsung,exynosautov9-peric1-sysreg
- const: samsung,exynosautov9-sysreg
- const: syscon
+ - items:
+ - enum:
+ - samsung,exynosautov920-peric0-sysreg
+ - samsung,exynosautov920-peric1-sysreg
+ - const: samsung,exynosautov920-sysreg
+ - const: syscon
reg:
maxItems: 1
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 02/10] dt-bindings: soc: samsung: usi: add exynosautov920-usi compatible
[not found] ` <CGME20231031095016epcas2p341141f6354ee083be8d95d615c7a63dd@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add samsung,exynosautov920-usi dedicated compatible for representing USI
of ExynosAutoV920 SoC.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
index a6836904a4f8..70735d188a2e 100644
--- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
@@ -24,7 +24,9 @@ properties:
compatible:
oneOf:
- items:
- - const: samsung,exynosautov9-usi
+ - enum:
+ - samsung,exynosautov9-usi
+ - samsung,exynosautov920-usi
- const: samsung,exynos850-usi
- enum:
- samsung,exynos850-usi
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 03/10] dt-bindings: serial: samsung: add exynosautov920-uart compatible
[not found] ` <CGME20231031095016epcas2p4d975f6a3647d24da606ef168c2b234cf@epcas2p4.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add samsung,exynosautov9-uart dedicated compatible for representing
uart of ExynosAutoV920 SoC.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
Documentation/devicetree/bindings/serial/samsung_uart.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml
index 8bd88d5cbb11..3e88722d0793 100644
--- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml
+++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml
@@ -19,7 +19,9 @@ properties:
compatible:
oneOf:
- items:
- - const: samsung,exynosautov9-uart
+ - enum:
+ - samsung,exynosautov9-uart
+ - samsung,exynosautov920-uart
- const: samsung,exynos850-uart
- enum:
- apple,s5l-uart
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible
[not found] ` <CGME20231031095017epcas2p306a504619cbaf1fc260f6c46f8b75dd8@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
2023-11-09 6:28 ` Uwe Kleine-König
0 siblings, 1 reply; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add samsung,exynosautov920-pwm compatible string to binding document.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
index 2162f661ed5a..b6beca2ae81e 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
@@ -30,6 +30,7 @@ properties:
- items:
- enum:
- samsung,exynosautov9-pwm
+ - samsung,exynosautov920-pwm
- const: samsung,exynos4210-pwm
reg:
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 05/10] dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding
[not found] ` <CGME20231031095018epcas2p2e73b59954e76b14c928b7cb94bc3ac60@epcas2p2.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add compatible string for exynosautov920 pin controller.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
.../bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 2 ++
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 +
2 files changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml
index 1de91a51234d..e508499cc1f0 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml
@@ -37,6 +37,7 @@ properties:
- samsung,exynos7-wakeup-eint
- samsung,exynos850-wakeup-eint
- samsung,exynosautov9-wakeup-eint
+ - samsung,exynosautov920-wakeup-eint
interrupts:
description:
@@ -99,6 +100,7 @@ allOf:
enum:
- samsung,exynos850-wakeup-eint
- samsung,exynosautov9-wakeup-eint
+ - samsung,exynosautov920-wakeup-eint
then:
properties:
interrupts: false
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml
index 26614621774a..c2e6ff290df3 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml
@@ -53,6 +53,7 @@ properties:
- samsung,exynos7885-pinctrl
- samsung,exynos850-pinctrl
- samsung,exynosautov9-pinctrl
+ - samsung,exynosautov920-pinctrl
- tesla,fsd-pinctrl
interrupts:
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 06/10] dt-bindings: arm: samsung: Document exynosautov920 SADK board binding
[not found] ` <CGME20231031095019epcas2p245cd178dad2d97ccb974a6ba44820a2a@epcas2p2.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add binding for the ExynosAutov920 SADK(Samsung Automotive Development Kit)
board.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index e3ffd8159ab6..01dcbd8aa703 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -230,6 +230,12 @@ properties:
- samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK
- const: samsung,exynosautov9
+ - description: Exynos Auto v920 based boards
+ items:
+ - enum:
+ - samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK
+ - const: samsung,exynosautov920
+
required:
- compatible
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 07/10] soc: samsung: exynos-chipid: add exynosautov920 SoC support
[not found] ` <CGME20231031095020epcas2p1b72264a38832dc2fcb9df8e6b968770f@epcas2p1.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Add EXYNOSAUTOV920 information to soc_ids tables. This SoC product id
is "0x0A920000".
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
drivers/soc/samsung/exynos-chipid.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c
index 7ba45c4aff97..3ee554595e49 100644
--- a/drivers/soc/samsung/exynos-chipid.c
+++ b/drivers/soc/samsung/exynos-chipid.c
@@ -59,6 +59,7 @@ static const struct exynos_soc_id {
{ "EXYNOS7885", 0xE7885000 },
{ "EXYNOS850", 0xE3830000 },
{ "EXYNOSAUTOV9", 0xAAA80000 },
+ { "EXYNOSAUTOV920", 0x0A920000 },
};
static const char *product_id_to_soc_id(unsigned int product_id)
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 08/10] pinctrl: samsung: add exynosautv920 pinctrl
[not found] ` <CGME20231031095020epcas2p36f320f3609064b3c906449a2ac517f43@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
ExynosAutov920 GPIO has a different register structure.
In the existing Exynos series, EINT control register enumerated after
a specific offset (e.g EXYNOS_GPIO_ECON_OFFSET).
However, in ExynosAutov920 SoC, the register that controls EINT belongs
to each GPIO group, and each GPIO group has 0x1000 align.
This is a structure to protect the GPIO group with S2MPU in VM environment,
and will only be applied in ExynosAuto series SoCs.
Example)
-------------------------------------------------
| original | ExynosAutov920 |
|-----------------------------------------------|
| 0x0 GPIO_CON | 0x0 GPIO_CON |
| 0x4 GPIO_DAT | 0x4 GPIO_DAT |
| 0x8 GPIO_PUD | 0x8 GPIO_PUD |
| 0xc GPIO_DRV | 0xc GPIO_DRV |
| 0x700 EINT_CON | 0x18 EINT_CON |
| 0x800 EINT_FLTCON | 0x1c EINT_FLTCON0 |
| 0x900 EINT_MASK | 0x20 EINT_FLTCON1 |
| 0xa00 EINT_PEND | 0x24 EINT_MASK |
| | 0x28 EINT_PEND |
-------------------------------------------------
Pinctrl data for ExynosAutoV920 SoC.
- GPA0,GPA1 (10): External wake up interrupt
- GPQ0 (2): SPMI (PMIC I/F)
- GPB0,GPB1,GPB2,GPB3,GPB4,GPB5,GPB6 (47): I2S Audio
- GPH0,GPH1,GPH2,GPH3,GPH4,GPH5,GPH6,GPH8 (49): PCIE, UFS, Ethernet
- GPG0,GPG1,GPG2,GPG3,GPG4,GPG5 (29): General purpose
- GPP0,GPP1,GPP2,GPP3,GPP4,GPP5,GPP6,GPP7,GPP8,GPP9,GPP10 (77): USI
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
.../pinctrl/samsung/pinctrl-exynos-arm64.c | 131 ++++++++++++++++++
drivers/pinctrl/samsung/pinctrl-exynos.c | 99 ++++++++++++-
drivers/pinctrl/samsung/pinctrl-exynos.h | 27 ++++
drivers/pinctrl/samsung/pinctrl-samsung.c | 5 +
drivers/pinctrl/samsung/pinctrl-samsung.h | 13 ++
5 files changed, 268 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
index cb965cf93705..8551b85c3e6f 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
@@ -796,3 +796,134 @@ const struct samsung_pinctrl_of_match_data fsd_of_data __initconst = {
.ctrl = fsd_pin_ctrl,
.num_ctrl = ARRAY_SIZE(fsd_pin_ctrl),
};
+
+/* pin banks of exynosautov920 pin-controller 0 (ALIVE) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks0[] = {
+ EXYNOSV920_PIN_BANK_EINTW(8, 0x0000, "gpa0", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTW(2, 0x1000, "gpa1", 0x18, 0x20, 0x24),
+ EXYNOS850_PIN_BANK_EINTN(2, 0x2000, "gpq0"),
+};
+
+/* pin banks of exynosautov920 pin-controller 1 (AUD) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks1[] = {
+ EXYNOSV920_PIN_BANK_EINTG(7, 0x0000, "gpb0", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(6, 0x1000, "gpb1", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gpb2", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x3000, "gpb3", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x4000, "gpb4", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(5, 0x5000, "gpb5", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(5, 0x6000, "gpb6", 0x18, 0x24, 0x28),
+};
+
+/* pin banks of exynosautov920 pin-controller 2 (HSI0) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks2[] = {
+ EXYNOSV920_PIN_BANK_EINTG(6, 0x0000, "gph0", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(2, 0x1000, "gph1", 0x18, 0x20, 0x24),
+};
+
+/* pin banks of exynosautov920 pin-controller 3 (HSI1) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks3[] = {
+ EXYNOSV920_PIN_BANK_EINTG(7, 0x000, "gph8", 0x18, 0x24, 0x28),
+};
+
+/* pin banks of exynosautov920 pin-controller 4 (HSI2) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks4[] = {
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gph3", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(7, 0x1000, "gph4", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gph5", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(7, 0x3000, "gph6", 0x18, 0x24, 0x28),
+};
+
+/* pin banks of exynosautov920 pin-controller 5 (HSI2UFS) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks5[] = {
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x000, "gph2", 0x18, 0x20, 0x24),
+};
+
+/* pin banks of exynosautov920 pin-controller 6 (PERIC0) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks6[] = {
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gpp0", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x1000, "gpp1", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gpp2", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(5, 0x3000, "gpg0", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x4000, "gpp3", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x5000, "gpp4", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x6000, "gpg2", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x7000, "gpg5", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(3, 0x8000, "gpg3", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(5, 0x9000, "gpg4", 0x18, 0x24, 0x28),
+};
+
+/* pin banks of exynosautov920 pin-controller 7 (PERIC1) */
+static struct samsung_pin_bank_data exynosautov920_pin_banks7[] = {
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gpp5", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(5, 0x1000, "gpp6", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x2000, "gpp10", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x3000, "gpp7", 0x18, 0x24, 0x28),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x4000, "gpp8", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x5000, "gpp11", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x6000, "gpp9", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(4, 0x7000, "gpp12", 0x18, 0x20, 0x24),
+ EXYNOSV920_PIN_BANK_EINTG(8, 0x8000, "gpg1", 0x18, 0x24, 0x28),
+};
+
+const struct samsung_pin_ctrl exynosautov920_pin_ctrl[] = {
+ {
+ /* pin-controller instance 0 ALIVE data */
+ .pin_banks = exynosautov920_pin_banks0,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks0),
+ .eint_wkup_init = exynos_eint_wkup_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 1 AUD data */
+ .pin_banks = exynosautov920_pin_banks1,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks1),
+ }, {
+ /* pin-controller instance 2 HSI0 data */
+ .pin_banks = exynosautov920_pin_banks2,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks2),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 HSI1 data */
+ .pin_banks = exynosautov920_pin_banks3,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks3),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 HSI2 data */
+ .pin_banks = exynosautov920_pin_banks4,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks4),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 HSI2UFS data */
+ .pin_banks = exynosautov920_pin_banks5,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks5),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 PERIC0 data */
+ .pin_banks = exynosautov920_pin_banks6,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks6),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 PERIC1 data */
+ .pin_banks = exynosautov920_pin_banks7,
+ .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks7),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ },
+};
+
+const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst = {
+ .ctrl = exynosautov920_pin_ctrl,
+ .num_ctrl = ARRAY_SIZE(exynosautov920_pin_ctrl),
+};
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index a8212fc126bf..c50ddbc6bfd4 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,6 +56,9 @@ static void exynos_irq_mask(struct irq_data *irqd)
unsigned int mask;
unsigned long flags;
+ if (bank->combine)
+ reg_mask = bank->mask_offset;
+
raw_spin_lock_irqsave(&bank->slock, flags);
mask = readl(bank->eint_base + reg_mask);
@@ -72,6 +75,9 @@ static void exynos_irq_ack(struct irq_data *irqd)
struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset;
+ if (bank->combine)
+ reg_pend = bank->pend_offset;
+
writel(1 << irqd->hwirq, bank->eint_base + reg_pend);
}
@@ -95,6 +101,9 @@ static void exynos_irq_unmask(struct irq_data *irqd)
if (irqd_get_trigger_type(irqd) & IRQ_TYPE_LEVEL_MASK)
exynos_irq_ack(irqd);
+ if (bank->combine)
+ reg_mask = bank->mask_offset;
+
raw_spin_lock_irqsave(&bank->slock, flags);
mask = readl(bank->eint_base + reg_mask);
@@ -221,6 +230,19 @@ static const struct exynos_irq_chip exynos_gpio_irq_chip __initconst = {
/* eint_wake_mask_value not used */
};
+static const struct exynos_irq_chip exynosautov920_gpio_irq_chip __initconst = {
+ .chip = {
+ .name = "exynosautov920_gpio_irq_chip",
+ .irq_unmask = exynos_irq_unmask,
+ .irq_mask = exynos_irq_mask,
+ .irq_ack = exynos_irq_ack,
+ .irq_set_type = exynos_irq_set_type,
+ .irq_request_resources = exynos_irq_request_resources,
+ .irq_release_resources = exynos_irq_release_resources,
+ },
+ /* eint_wake_mask_value not used */
+};
+
static int exynos_eint_irq_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -247,7 +269,10 @@ static irqreturn_t exynos_eint_gpio_irq(int irq, void *data)
unsigned int svc, group, pin;
int ret;
- svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET);
+ if (bank->combine)
+ svc = readl(bank->eint_base + EXYNOSAUTOV920_SVC_OFFSET);
+ else
+ svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET);
group = EXYNOS_SVC_GROUP(svc);
pin = svc & EXYNOS_SVC_NUM_MASK;
@@ -297,8 +322,12 @@ __init int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d)
if (bank->eint_type != EINT_TYPE_GPIO)
continue;
- bank->irq_chip = devm_kmemdup(dev, &exynos_gpio_irq_chip,
- sizeof(*bank->irq_chip), GFP_KERNEL);
+ if (bank->combine)
+ bank->irq_chip = devm_kmemdup(dev, &exynosautov920_gpio_irq_chip,
+ sizeof(*bank->irq_chip), GFP_KERNEL);
+ else
+ bank->irq_chip = devm_kmemdup(dev, &exynos_gpio_irq_chip,
+ sizeof(*bank->irq_chip), GFP_KERNEL);
if (!bank->irq_chip) {
ret = -ENOMEM;
goto err_domains;
@@ -456,6 +485,22 @@ static const struct exynos_irq_chip exynos7_wkup_irq_chip __initconst = {
.set_eint_wakeup_mask = exynos_pinctrl_set_eint_wakeup_mask,
};
+static const struct exynos_irq_chip exynosautov920_wkup_irq_chip __initconst = {
+ .chip = {
+ .name = "exynosautov920_wkup_irq_chip",
+ .irq_unmask = exynos_irq_unmask,
+ .irq_mask = exynos_irq_mask,
+ .irq_ack = exynos_irq_ack,
+ .irq_set_type = exynos_irq_set_type,
+ .irq_set_wake = exynos_wkup_irq_set_wake,
+ .irq_request_resources = exynos_irq_request_resources,
+ .irq_release_resources = exynos_irq_release_resources,
+ },
+ .eint_wake_mask_value = &eint_wake_mask_value,
+ .eint_wake_mask_reg = EXYNOS5433_EINT_WAKEUP_MASK,
+ .set_eint_wakeup_mask = exynos_pinctrl_set_eint_wakeup_mask,
+};
+
/* list of external wakeup controllers supported */
static const struct of_device_id exynos_wkup_irq_ids[] = {
{ .compatible = "samsung,s5pv210-wakeup-eint",
@@ -468,6 +513,8 @@ static const struct of_device_id exynos_wkup_irq_ids[] = {
.data = &exynos7_wkup_irq_chip },
{ .compatible = "samsung,exynosautov9-wakeup-eint",
.data = &exynos7_wkup_irq_chip },
+ { .compatible = "samsung,exynosautov920-wakeup-eint",
+ .data = &exynosautov920_wkup_irq_chip },
{ }
};
@@ -655,6 +702,20 @@ static void exynos_pinctrl_suspend_bank(
pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask);
}
+static void exynosautov920_pinctrl_suspend_bank(
+ struct samsung_pinctrl_drv_data *drvdata,
+ struct samsung_pin_bank *bank)
+{
+ struct exynos_eint_gpio_save *save = bank->soc_priv;
+ void __iomem *regs = bank->eint_base;
+
+ save->eint_con = readl(regs + bank->eint_offset);
+ save->eint_mask = readl(regs + bank->mask_offset);
+
+ pr_debug("%s: save con %#010x\n", bank->name, save->eint_con);
+ pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask);
+}
+
void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
{
struct samsung_pin_bank *bank = drvdata->pin_banks;
@@ -662,8 +723,12 @@ void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata)
int i;
for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
- if (bank->eint_type == EINT_TYPE_GPIO)
- exynos_pinctrl_suspend_bank(drvdata, bank);
+ if (bank->eint_type == EINT_TYPE_GPIO) {
+ if (bank->combine)
+ exynosautov920_pinctrl_suspend_bank(drvdata, bank);
+ else
+ exynos_pinctrl_suspend_bank(drvdata, bank);
+ }
else if (bank->eint_type == EINT_TYPE_WKUP) {
if (!irq_chip) {
irq_chip = bank->irq_chip;
@@ -704,14 +769,34 @@ static void exynos_pinctrl_resume_bank(
+ bank->eint_offset);
}
+static void exynosautov920_pinctrl_resume_bank(
+ struct samsung_pinctrl_drv_data *drvdata,
+ struct samsung_pin_bank *bank)
+{
+ struct exynos_eint_gpio_save *save = bank->soc_priv;
+ void __iomem *regs = bank->eint_base;
+
+ pr_debug("%s: con %#010x => %#010x\n", bank->name,
+ readl(regs + bank->eint_offset), save->eint_con);
+ pr_debug("%s: mask %#010x => %#010x\n", bank->name,
+ readl(regs + bank->mask_offset), save->eint_mask);
+
+ writel(save->eint_con, regs + bank->eint_offset);
+ writel(save->eint_mask, regs + bank->mask_offset);
+}
+
void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
{
struct samsung_pin_bank *bank = drvdata->pin_banks;
int i;
for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
- if (bank->eint_type == EINT_TYPE_GPIO)
- exynos_pinctrl_resume_bank(drvdata, bank);
+ if (bank->eint_type == EINT_TYPE_GPIO) {
+ if (bank->combine)
+ exynosautov920_pinctrl_resume_bank(drvdata, bank);
+ else
+ exynos_pinctrl_resume_bank(drvdata, bank);
+ }
}
static void exynos_retention_enable(struct samsung_pinctrl_drv_data *drvdata)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 7bd6d82c9f36..212225a3ed3b 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -31,6 +31,7 @@
#define EXYNOS7_WKUP_EMASK_OFFSET 0x900
#define EXYNOS7_WKUP_EPEND_OFFSET 0xA00
#define EXYNOS_SVC_OFFSET 0xB08
+#define EXYNOSAUTOV920_SVC_OFFSET 0xF008
/* helpers to access interrupt service register */
#define EXYNOS_SVC_GROUP_SHIFT 3
@@ -140,6 +141,32 @@
.name = id \
}
+#define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, offs, mask_offs, pend_offs) \
+ { \
+ .type = &exynos850_bank_type_off, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_GPIO, \
+ .eint_offset = (reg + offs), \
+ .mask_offset = (reg + mask_offs), \
+ .pend_offset = (reg + pend_offs), \
+ .combine = true, \
+ .name = id \
+ }
+
+#define EXYNOSV920_PIN_BANK_EINTW(pins, reg, id, offs, mask_offs, pend_offs) \
+ { \
+ .type = &exynos850_bank_type_alive, \
+ .pctl_offset = reg, \
+ .nr_pins = pins, \
+ .eint_type = EINT_TYPE_WKUP, \
+ .eint_offset = (reg + offs), \
+ .mask_offset = (reg + mask_offs), \
+ .pend_offset = (reg + pend_offs), \
+ .combine = true, \
+ .name = id \
+ }
+
/**
* struct exynos_weint_data: irq specific data for all the wakeup interrupts
* generated by the external wakeup interrupt controller.
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index e54847040b4a..4066a1e1aff7 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -1105,6 +1105,9 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
bank->eint_type = bdata->eint_type;
bank->eint_mask = bdata->eint_mask;
bank->eint_offset = bdata->eint_offset;
+ bank->mask_offset = bdata->mask_offset;
+ bank->pend_offset = bdata->pend_offset;
+ bank->combine = bdata->combine;
bank->name = bdata->name;
raw_spin_lock_init(&bank->slock);
@@ -1319,6 +1322,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
.data = &exynosautov9_of_data },
{ .compatible = "tesla,fsd-pinctrl",
.data = &fsd_of_data },
+ { .compatible = "samsung,exynosautov920-pinctrl",
+ .data = &exynosautov920_of_data },
#endif
#ifdef CONFIG_PINCTRL_S3C64XX
{ .compatible = "samsung,s3c64xx-pinctrl",
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 9af93e3d8d9f..8151583d4a88 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -122,6 +122,9 @@ struct samsung_pin_bank_type {
* @eint_type: type of the external interrupt supported by the bank.
* @eint_mask: bit mask of pins which support EINT function.
* @eint_offset: SoC-specific EINT register or interrupt offset of bank.
+ * @mask_offset: SoC-specific EINT mask register offset of bank.
+ * @pend_offset: SoC-specific EINT pend register offset of bank.
+ * @combine: EINT register is combined to the GPIO control register.
* @name: name to be prefixed for each pin in this pin bank.
*/
struct samsung_pin_bank_data {
@@ -133,6 +136,9 @@ struct samsung_pin_bank_data {
enum eint_type eint_type;
u32 eint_mask;
u32 eint_offset;
+ u32 mask_offset;
+ u32 pend_offset;
+ bool combine;
const char *name;
};
@@ -147,6 +153,9 @@ struct samsung_pin_bank_data {
* @eint_type: type of the external interrupt supported by the bank.
* @eint_mask: bit mask of pins which support EINT function.
* @eint_offset: SoC-specific EINT register or interrupt offset of bank.
+ * @mask_offset: SoC-specific EINT mask register offset of bank.
+ * @pend_offset: SoC-specific EINT pend register offset of bank.
+ * @combine: EINT register is combined to the GPIO control register.
* @name: name to be prefixed for each pin in this pin bank.
* @pin_base: starting pin number of the bank.
* @soc_priv: per-bank private data for SoC-specific code.
@@ -169,6 +178,9 @@ struct samsung_pin_bank {
enum eint_type eint_type;
u32 eint_mask;
u32 eint_offset;
+ u32 mask_offset;
+ u32 pend_offset;
+ bool combine;
const char *name;
u32 pin_base;
@@ -350,6 +362,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;
+extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data;
extern const struct samsung_pinctrl_of_match_data fsd_of_data;
extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data;
extern const struct samsung_pinctrl_of_match_data s3c2412_of_data;
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC
[not found] ` <CGME20231031095021epcas2p352c4ace8652d7bf1f74a9b32ab61a913@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
2023-11-08 7:58 ` Krzysztof Kozlowski
0 siblings, 1 reply; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
Samsung ExynosAutov920 is ARMv8-based automotive-oriented SoC.
It has AE(Automotive Enhanced) IPs for safety.
* Cortex-A78AE 10-cores
* GIC-600AE
This is minimal support for ExynosAutov920 SoC.
* Enumerate all pinctrl nodes
* Enable Chip-Id
* Serial0 for console
* PWM
Since the clock driver is not yet implemented, it is supported as
fixed-clock.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
.../dts/exynos/exynosautov920-pinctrl.dtsi | 1266 +++++++++++++++++
.../arm64/boot/dts/exynos/exynosautov920.dtsi | 318 +++++
2 files changed, 1584 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920.dtsi
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
new file mode 100644
index 000000000000..63b958b96c48
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
@@ -0,0 +1,1266 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2023 Samsung Electronics Co., Ltd.
+ *
+ * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
+ * device tree nodes in this file.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "exynos-pinctrl.h"
+
+&pinctrl_alive {
+ gpa0: gpa0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gpa1: gpa1-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gpq0: gpq0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&pinctrl_aud {
+ gpb0: gpb0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb1: gpb1-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb2: gpb2-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb3: gpb3-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb4: gpb4-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb5: gpb5-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb6: gpb6-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&pinctrl_hsi0 {
+ gph0: gph0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gph1: gph1-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&pinctrl_hsi1 {
+ gph8: gph8-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&pinctrl_hsi2 {
+ gph3: gph3-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gph4: gph4-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gph5: gph5-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gph6: gph6-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&pinctrl_hsi2ufs {
+ gph2: gph2-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ufs_rst_n: ufs-rst-n-pins {
+ samsung,pins = "gph2-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
+ };
+
+ ufs_refclk_out: ufs-refclk-out-pins {
+ samsung,pins = "gph2-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ ufs_rst_n_1: ufs-rst-n-1-pins {
+ samsung,pins = "gph2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
+ };
+
+ ufs_refclk_out_1: ufs-refclk-out-1-pins {
+ samsung,pins = "gph2-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
+ };
+};
+
+&pinctrl_peric0 {
+ gpp0: gpp0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp1: gpp1-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp2: gpp2-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp3: gpp3-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp4: gpp4-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg0: gpg0-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg2: gpg2-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg3: gpg3-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg4: gpg4-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg5: gpg5-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ /* UART PERIC0_USI00 */
+ uart0_bus: uart0-bus-pins {
+ samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart0_bus_dual: uart0-bus-dual-pins {
+ samsung,pins = "gpp0-0", "gpp0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI01 */
+ uart1_bus: uart1-bus-pins {
+ samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart1_bus_dual: uart1-bus-dual-pins {
+ samsung,pins = "gpp0-4", "gpp0-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI02 */
+ uart2_bus: uart2-bus-pins {
+ samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart2_bus_dual: uart2-bus-dual-pins {
+ samsung,pins = "gpp1-0", "gpp1-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI03 */
+ uart3_bus: uart3-bus-pins {
+ samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart3_bus_dual: uart3-bus-dual-pins {
+ samsung,pins = "gpp1-4", "gpp1-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI04 */
+ uart4_bus: uart4-bus-pins {
+ samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart4_bus_dual: uart4-bus-dual-pins {
+ samsung,pins = "gpp2-0", "gpp2-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI05 */
+ uart5_bus: uart5-bus-pins {
+ samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart5_bus_dual: uart5-bus-dual-pins {
+ samsung,pins = "gpp2-4", "gpp2-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI06 */
+ uart6_bus: uart6-bus-pins {
+ samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart6_bus_dual: uart6-bus-dual-pins {
+ samsung,pins = "gpp3-0", "gpp3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI07 */
+ uart7_bus: uart7-bus-pins {
+ samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart7_bus_dual: uart7-bus-dual-pins {
+ samsung,pins = "gpp3-4", "gpp3-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC0_USI08 */
+ uart8_bus: uart8-bus-pins {
+ samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart8_bus_dual: uart8-bus-dual-pins {
+ samsung,pins = "gpp4-0", "gpp4-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI00 */
+ hsi2c0_bus: hsi2c0-bus-pins {
+ samsung,pins = "gpp0-0", "gpp0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI00_I2C */
+ hsi2c1_bus: hsi2c1-bus-pins {
+ samsung,pins = "gpp0-2", "gpp0-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI01 */
+ hsi2c2_bus: hsi2c2-bus-pins {
+ samsung,pins = "gpp0-4", "gpp0-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI01_I2C */
+ hsi2c3_bus: hsi2c3-bus-pins {
+ samsung,pins = "gpp0-6", "gpp0-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI02 */
+ hsi2c4_bus: hsi2c4-bus-pins {
+ samsung,pins = "gpp1-0", "gpp1-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI02_I2C */
+ hsi2c5_bus: hsi2c5-bus-pins {
+ samsung,pins = "gpp1-2", "gpp1-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI03 */
+ hsi2c6_bus: hsi2c6-bus-pins {
+ samsung,pins = "gpp1-4", "gpp1-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI03_I2C */
+ hsi2c7_bus: hsi2c7-bus-pins {
+ samsung,pins = "gpp1-6", "gpp1-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI04 */
+ hsi2c8_bus: hsi2c8-bus-pins {
+ samsung,pins = "gpp2-0", "gpp2-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI04_I2C */
+ hsi2c9_bus: hsi2c9-bus-pins {
+ samsung,pins = "gpp2-2", "gpp2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI05 */
+ hsi2c10_bus: hsi2c10-bus-pins {
+ samsung,pins = "gpp2-4", "gpp2-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI05_I2C */
+ hsi2c11_bus: hsi2c11-bus-pins {
+ samsung,pins = "gpp2-6", "gpp2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI06 */
+ hsi2c12_bus: hsi2c12-bus-pins {
+ samsung,pins = "gpp3-0", "gpp3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI06_I2C */
+ hsi2c13_bus: hsi2c13-bus-pins {
+ samsung,pins = "gpp3-2", "gpp3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI07 */
+ hsi2c14_bus: hsi2c14-bus-pins {
+ samsung,pins = "gpp3-4", "gpp3-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI07_I2C */
+ hsi2c15_bus: hsi2c15-bus-pins {
+ samsung,pins = "gpp3-6", "gpp3-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI08 */
+ hsi2c16_bus: hsi2c16-bus-pins {
+ samsung,pins = "gpp4-0", "gpp4-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC0 USI08_I2C */
+ hsi2c17_bus: hsi2c17-bus-pins {
+ samsung,pins = "gpp4-2", "gpp4-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI00 */
+ spi0_bus: spi0-bus-pins {
+ samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi0_cs: spi0-cs-pins {
+ samsung,pins = "gpp0-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi0_cs_func: spi0-cs-func-pins {
+ samsung,pins = "gpp0-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI01 */
+ spi1_bus: spi1-bus-pins {
+ samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi1_cs: spi1-cs-pins {
+ samsung,pins = "gpp0-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi1_cs_func: spi1-cs-func-pins {
+ samsung,pins = "gpp0-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI02 */
+ spi2_bus: spi2-bus-pins {
+ samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi2_cs: spi2-cs-pins {
+ samsung,pins = "gpp1-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi2_cs_func: spi2-cs-func-pins {
+ samsung,pins = "gpp1-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI03 */
+ spi3_bus: spi3-bus-pins {
+ samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi3_cs: spi3-cs-pins {
+ samsung,pins = "gpp1-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi3_cs_func: spi3-cs-func-pins {
+ samsung,pins = "gpp1-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI04 */
+ spi4_bus: spi4-bus-pins {
+ samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi4_cs: spi4-cs-pins {
+ samsung,pins = "gpp2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi4_cs_func: spi4-cs-func-pins {
+ samsung,pins = "gpp2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI05 */
+ spi5_bus: spi5-bus-pins {
+ samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi5_cs: spi5-cs-pins {
+ samsung,pins = "gpp2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi5_cs_func: spi5-cs-func-pins {
+ samsung,pins = "gpp2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI06 */
+ spi6_bus: spi6-bus-pins {
+ samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi6_cs: spi6-cs-pins {
+ samsung,pins = "gpp3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi6_cs_func: spi6-cs-func-pins {
+ samsung,pins = "gpp3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI07 */
+ spi7_bus: spi7-bus-pins {
+ samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi7_cs: spi7-cs-pins {
+ samsung,pins = "gpp3-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi7_cs_func: spi7-cs-func-pins {
+ samsung,pins = "gpp3-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC0 USI08 */
+ spi8_bus: spi8-bus-pins {
+ samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi8_cs: spi8-cs-pins {
+ samsung,pins = "gpp4-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi8_cs_func: spi8-cs-func-pins {
+ samsung,pins = "gpp4-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I3C PERIC0 */
+ i3c0_bus: i3c0-bus-pins {
+ samsung,pins = "gpp2-6", "gpp2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c1_bus: i3c1-bus-pins {
+ samsung,pins = "gpp3-2", "gpp3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c2_bus: i3c2-bus-pins {
+ samsung,pins = "gpp3-6", "gpp3-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c3_bus: i3c3-bus-pins {
+ samsung,pins = "gpp4-2", "gpp4-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* PWM PERIC0 */
+ pwm_tout0: pwm-tout0-pins {
+ samsung,pins = "gpg0-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ pwm_tout1: pwm-tout1-pins {
+ samsung,pins = "gpg0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ pwm_tout2: pwm-tout2-pins {
+ samsung,pins = "gpg0-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ pwm_tout3: pwm-tout3-pins {
+ samsung,pins = "gpg0-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+};
+
+&pinctrl_peric1 {
+ gpp5: gpp5-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp6: gpp6-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp7: gpp7-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp8: gpp8-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp9: gpp9-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp10: gpp10-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp11: gpp11-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpp12: gpp12-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpg1: gpg1-gpio-bank {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ /* UART PERIC1 USI09 */
+ uart9_bus: uart9-bus-pins {
+ samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart9_bus_dual: uart9-bus-dual-pins {
+ samsung,pins = "gpp5-0", "gpp5-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI10 */
+ uart10_bus: uart10-bus-pins {
+ samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6", "gpp5-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart10_bus_dual: uart10-bus-dual-pins {
+ samsung,pins = "gpp5-4", "gpp5-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI11 */
+ uart11_bus: uart11-bus-pins {
+ samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2", "gpp10-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart11_bus_dual: uart11-bus-dual-pins {
+ samsung,pins = "gpp10-0", "gpp10-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1_USI12 */
+ uart12_bus: uart12-bus-pins {
+ samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2", "gpp7-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart12_bus_dual: uart12-bus-dual-pins {
+ samsung,pins = "gpp7-0", "gpp7-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1_USI13 */
+ uart13_bus: uart13-bus-pins {
+ samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6", "gpp7-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart13_bus_dual: uart13-bus-dual-pins {
+ samsung,pins = "gpp7-4", "gpp7-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI14 */
+ uart14_bus: uart14-bus-pins {
+ samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2", "gpp8-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart14_bus_dual: uart14-bus-dual-pins {
+ samsung,pins = "gpp8-0", "gpp8-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI15 */
+ uart15_bus: uart15-bus-pins {
+ samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2", "gpp11-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart15_bus_dual: uart15-bus-dual-pins {
+ samsung,pins = "gpp11-0", "gpp11-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI16 */
+ uart16_bus: uart16-bus-pins {
+ samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2", "gpp9-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart16_bus_dual: uart16-bus-dual-pins {
+ samsung,pins = "gpp9-0", "gpp9-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* UART PERIC1 USI17 */
+ uart17_bus: uart17-bus-pins {
+ samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2", "gpp12-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart17_bus_dual: uart17-bus-dual-pins {
+ samsung,pins = "gpp12-0", "gpp12-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI09 */
+ hsi2c18_bus: hsi2c18-bus-pins {
+ samsung,pins = "gpp5-0", "gpp5-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI09_I2C */
+ hsi2c19_bus: hsi2c19-bus-pins {
+ samsung,pins = "gpp5-2", "gpp5-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI10 */
+ hsi2c20_bus: hsi2c20-bus-pins {
+ samsung,pins = "gpp5-4", "gpp5-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI10_I2C */
+ hsi2c21_bus: hsi2c21-bus-pins {
+ samsung,pins = "gpp5-6", "gpp5-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI11 */
+ hsi2c22_bus: hsi2c22-bus-pins {
+ samsung,pins = "gpp10-0", "gpp10-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI11_I2C */
+ hsi2c23_bus: hsi2c23-bus-pins {
+ samsung,pins = "gpp10-2", "gpp10-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI12 */
+ hsi2c24_bus: hsi2c24-bus-pins {
+ samsung,pins = "gpp7-0", "gpp7-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI12_I2C */
+ hsi2c25_bus: hsi2c25-bus-pins {
+ samsung,pins = "gpp7-2", "gpp7-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI13 */
+ hsi2c26_bus: hsi2c26-bus-pins {
+ samsung,pins = "gpp7-4", "gpp7-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI13_I2C */
+ hsi2c27_bus: hsi2c27-bus-pins {
+ samsung,pins = "gpp7-6", "gpp7-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI14 */
+ hsi2c28_bus: hsi2c28-bus-pins {
+ samsung,pins = "gpp8-0", "gpp8-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI14_I2C */
+ hsi2c29_bus: hsi2c29-bus-pins {
+ samsung,pins = "gpp8-2", "gpp8-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI15 */
+ hsi2c30_bus: hsi2c30-bus-pins {
+ samsung,pins = "gpp11-0", "gpp11-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI15_I2C */
+ hsi2c31_bus: hsi2c31-bus-pins {
+ samsung,pins = "gpp11-2", "gpp11-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI16 */
+ hsi2c32_bus: hsi2c32-bus-pins {
+ samsung,pins = "gpp9-0", "gpp9-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI16_I2C */
+ hsi2c33_bus: hsi2c33-bus-pins {
+ samsung,pins = "gpp9-2", "gpp9-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI17 */
+ hsi2c34_bus: hsi2c34-bus-pins {
+ samsung,pins = "gpp12-0", "gpp12-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I2C PERIC1 USI17_I2C */
+ hsi2c35_bus: hsi2c35-bus-pins {
+ samsung,pins = "gpp12-2", "gpp12-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI09 */
+ spi9_bus: spi9-bus-pins {
+ samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi9_cs: spi9-cs-pins {
+ samsung,pins = "gpp5-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi9_cs_func: spi9-cs-func-pins {
+ samsung,pins = "gpp5-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI10 */
+ spi10_bus: spi10-bus-pins {
+ samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi10_cs: spi10-cs-pins {
+ samsung,pins = "gpp5-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi10_cs_func: spi10-cs-func-pins {
+ samsung,pins = "gpp5-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI11 */
+ spi11_bus: spi11-bus-pins {
+ samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi11_cs: spi11-cs-pins {
+ samsung,pins = "gpp10-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi11_cs_func: spi11-cs-func-pins {
+ samsung,pins = "gpp10-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI12 */
+ spi12_bus: spi12-bus-pins {
+ samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi12_cs: spi12-cs-pins {
+ samsung,pins = "gpp7-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi12_cs_func: spi12-cs-func-pins {
+ samsung,pins = "gpp7-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI13 */
+ spi13_bus: spi13-bus-pins {
+ samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi13_cs: spi13-cs-pins {
+ samsung,pins = "gpp7-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi13_cs_func: spi13-cs-func-pins {
+ samsung,pins = "gpp7-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI14 */
+ spi14_bus: spi14-bus-pins {
+ samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi14_cs: spi14-cs-pins {
+ samsung,pins = "gpp8-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi14_cs_func: spi14-cs-func-pins {
+ samsung,pins = "gpp8-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI15 */
+ spi15_bus: spi15-bus-pins {
+ samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi15_cs: spi15-cs-pins {
+ samsung,pins = "gpp11-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi15_cs_func: spi15-cs-func-pins {
+ samsung,pins = "gpp11-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI16 */
+ spi16_bus: spi16-bus-pins {
+ samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi16_cs: spi16-cs-pins {
+ samsung,pins = "gpp9-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi16_cs_func: spi16-cs-func-pins {
+ samsung,pins = "gpp9-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* SPI PERIC1 USI17 */
+ spi17_bus: spi17-bus-pins {
+ samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi17_cs: spi17-cs-pins {
+ samsung,pins = "gpp12-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ spi17_cs_func: spi17-cs-func-pins {
+ samsung,pins = "gpp12-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ /* I3C PERIC1 */
+ i3c4_bus: i3c4-bus-pins {
+ samsung,pins = "gpp7-2", "gpp7-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c5_bus: i3c5-bus-pins {
+ samsung,pins = "gpp7-6", "gpp7-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c6_bus: i3c6-bus-pins {
+ samsung,pins = "gpp8-2", "gpp8-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ i3c7_bus: i3c7-bus-pins {
+ samsung,pins = "gpp11-2", "gpp11-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
new file mode 100644
index 000000000000..ec704fec323f
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -0,0 +1,318 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAutov920 SoC device tree source
+ *
+ * Copyright (c) 2023 Samsung Electronics Co., Ltd.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/samsung,exynos-usi.h>
+
+/ {
+ compatible = "samsung,exynosautov920";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ aliases {
+ pinctrl0 = &pinctrl_alive;
+ pinctrl1 = &pinctrl_aud;
+ pinctrl2 = &pinctrl_hsi0;
+ pinctrl3 = &pinctrl_hsi1;
+ pinctrl4 = &pinctrl_hsi2;
+ pinctrl5 = &pinctrl_hsi2ufs;
+ pinctrl6 = &pinctrl_peric0;
+ pinctrl7 = &pinctrl_peric1;
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a78-pmu";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ chosen: chosen {
+ bootargs = "console=ttySAC0,115200n8 loglevel=3 printk.devkmsg=on log_buf_len=512K";
+ linux,initrd-start = <0x85000000>;
+ linux,initrd-end = <0x8AFFFFFF>;
+ };
+
+ cpus: cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster2 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x300>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@10000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x10000>;
+ enable-method = "psci";
+ };
+
+ cpu5: cpu@10100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x10100>;
+ enable-method = "psci";
+ };
+
+ cpu6: cpu@10200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x10200>;
+ enable-method = "psci";
+ };
+
+ cpu7: cpu@10300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x10300>;
+ enable-method = "psci";
+ };
+
+ cpu8: cpu@20000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x20000>;
+ enable-method = "psci";
+ };
+
+ cpu9: cpu@20100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a78ae";
+ reg = <0x0 0x20100>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ fixed-rate-clocks {
+ xtcxo: clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "oscclk";
+ };
+
+ /*
+ * Keep the stub clock for serial driver, until proper clock
+ * driver is implemented.
+ */
+ usi_clock: usi-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "usi";
+ };
+ };
+
+ soc: soc@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x0 0x20000000>;
+
+ chipid@10000000 {
+ compatible = "samsung,exynos850-chipid";
+ reg = <0x10000000 0x24>;
+ };
+
+ gic: interrupt-controller@10400000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x10400000 0x10000>,
+ <0x10460000 0x140000>;
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_alive: pinctrl@11850000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x11850000 0x10000>;
+
+ wakeup-interrupt-controller {
+ compatible = "samsung,exynosautov920-wakeup-eint";
+ };
+ };
+
+ pinctrl_aud: pinctrl@1a460000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x1a460000 0x10000>;
+ };
+
+ pinctrl_hsi0: pinctrl@16040000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x16040000 0x10000>;
+ interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_hsi1: pinctrl@16450000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x16450000 0x10000>;
+ interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_hsi2: pinctrl@16c10000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x16c10000 0x10000>;
+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_hsi2ufs: pinctrl@16d20000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x16d20000 0x10000>;
+ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_peric0: pinctrl@10830000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x10830000 0x10000>;
+ interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_peric1: pinctrl@10c30000 {
+ compatible = "samsung,exynosautov920-pinctrl";
+ reg = <0x10c30000 0x10000>;
+ interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu_system_controller: system-controller@11860000 {
+ compatible = "samsung,exynos7-pmu", "syscon";
+ reg = <0x11860000 0x10000>;
+ };
+
+ pwm: pwm@109b0000 {
+ compatible = "samsung,exynosautov920-pwm",
+ "samsung,exynos4210-pwm";
+ reg = <0x109b0000 0x100>;
+ samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+ #pwm-cells = <3>;
+ clocks = <&xtcxo>;
+ clock-names = "timers";
+ status = "disabled";
+ };
+
+ syscon_peric0: syscon@102820000 {
+ compatible = "samsung,exynosautov920-peric0-sysreg",
+ "samsung,exynosautov920-sysreg", "syscon";
+ reg = <0x10820000 0x2000>;
+ };
+
+ syscon_peric1: syscon@10c21000 {
+ compatible = "samsung,exynosautov920-peric1-sysreg",
+ "samsung,exynosautov920-sysreg", "syscon";
+ reg = <0x10c21000 0x2000>;
+ };
+
+ usi_0: usi@108800c0 {
+ compatible = "samsung,exynosautov920-usi",
+ "samsung,exynos850-usi";
+ reg = <0x108800c0 0x20>;
+ samsung,sysreg = <&syscon_peric0 0x1000>;
+ samsung,mode = <USI_V2_UART>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&usi_clock>, <&usi_clock>;
+ clock-names = "pclk", "ipclk";
+ status = "disabled";
+
+ serial_0: serial@10880000 {
+ compatible = "samsung,exynosautov920-uart",
+ "samsung,exynos850-uart";
+ reg = <0x10880000 0xc0>;
+ interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_bus>;
+ clocks = <&usi_clock>, <&usi_clock>;
+ clock-names = "uart", "clk_uart_baud0";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
+ };
+ };
+};
+
+#include "exynosautov920-pinctrl.dtsi"
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 10/10] arm64: dts: exynos: add minimal support for exynosautov920 sadk board
[not found] ` <CGME20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd@epcas2p3.samsung.com>
@ 2023-10-31 9:47 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-10-31 9:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial, Jaewon Kim
ExynosAutov920 SADK is ExynosAutov920 SoC based SADK(Samsung Automotive
Development Kit) board. It has 16GB(8GB + 8GB) LPDDR5 RAM and 256GB
(128GB + 128GB) UFS.
This is minimal support board device-tree.
* Serial console
* GPIO Key
* PWM FAN
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
arch/arm64/boot/dts/exynos/Makefile | 3 +-
.../boot/dts/exynos/exynosautov920-sadk.dts | 88 +++++++++++++++++++
2 files changed, 90 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
index 6e4ba69268e5..da06e1a9456c 100644
--- a/arch/arm64/boot/dts/exynos/Makefile
+++ b/arch/arm64/boot/dts/exynos/Makefile
@@ -5,4 +5,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
exynos7-espresso.dtb \
exynos7885-jackpotlte.dtb \
exynos850-e850-96.dtb \
- exynosautov9-sadk.dtb
+ exynosautov9-sadk.dtb \
+ exynosautov920-sadk.dtb
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
new file mode 100644
index 000000000000..e250b5594b58
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAutov920 SADK board device tree source
+ *
+ * Copyright (c) 2023 Samsung Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include "exynosautov920.dtsi"
+#include "exynos-pinctrl.h"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Samsung ExynosAutov920 SADK board";
+ compatible = "samsung,exynosautov920-sadk", "samsung,exynosautov920";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &serial_0;
+ };
+
+ chosen {
+ stdout-path = &serial_0;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x70000000>,
+ <0x8 0x80000000 0x1 0xfba00000>,
+ <0xa 0x00000000 0x2 0x00000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_wakeup &key_back>;
+
+ key-wakeup {
+ label = "KEY_WAKEUP";
+ linux,code = <KEY_WAKEUP>;
+ gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+
+ key-back {
+ label = "KEY_BACK";
+ linux,code = <KEY_BACK>;
+ gpios = <&gpp6 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&pinctrl_alive {
+ key_wakeup: key-wakeup-pins {
+ samsung,pins = "gpa0-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
+ };
+};
+
+&pinctrl_peric1 {
+ key_back: key-back-pins {
+ samsung,pins = "gpp6-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_tout0>;
+ status = "okay";
+};
+
+&serial_0 {
+ status = "okay";
+};
+
+&usi_0 {
+ samsung,clkreq-on; /* needed for UART mode */
+ status = "okay";
+};
+
+&xtcxo {
+ clock-frequency = <38400000>;
+};
--
2.42.0
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg
2023-10-31 9:47 ` [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg Jaewon Kim
@ 2023-11-08 7:41 ` Krzysztof Kozlowski
2023-11-09 2:24 ` Jaewon Kim
0 siblings, 1 reply; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-08 7:41 UTC (permalink / raw)
To: Jaewon Kim, Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial
On 31/10/2023 10:47, Jaewon Kim wrote:
> Add compatible for ExynosAutov920 sysreg controllers.
>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> ---
> .../bindings/soc/samsung/samsung,exynos-sysreg.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
> index 163e912e9cad..aa2a29ec6072 100644
> --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
> @@ -35,6 +35,7 @@ properties:
> - samsung,exynos5433-sysreg
> - samsung,exynos850-sysreg
> - samsung,exynosautov9-sysreg
> + - samsung,exynosautov920-sysreg
New devices should not be deprecated by default. Drop.
> - const: syscon
> deprecated: true
> - items:
> @@ -50,6 +51,12 @@ properties:
> - samsung,exynosautov9-peric1-sysreg
> - const: samsung,exynosautov9-sysreg
> - const: syscon
> + - items:
> + - enum:
> + - samsung,exynosautov920-peric0-sysreg
> + - samsung,exynosautov920-peric1-sysreg
> + - const: samsung,exynosautov920-sysreg
> + - const: syscon
>
> reg:
> maxItems: 1
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC
2023-10-31 9:47 ` [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC Jaewon Kim
@ 2023-11-08 7:58 ` Krzysztof Kozlowski
2023-11-09 2:33 ` Jaewon Kim
0 siblings, 1 reply; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-08 7:58 UTC (permalink / raw)
To: Jaewon Kim, Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial
On 31/10/2023 10:47, Jaewon Kim wrote:
> Samsung ExynosAutov920 is ARMv8-based automotive-oriented SoC.
> It has AE(Automotive Enhanced) IPs for safety.
> * Cortex-A78AE 10-cores
> * GIC-600AE
>
> This is minimal support for ExynosAutov920 SoC.
> * Enumerate all pinctrl nodes
> * Enable Chip-Id
> * Serial0 for console
> * PWM
>
> Since the clock driver is not yet implemented, it is supported as
> fixed-clock.
>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> ---
> .../dts/exynos/exynosautov920-pinctrl.dtsi | 1266 +++++++++++++++++
> .../arm64/boot/dts/exynos/exynosautov920.dtsi | 318 +++++
> 2 files changed, 1584 insertions(+)
> create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
> create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920.dtsi
>
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
> new file mode 100644
> index 000000000000..63b958b96c48
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
> @@ -0,0 +1,1266 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
> + *
> + * Copyright (c) 2023 Samsung Electronics Co., Ltd.
> + *
> + * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
> + * device tree nodes in this file.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +#include "exynos-pinctrl.h"
> +
> +&pinctrl_alive {
> + gpa0: gpa0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + gpa1: gpa1-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + gpq0: gpq0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> +&pinctrl_aud {
> + gpb0: gpb0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb1: gpb1-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb2: gpb2-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb3: gpb3-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb4: gpb4-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb5: gpb5-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpb6: gpb6-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> +&pinctrl_hsi0 {
> + gph0: gph0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph1: gph1-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> +&pinctrl_hsi1 {
> + gph8: gph8-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> +&pinctrl_hsi2 {
> + gph3: gph3-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph4: gph4-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph5: gph5-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph6: gph6-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> +&pinctrl_hsi2ufs {
> + gph2: gph2-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + ufs_rst_n: ufs-rst-n-pins {
> + samsung,pins = "gph2-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
> + };
> +
> + ufs_refclk_out: ufs-refclk-out-pins {
> + samsung,pins = "gph2-0";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + ufs_rst_n_1: ufs-rst-n-1-pins {
> + samsung,pins = "gph2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
> + };
> +
> + ufs_refclk_out_1: ufs-refclk-out-1-pins {
> + samsung,pins = "gph2-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
> + };
> +};
> +
> +&pinctrl_peric0 {
> + gpp0: gpp0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp1: gpp1-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp2: gpp2-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp3: gpp3-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp4: gpp4-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg0: gpg0-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg2: gpg2-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg3: gpg3-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg4: gpg4-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg5: gpg5-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + /* UART PERIC0_USI00 */
> + uart0_bus: uart0-bus-pins {
> + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart0_bus_dual: uart0-bus-dual-pins {
> + samsung,pins = "gpp0-0", "gpp0-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI01 */
> + uart1_bus: uart1-bus-pins {
> + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart1_bus_dual: uart1-bus-dual-pins {
> + samsung,pins = "gpp0-4", "gpp0-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI02 */
> + uart2_bus: uart2-bus-pins {
> + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart2_bus_dual: uart2-bus-dual-pins {
> + samsung,pins = "gpp1-0", "gpp1-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI03 */
> + uart3_bus: uart3-bus-pins {
> + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart3_bus_dual: uart3-bus-dual-pins {
> + samsung,pins = "gpp1-4", "gpp1-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI04 */
> + uart4_bus: uart4-bus-pins {
> + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart4_bus_dual: uart4-bus-dual-pins {
> + samsung,pins = "gpp2-0", "gpp2-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI05 */
> + uart5_bus: uart5-bus-pins {
> + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart5_bus_dual: uart5-bus-dual-pins {
> + samsung,pins = "gpp2-4", "gpp2-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI06 */
> + uart6_bus: uart6-bus-pins {
> + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart6_bus_dual: uart6-bus-dual-pins {
> + samsung,pins = "gpp3-0", "gpp3-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI07 */
> + uart7_bus: uart7-bus-pins {
> + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart7_bus_dual: uart7-bus-dual-pins {
> + samsung,pins = "gpp3-4", "gpp3-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC0_USI08 */
> + uart8_bus: uart8-bus-pins {
> + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart8_bus_dual: uart8-bus-dual-pins {
> + samsung,pins = "gpp4-0", "gpp4-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI00 */
> + hsi2c0_bus: hsi2c0-bus-pins {
> + samsung,pins = "gpp0-0", "gpp0-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI00_I2C */
> + hsi2c1_bus: hsi2c1-bus-pins {
> + samsung,pins = "gpp0-2", "gpp0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI01 */
> + hsi2c2_bus: hsi2c2-bus-pins {
> + samsung,pins = "gpp0-4", "gpp0-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI01_I2C */
> + hsi2c3_bus: hsi2c3-bus-pins {
> + samsung,pins = "gpp0-6", "gpp0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI02 */
> + hsi2c4_bus: hsi2c4-bus-pins {
> + samsung,pins = "gpp1-0", "gpp1-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI02_I2C */
> + hsi2c5_bus: hsi2c5-bus-pins {
> + samsung,pins = "gpp1-2", "gpp1-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI03 */
> + hsi2c6_bus: hsi2c6-bus-pins {
> + samsung,pins = "gpp1-4", "gpp1-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI03_I2C */
> + hsi2c7_bus: hsi2c7-bus-pins {
> + samsung,pins = "gpp1-6", "gpp1-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI04 */
> + hsi2c8_bus: hsi2c8-bus-pins {
> + samsung,pins = "gpp2-0", "gpp2-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI04_I2C */
> + hsi2c9_bus: hsi2c9-bus-pins {
> + samsung,pins = "gpp2-2", "gpp2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI05 */
> + hsi2c10_bus: hsi2c10-bus-pins {
> + samsung,pins = "gpp2-4", "gpp2-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI05_I2C */
> + hsi2c11_bus: hsi2c11-bus-pins {
> + samsung,pins = "gpp2-6", "gpp2-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI06 */
> + hsi2c12_bus: hsi2c12-bus-pins {
> + samsung,pins = "gpp3-0", "gpp3-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI06_I2C */
> + hsi2c13_bus: hsi2c13-bus-pins {
> + samsung,pins = "gpp3-2", "gpp3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI07 */
> + hsi2c14_bus: hsi2c14-bus-pins {
> + samsung,pins = "gpp3-4", "gpp3-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI07_I2C */
> + hsi2c15_bus: hsi2c15-bus-pins {
> + samsung,pins = "gpp3-6", "gpp3-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI08 */
> + hsi2c16_bus: hsi2c16-bus-pins {
> + samsung,pins = "gpp4-0", "gpp4-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC0 USI08_I2C */
> + hsi2c17_bus: hsi2c17-bus-pins {
> + samsung,pins = "gpp4-2", "gpp4-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI00 */
> + spi0_bus: spi0-bus-pins {
> + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi0_cs: spi0-cs-pins {
> + samsung,pins = "gpp0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi0_cs_func: spi0-cs-func-pins {
> + samsung,pins = "gpp0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI01 */
> + spi1_bus: spi1-bus-pins {
> + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi1_cs: spi1-cs-pins {
> + samsung,pins = "gpp0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi1_cs_func: spi1-cs-func-pins {
> + samsung,pins = "gpp0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI02 */
> + spi2_bus: spi2-bus-pins {
> + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi2_cs: spi2-cs-pins {
> + samsung,pins = "gpp1-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi2_cs_func: spi2-cs-func-pins {
> + samsung,pins = "gpp1-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI03 */
> + spi3_bus: spi3-bus-pins {
> + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi3_cs: spi3-cs-pins {
> + samsung,pins = "gpp1-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi3_cs_func: spi3-cs-func-pins {
> + samsung,pins = "gpp1-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI04 */
> + spi4_bus: spi4-bus-pins {
> + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi4_cs: spi4-cs-pins {
> + samsung,pins = "gpp2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi4_cs_func: spi4-cs-func-pins {
> + samsung,pins = "gpp2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI05 */
> + spi5_bus: spi5-bus-pins {
> + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi5_cs: spi5-cs-pins {
> + samsung,pins = "gpp2-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi5_cs_func: spi5-cs-func-pins {
> + samsung,pins = "gpp2-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI06 */
> + spi6_bus: spi6-bus-pins {
> + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi6_cs: spi6-cs-pins {
> + samsung,pins = "gpp3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi6_cs_func: spi6-cs-func-pins {
> + samsung,pins = "gpp3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI07 */
> + spi7_bus: spi7-bus-pins {
> + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi7_cs: spi7-cs-pins {
> + samsung,pins = "gpp3-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi7_cs_func: spi7-cs-func-pins {
> + samsung,pins = "gpp3-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC0 USI08 */
> + spi8_bus: spi8-bus-pins {
> + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi8_cs: spi8-cs-pins {
> + samsung,pins = "gpp4-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi8_cs_func: spi8-cs-func-pins {
> + samsung,pins = "gpp4-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I3C PERIC0 */
> + i3c0_bus: i3c0-bus-pins {
> + samsung,pins = "gpp2-6", "gpp2-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c1_bus: i3c1-bus-pins {
> + samsung,pins = "gpp3-2", "gpp3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c2_bus: i3c2-bus-pins {
> + samsung,pins = "gpp3-6", "gpp3-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c3_bus: i3c3-bus-pins {
> + samsung,pins = "gpp4-2", "gpp4-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* PWM PERIC0 */
> + pwm_tout0: pwm-tout0-pins {
> + samsung,pins = "gpg0-0";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + pwm_tout1: pwm-tout1-pins {
> + samsung,pins = "gpg0-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + pwm_tout2: pwm-tout2-pins {
> + samsung,pins = "gpg0-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + pwm_tout3: pwm-tout3-pins {
> + samsung,pins = "gpg0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +};
> +
> +&pinctrl_peric1 {
> + gpp5: gpp5-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp6: gpp6-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp7: gpp7-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp8: gpp8-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp9: gpp9-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp10: gpp10-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp11: gpp11-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpp12: gpp12-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg1: gpg1-gpio-bank {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + /* UART PERIC1 USI09 */
> + uart9_bus: uart9-bus-pins {
> + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart9_bus_dual: uart9-bus-dual-pins {
> + samsung,pins = "gpp5-0", "gpp5-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI10 */
> + uart10_bus: uart10-bus-pins {
> + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6", "gpp5-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart10_bus_dual: uart10-bus-dual-pins {
> + samsung,pins = "gpp5-4", "gpp5-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI11 */
> + uart11_bus: uart11-bus-pins {
> + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2", "gpp10-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart11_bus_dual: uart11-bus-dual-pins {
> + samsung,pins = "gpp10-0", "gpp10-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1_USI12 */
> + uart12_bus: uart12-bus-pins {
> + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2", "gpp7-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart12_bus_dual: uart12-bus-dual-pins {
> + samsung,pins = "gpp7-0", "gpp7-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1_USI13 */
> + uart13_bus: uart13-bus-pins {
> + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6", "gpp7-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart13_bus_dual: uart13-bus-dual-pins {
> + samsung,pins = "gpp7-4", "gpp7-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI14 */
> + uart14_bus: uart14-bus-pins {
> + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2", "gpp8-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart14_bus_dual: uart14-bus-dual-pins {
> + samsung,pins = "gpp8-0", "gpp8-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI15 */
> + uart15_bus: uart15-bus-pins {
> + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2", "gpp11-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart15_bus_dual: uart15-bus-dual-pins {
> + samsung,pins = "gpp11-0", "gpp11-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI16 */
> + uart16_bus: uart16-bus-pins {
> + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2", "gpp9-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart16_bus_dual: uart16-bus-dual-pins {
> + samsung,pins = "gpp9-0", "gpp9-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* UART PERIC1 USI17 */
> + uart17_bus: uart17-bus-pins {
> + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2", "gpp12-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + uart17_bus_dual: uart17-bus-dual-pins {
> + samsung,pins = "gpp12-0", "gpp12-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI09 */
> + hsi2c18_bus: hsi2c18-bus-pins {
> + samsung,pins = "gpp5-0", "gpp5-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI09_I2C */
> + hsi2c19_bus: hsi2c19-bus-pins {
> + samsung,pins = "gpp5-2", "gpp5-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI10 */
> + hsi2c20_bus: hsi2c20-bus-pins {
> + samsung,pins = "gpp5-4", "gpp5-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI10_I2C */
> + hsi2c21_bus: hsi2c21-bus-pins {
> + samsung,pins = "gpp5-6", "gpp5-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI11 */
> + hsi2c22_bus: hsi2c22-bus-pins {
> + samsung,pins = "gpp10-0", "gpp10-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI11_I2C */
> + hsi2c23_bus: hsi2c23-bus-pins {
> + samsung,pins = "gpp10-2", "gpp10-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI12 */
> + hsi2c24_bus: hsi2c24-bus-pins {
> + samsung,pins = "gpp7-0", "gpp7-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI12_I2C */
> + hsi2c25_bus: hsi2c25-bus-pins {
> + samsung,pins = "gpp7-2", "gpp7-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI13 */
> + hsi2c26_bus: hsi2c26-bus-pins {
> + samsung,pins = "gpp7-4", "gpp7-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI13_I2C */
> + hsi2c27_bus: hsi2c27-bus-pins {
> + samsung,pins = "gpp7-6", "gpp7-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI14 */
> + hsi2c28_bus: hsi2c28-bus-pins {
> + samsung,pins = "gpp8-0", "gpp8-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI14_I2C */
> + hsi2c29_bus: hsi2c29-bus-pins {
> + samsung,pins = "gpp8-2", "gpp8-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI15 */
> + hsi2c30_bus: hsi2c30-bus-pins {
> + samsung,pins = "gpp11-0", "gpp11-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI15_I2C */
> + hsi2c31_bus: hsi2c31-bus-pins {
> + samsung,pins = "gpp11-2", "gpp11-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI16 */
> + hsi2c32_bus: hsi2c32-bus-pins {
> + samsung,pins = "gpp9-0", "gpp9-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI16_I2C */
> + hsi2c33_bus: hsi2c33-bus-pins {
> + samsung,pins = "gpp9-2", "gpp9-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI17 */
> + hsi2c34_bus: hsi2c34-bus-pins {
> + samsung,pins = "gpp12-0", "gpp12-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I2C PERIC1 USI17_I2C */
> + hsi2c35_bus: hsi2c35-bus-pins {
> + samsung,pins = "gpp12-2", "gpp12-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI09 */
> + spi9_bus: spi9-bus-pins {
> + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi9_cs: spi9-cs-pins {
> + samsung,pins = "gpp5-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi9_cs_func: spi9-cs-func-pins {
> + samsung,pins = "gpp5-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI10 */
> + spi10_bus: spi10-bus-pins {
> + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi10_cs: spi10-cs-pins {
> + samsung,pins = "gpp5-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi10_cs_func: spi10-cs-func-pins {
> + samsung,pins = "gpp5-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI11 */
> + spi11_bus: spi11-bus-pins {
> + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi11_cs: spi11-cs-pins {
> + samsung,pins = "gpp10-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi11_cs_func: spi11-cs-func-pins {
> + samsung,pins = "gpp10-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI12 */
> + spi12_bus: spi12-bus-pins {
> + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi12_cs: spi12-cs-pins {
> + samsung,pins = "gpp7-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi12_cs_func: spi12-cs-func-pins {
> + samsung,pins = "gpp7-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI13 */
> + spi13_bus: spi13-bus-pins {
> + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi13_cs: spi13-cs-pins {
> + samsung,pins = "gpp7-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi13_cs_func: spi13-cs-func-pins {
> + samsung,pins = "gpp7-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI14 */
> + spi14_bus: spi14-bus-pins {
> + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi14_cs: spi14-cs-pins {
> + samsung,pins = "gpp8-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi14_cs_func: spi14-cs-func-pins {
> + samsung,pins = "gpp8-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI15 */
> + spi15_bus: spi15-bus-pins {
> + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi15_cs: spi15-cs-pins {
> + samsung,pins = "gpp11-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi15_cs_func: spi15-cs-func-pins {
> + samsung,pins = "gpp11-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI16 */
> + spi16_bus: spi16-bus-pins {
> + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi16_cs: spi16-cs-pins {
> + samsung,pins = "gpp9-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi16_cs_func: spi16-cs-func-pins {
> + samsung,pins = "gpp9-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* SPI PERIC1 USI17 */
> + spi17_bus: spi17-bus-pins {
> + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi17_cs: spi17-cs-pins {
> + samsung,pins = "gpp12-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + spi17_cs_func: spi17-cs-func-pins {
> + samsung,pins = "gpp12-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + /* I3C PERIC1 */
> + i3c4_bus: i3c4-bus-pins {
> + samsung,pins = "gpp7-2", "gpp7-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c5_bus: i3c5-bus-pins {
> + samsung,pins = "gpp7-6", "gpp7-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c6_bus: i3c6-bus-pins {
> + samsung,pins = "gpp8-2", "gpp8-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + i3c7_bus: i3c7-bus-pins {
> + samsung,pins = "gpp11-2", "gpp11-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> new file mode 100644
> index 000000000000..ec704fec323f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> @@ -0,0 +1,318 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's ExynosAutov920 SoC device tree source
> + *
> + * Copyright (c) 2023 Samsung Electronics Co., Ltd.
> + *
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/samsung,exynos-usi.h>
> +
> +/ {
> + compatible = "samsung,exynosautov920";
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + interrupt-parent = <&gic>;
> +
> + aliases {
> + pinctrl0 = &pinctrl_alive;
> + pinctrl1 = &pinctrl_aud;
> + pinctrl2 = &pinctrl_hsi0;
> + pinctrl3 = &pinctrl_hsi1;
> + pinctrl4 = &pinctrl_hsi2;
> + pinctrl5 = &pinctrl_hsi2ufs;
> + pinctrl6 = &pinctrl_peric0;
> + pinctrl7 = &pinctrl_peric1;
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a78-pmu";
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + chosen: chosen {
> + bootargs = "console=ttySAC0,115200n8 loglevel=3 printk.devkmsg=on log_buf_len=512K";
Drop bootargs. Instead use stdout path for console.
> + linux,initrd-start = <0x85000000>;
> + linux,initrd-end = <0x8AFFFFFF>;
Lowercase hex please.
> + };
> +
> + cpus: cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + core1 {
> + cpu = <&cpu1>;
> + };
> + core2 {
> + cpu = <&cpu2>;
> + };
> + core3 {
> + cpu = <&cpu3>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + core1 {
> + cpu = <&cpu1>;
> + };
> + core2 {
> + cpu = <&cpu2>;
> + };
> + core3 {
> + cpu = <&cpu3>;
> + };
> + };
> +
> + cluster2 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + core1 {
> + cpu = <&cpu1>;
> + };
> + };
> + };
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@200 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x200>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@300 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x300>;
> + enable-method = "psci";
> + };
> +
> + cpu4: cpu@10000 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x10000>;
> + enable-method = "psci";
> + };
> +
> + cpu5: cpu@10100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x10100>;
> + enable-method = "psci";
> + };
> +
> + cpu6: cpu@10200 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x10200>;
> + enable-method = "psci";
> + };
> +
> + cpu7: cpu@10300 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x10300>;
> + enable-method = "psci";
> + };
> +
> + cpu8: cpu@20000 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x20000>;
> + enable-method = "psci";
> + };
> +
> + cpu9: cpu@20100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a78ae";
> + reg = <0x0 0x20100>;
> + enable-method = "psci";
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> + };
> +
> + timer {
Please keep the nodes sorted alphabetically, so this goes after "soc". I
know that not every Exynos files follows this convention, but let's try
to keep it for new ones.
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + fixed-rate-clocks {
Drop the node and keep the clocks in top-level only.
> + xtcxo: clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "oscclk";
> + };
> +
> + /*
> + * Keep the stub clock for serial driver, until proper clock
Prefix with: FIXME:
> + * driver is implemented.
> + */
> + usi_clock: usi-clock {
Node name: clock-usi
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <200000000>;
> + clock-output-names = "usi";
> + };
> + };
> +
> + soc: soc@0 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x0 0x20000000>;
> +
> + chipid@10000000 {
> + compatible = "samsung,exynos850-chipid";
Let's add everywhere specific compatibles. I'll fix existing sources.
> + reg = <0x10000000 0x24>;
> + };
> +
> + gic: interrupt-controller@10400000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x10400000 0x10000>,
> + <0x10460000 0x140000>;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_alive: pinctrl@11850000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x11850000 0x10000>;
> +
> + wakeup-interrupt-controller {
> + compatible = "samsung,exynosautov920-wakeup-eint";
> + };
> + };
> +
> + pinctrl_aud: pinctrl@1a460000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x1a460000 0x10000>;
> + };
> +
> + pinctrl_hsi0: pinctrl@16040000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x16040000 0x10000>;
> + interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_hsi1: pinctrl@16450000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x16450000 0x10000>;
> + interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_hsi2: pinctrl@16c10000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x16c10000 0x10000>;
> + interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_hsi2ufs: pinctrl@16d20000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x16d20000 0x10000>;
> + interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_peric0: pinctrl@10830000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x10830000 0x10000>;
> + interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pinctrl_peric1: pinctrl@10c30000 {
> + compatible = "samsung,exynosautov920-pinctrl";
> + reg = <0x10c30000 0x10000>;
> + interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + pmu_system_controller: system-controller@11860000 {
> + compatible = "samsung,exynos7-pmu", "syscon";
Specific compatible (with these fallbacks), please.
> + reg = <0x11860000 0x10000>;
> + };
> +
> + pwm: pwm@109b0000 {
> + compatible = "samsung,exynosautov920-pwm",
> + "samsung,exynos4210-pwm";
> + reg = <0x109b0000 0x100>;
> + samsung,pwm-outputs = <0>, <1>, <2>, <3>;
> + #pwm-cells = <3>;
> + clocks = <&xtcxo>;
> + clock-names = "timers";
> + status = "disabled";
> + };
> +
> + syscon_peric0: syscon@102820000 {
> + compatible = "samsung,exynosautov920-peric0-sysreg",
> + "samsung,exynosautov920-sysreg", "syscon";
Drop "samsung,exynosautov920-sysreg"
> + reg = <0x10820000 0x2000>;
> + };
> +
> + syscon_peric1: syscon@10c21000 {
> + compatible = "samsung,exynosautov920-peric1-sysreg",
> + "samsung,exynosautov920-sysreg", "syscon";
Ditto
> + reg = <0x10c21000 0x2000>;
> + };
> +
> + usi_0: usi@108800c0 {
> + compatible = "samsung,exynosautov920-usi",
> + "samsung,exynos850-usi";
> + reg = <0x108800c0 0x20>;
> + samsung,sysreg = <&syscon_peric0 0x1000>;
> + samsung,mode = <USI_V2_UART>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + clocks = <&usi_clock>, <&usi_clock>;
> + clock-names = "pclk", "ipclk";
> + status = "disabled";
> +
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg
2023-11-08 7:41 ` Krzysztof Kozlowski
@ 2023-11-09 2:24 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-11-09 2:24 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial
Hello Krzysztof,
Thanks for reviewing these patches.
On 23. 11. 8. 16:41, Krzysztof Kozlowski wrote:
> On 31/10/2023 10:47, Jaewon Kim wrote:
>> Add compatible for ExynosAutov920 sysreg controllers.
>>
>> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
>> ---
>> .../bindings/soc/samsung/samsung,exynos-sysreg.yaml | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
>> index 163e912e9cad..aa2a29ec6072 100644
>> --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
>> +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
>> @@ -35,6 +35,7 @@ properties:
>> - samsung,exynos5433-sysreg
>> - samsung,exynos850-sysreg
>> - samsung,exynosautov9-sysreg
>> + - samsung,exynosautov920-sysreg
> New devices should not be deprecated by default. Drop.
Okay, I will remove this line.
>
>> - const: syscon
>> deprecated: true
>> - items:
>> @@ -50,6 +51,12 @@ properties:
>> - samsung,exynosautov9-peric1-sysreg
>> - const: samsung,exynosautov9-sysreg
>> - const: syscon
>> + - items:
>> + - enum:
>> + - samsung,exynosautov920-peric0-sysreg
>> + - samsung,exynosautov920-peric1-sysreg
>> + - const: samsung,exynosautov920-sysreg
>> + - const: syscon
>>
>> reg:
>> maxItems: 1
> Best regards,
> Krzysztof
>
>
Thanks
Jaewon Kim
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC
2023-11-08 7:58 ` Krzysztof Kozlowski
@ 2023-11-09 2:33 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-11-09 2:33 UTC (permalink / raw)
To: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial
On 23. 11. 8. 16:58, Krzysztof Kozlowski wrote:
> On 31/10/2023 10:47, Jaewon Kim wrote:
>> Samsung ExynosAutov920 is ARMv8-based automotive-oriented SoC.
>> It has AE(Automotive Enhanced) IPs for safety.
>> * Cortex-A78AE 10-cores
>> * GIC-600AE
>>
>> This is minimal support for ExynosAutov920 SoC.
>> * Enumerate all pinctrl nodes
>> * Enable Chip-Id
>> * Serial0 for console
>> * PWM
>>
>> Since the clock driver is not yet implemented, it is supported as
>> fixed-clock.
>>
>> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
>> ---
>> .../dts/exynos/exynosautov920-pinctrl.dtsi | 1266 +++++++++++++++++
>> .../arm64/boot/dts/exynos/exynosautov920.dtsi | 318 +++++
>> 2 files changed, 1584 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
>> create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
>> new file mode 100644
>> index 000000000000..63b958b96c48
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi
>> @@ -0,0 +1,1266 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
>> + *
>> + * Copyright (c) 2023 Samsung Electronics Co., Ltd.
>> + *
>> + * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
>> + * device tree nodes in this file.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +#include "exynos-pinctrl.h"
>> +
>> +&pinctrl_alive {
>> + gpa0: gpa0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + gpa1: gpa1-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + gpq0: gpq0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +};
>> +
>> +&pinctrl_aud {
>> + gpb0: gpb0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb1: gpb1-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb2: gpb2-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb3: gpb3-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb4: gpb4-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb5: gpb5-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpb6: gpb6-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +};
>> +
>> +&pinctrl_hsi0 {
>> + gph0: gph0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gph1: gph1-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +};
>> +
>> +&pinctrl_hsi1 {
>> + gph8: gph8-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +};
>> +
>> +&pinctrl_hsi2 {
>> + gph3: gph3-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gph4: gph4-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gph5: gph5-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gph6: gph6-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +};
>> +
>> +&pinctrl_hsi2ufs {
>> + gph2: gph2-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + ufs_rst_n: ufs-rst-n-pins {
>> + samsung,pins = "gph2-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
>> + };
>> +
>> + ufs_refclk_out: ufs-refclk-out-pins {
>> + samsung,pins = "gph2-0";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + ufs_rst_n_1: ufs-rst-n-1-pins {
>> + samsung,pins = "gph2-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
>> + };
>> +
>> + ufs_refclk_out_1: ufs-refclk-out-1-pins {
>> + samsung,pins = "gph2-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
>> + };
>> +};
>> +
>> +&pinctrl_peric0 {
>> + gpp0: gpp0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp1: gpp1-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp2: gpp2-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp3: gpp3-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp4: gpp4-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg0: gpg0-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg2: gpg2-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg3: gpg3-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg4: gpg4-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg5: gpg5-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + /* UART PERIC0_USI00 */
>> + uart0_bus: uart0-bus-pins {
>> + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart0_bus_dual: uart0-bus-dual-pins {
>> + samsung,pins = "gpp0-0", "gpp0-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI01 */
>> + uart1_bus: uart1-bus-pins {
>> + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart1_bus_dual: uart1-bus-dual-pins {
>> + samsung,pins = "gpp0-4", "gpp0-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI02 */
>> + uart2_bus: uart2-bus-pins {
>> + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart2_bus_dual: uart2-bus-dual-pins {
>> + samsung,pins = "gpp1-0", "gpp1-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI03 */
>> + uart3_bus: uart3-bus-pins {
>> + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart3_bus_dual: uart3-bus-dual-pins {
>> + samsung,pins = "gpp1-4", "gpp1-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI04 */
>> + uart4_bus: uart4-bus-pins {
>> + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart4_bus_dual: uart4-bus-dual-pins {
>> + samsung,pins = "gpp2-0", "gpp2-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI05 */
>> + uart5_bus: uart5-bus-pins {
>> + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart5_bus_dual: uart5-bus-dual-pins {
>> + samsung,pins = "gpp2-4", "gpp2-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI06 */
>> + uart6_bus: uart6-bus-pins {
>> + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart6_bus_dual: uart6-bus-dual-pins {
>> + samsung,pins = "gpp3-0", "gpp3-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI07 */
>> + uart7_bus: uart7-bus-pins {
>> + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart7_bus_dual: uart7-bus-dual-pins {
>> + samsung,pins = "gpp3-4", "gpp3-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC0_USI08 */
>> + uart8_bus: uart8-bus-pins {
>> + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart8_bus_dual: uart8-bus-dual-pins {
>> + samsung,pins = "gpp4-0", "gpp4-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI00 */
>> + hsi2c0_bus: hsi2c0-bus-pins {
>> + samsung,pins = "gpp0-0", "gpp0-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI00_I2C */
>> + hsi2c1_bus: hsi2c1-bus-pins {
>> + samsung,pins = "gpp0-2", "gpp0-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI01 */
>> + hsi2c2_bus: hsi2c2-bus-pins {
>> + samsung,pins = "gpp0-4", "gpp0-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI01_I2C */
>> + hsi2c3_bus: hsi2c3-bus-pins {
>> + samsung,pins = "gpp0-6", "gpp0-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI02 */
>> + hsi2c4_bus: hsi2c4-bus-pins {
>> + samsung,pins = "gpp1-0", "gpp1-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI02_I2C */
>> + hsi2c5_bus: hsi2c5-bus-pins {
>> + samsung,pins = "gpp1-2", "gpp1-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI03 */
>> + hsi2c6_bus: hsi2c6-bus-pins {
>> + samsung,pins = "gpp1-4", "gpp1-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI03_I2C */
>> + hsi2c7_bus: hsi2c7-bus-pins {
>> + samsung,pins = "gpp1-6", "gpp1-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI04 */
>> + hsi2c8_bus: hsi2c8-bus-pins {
>> + samsung,pins = "gpp2-0", "gpp2-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI04_I2C */
>> + hsi2c9_bus: hsi2c9-bus-pins {
>> + samsung,pins = "gpp2-2", "gpp2-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI05 */
>> + hsi2c10_bus: hsi2c10-bus-pins {
>> + samsung,pins = "gpp2-4", "gpp2-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI05_I2C */
>> + hsi2c11_bus: hsi2c11-bus-pins {
>> + samsung,pins = "gpp2-6", "gpp2-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI06 */
>> + hsi2c12_bus: hsi2c12-bus-pins {
>> + samsung,pins = "gpp3-0", "gpp3-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI06_I2C */
>> + hsi2c13_bus: hsi2c13-bus-pins {
>> + samsung,pins = "gpp3-2", "gpp3-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI07 */
>> + hsi2c14_bus: hsi2c14-bus-pins {
>> + samsung,pins = "gpp3-4", "gpp3-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI07_I2C */
>> + hsi2c15_bus: hsi2c15-bus-pins {
>> + samsung,pins = "gpp3-6", "gpp3-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI08 */
>> + hsi2c16_bus: hsi2c16-bus-pins {
>> + samsung,pins = "gpp4-0", "gpp4-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC0 USI08_I2C */
>> + hsi2c17_bus: hsi2c17-bus-pins {
>> + samsung,pins = "gpp4-2", "gpp4-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI00 */
>> + spi0_bus: spi0-bus-pins {
>> + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi0_cs: spi0-cs-pins {
>> + samsung,pins = "gpp0-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi0_cs_func: spi0-cs-func-pins {
>> + samsung,pins = "gpp0-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI01 */
>> + spi1_bus: spi1-bus-pins {
>> + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi1_cs: spi1-cs-pins {
>> + samsung,pins = "gpp0-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi1_cs_func: spi1-cs-func-pins {
>> + samsung,pins = "gpp0-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI02 */
>> + spi2_bus: spi2-bus-pins {
>> + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi2_cs: spi2-cs-pins {
>> + samsung,pins = "gpp1-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi2_cs_func: spi2-cs-func-pins {
>> + samsung,pins = "gpp1-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI03 */
>> + spi3_bus: spi3-bus-pins {
>> + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi3_cs: spi3-cs-pins {
>> + samsung,pins = "gpp1-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi3_cs_func: spi3-cs-func-pins {
>> + samsung,pins = "gpp1-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI04 */
>> + spi4_bus: spi4-bus-pins {
>> + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi4_cs: spi4-cs-pins {
>> + samsung,pins = "gpp2-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi4_cs_func: spi4-cs-func-pins {
>> + samsung,pins = "gpp2-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI05 */
>> + spi5_bus: spi5-bus-pins {
>> + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi5_cs: spi5-cs-pins {
>> + samsung,pins = "gpp2-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi5_cs_func: spi5-cs-func-pins {
>> + samsung,pins = "gpp2-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI06 */
>> + spi6_bus: spi6-bus-pins {
>> + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi6_cs: spi6-cs-pins {
>> + samsung,pins = "gpp3-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi6_cs_func: spi6-cs-func-pins {
>> + samsung,pins = "gpp3-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI07 */
>> + spi7_bus: spi7-bus-pins {
>> + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi7_cs: spi7-cs-pins {
>> + samsung,pins = "gpp3-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi7_cs_func: spi7-cs-func-pins {
>> + samsung,pins = "gpp3-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC0 USI08 */
>> + spi8_bus: spi8-bus-pins {
>> + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi8_cs: spi8-cs-pins {
>> + samsung,pins = "gpp4-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi8_cs_func: spi8-cs-func-pins {
>> + samsung,pins = "gpp4-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I3C PERIC0 */
>> + i3c0_bus: i3c0-bus-pins {
>> + samsung,pins = "gpp2-6", "gpp2-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c1_bus: i3c1-bus-pins {
>> + samsung,pins = "gpp3-2", "gpp3-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c2_bus: i3c2-bus-pins {
>> + samsung,pins = "gpp3-6", "gpp3-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c3_bus: i3c3-bus-pins {
>> + samsung,pins = "gpp4-2", "gpp4-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* PWM PERIC0 */
>> + pwm_tout0: pwm-tout0-pins {
>> + samsung,pins = "gpg0-0";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + pwm_tout1: pwm-tout1-pins {
>> + samsung,pins = "gpg0-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + pwm_tout2: pwm-tout2-pins {
>> + samsung,pins = "gpg0-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + pwm_tout3: pwm-tout3-pins {
>> + samsung,pins = "gpg0-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +};
>> +
>> +&pinctrl_peric1 {
>> + gpp5: gpp5-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp6: gpp6-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp7: gpp7-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp8: gpp8-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp9: gpp9-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp10: gpp10-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp11: gpp11-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpp12: gpp12-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + gpg1: gpg1-gpio-bank {
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + /* UART PERIC1 USI09 */
>> + uart9_bus: uart9-bus-pins {
>> + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart9_bus_dual: uart9-bus-dual-pins {
>> + samsung,pins = "gpp5-0", "gpp5-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI10 */
>> + uart10_bus: uart10-bus-pins {
>> + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6", "gpp5-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart10_bus_dual: uart10-bus-dual-pins {
>> + samsung,pins = "gpp5-4", "gpp5-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI11 */
>> + uart11_bus: uart11-bus-pins {
>> + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2", "gpp10-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart11_bus_dual: uart11-bus-dual-pins {
>> + samsung,pins = "gpp10-0", "gpp10-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1_USI12 */
>> + uart12_bus: uart12-bus-pins {
>> + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2", "gpp7-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart12_bus_dual: uart12-bus-dual-pins {
>> + samsung,pins = "gpp7-0", "gpp7-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1_USI13 */
>> + uart13_bus: uart13-bus-pins {
>> + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6", "gpp7-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart13_bus_dual: uart13-bus-dual-pins {
>> + samsung,pins = "gpp7-4", "gpp7-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI14 */
>> + uart14_bus: uart14-bus-pins {
>> + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2", "gpp8-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart14_bus_dual: uart14-bus-dual-pins {
>> + samsung,pins = "gpp8-0", "gpp8-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI15 */
>> + uart15_bus: uart15-bus-pins {
>> + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2", "gpp11-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart15_bus_dual: uart15-bus-dual-pins {
>> + samsung,pins = "gpp11-0", "gpp11-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI16 */
>> + uart16_bus: uart16-bus-pins {
>> + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2", "gpp9-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart16_bus_dual: uart16-bus-dual-pins {
>> + samsung,pins = "gpp9-0", "gpp9-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* UART PERIC1 USI17 */
>> + uart17_bus: uart17-bus-pins {
>> + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2", "gpp12-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + uart17_bus_dual: uart17-bus-dual-pins {
>> + samsung,pins = "gpp12-0", "gpp12-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI09 */
>> + hsi2c18_bus: hsi2c18-bus-pins {
>> + samsung,pins = "gpp5-0", "gpp5-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI09_I2C */
>> + hsi2c19_bus: hsi2c19-bus-pins {
>> + samsung,pins = "gpp5-2", "gpp5-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI10 */
>> + hsi2c20_bus: hsi2c20-bus-pins {
>> + samsung,pins = "gpp5-4", "gpp5-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI10_I2C */
>> + hsi2c21_bus: hsi2c21-bus-pins {
>> + samsung,pins = "gpp5-6", "gpp5-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI11 */
>> + hsi2c22_bus: hsi2c22-bus-pins {
>> + samsung,pins = "gpp10-0", "gpp10-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI11_I2C */
>> + hsi2c23_bus: hsi2c23-bus-pins {
>> + samsung,pins = "gpp10-2", "gpp10-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI12 */
>> + hsi2c24_bus: hsi2c24-bus-pins {
>> + samsung,pins = "gpp7-0", "gpp7-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI12_I2C */
>> + hsi2c25_bus: hsi2c25-bus-pins {
>> + samsung,pins = "gpp7-2", "gpp7-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI13 */
>> + hsi2c26_bus: hsi2c26-bus-pins {
>> + samsung,pins = "gpp7-4", "gpp7-5";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI13_I2C */
>> + hsi2c27_bus: hsi2c27-bus-pins {
>> + samsung,pins = "gpp7-6", "gpp7-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI14 */
>> + hsi2c28_bus: hsi2c28-bus-pins {
>> + samsung,pins = "gpp8-0", "gpp8-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI14_I2C */
>> + hsi2c29_bus: hsi2c29-bus-pins {
>> + samsung,pins = "gpp8-2", "gpp8-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI15 */
>> + hsi2c30_bus: hsi2c30-bus-pins {
>> + samsung,pins = "gpp11-0", "gpp11-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI15_I2C */
>> + hsi2c31_bus: hsi2c31-bus-pins {
>> + samsung,pins = "gpp11-2", "gpp11-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI16 */
>> + hsi2c32_bus: hsi2c32-bus-pins {
>> + samsung,pins = "gpp9-0", "gpp9-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI16_I2C */
>> + hsi2c33_bus: hsi2c33-bus-pins {
>> + samsung,pins = "gpp9-2", "gpp9-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI17 */
>> + hsi2c34_bus: hsi2c34-bus-pins {
>> + samsung,pins = "gpp12-0", "gpp12-1";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I2C PERIC1 USI17_I2C */
>> + hsi2c35_bus: hsi2c35-bus-pins {
>> + samsung,pins = "gpp12-2", "gpp12-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI09 */
>> + spi9_bus: spi9-bus-pins {
>> + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi9_cs: spi9-cs-pins {
>> + samsung,pins = "gpp5-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi9_cs_func: spi9-cs-func-pins {
>> + samsung,pins = "gpp5-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI10 */
>> + spi10_bus: spi10-bus-pins {
>> + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi10_cs: spi10-cs-pins {
>> + samsung,pins = "gpp5-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi10_cs_func: spi10-cs-func-pins {
>> + samsung,pins = "gpp5-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI11 */
>> + spi11_bus: spi11-bus-pins {
>> + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi11_cs: spi11-cs-pins {
>> + samsung,pins = "gpp10-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi11_cs_func: spi11-cs-func-pins {
>> + samsung,pins = "gpp10-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI12 */
>> + spi12_bus: spi12-bus-pins {
>> + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi12_cs: spi12-cs-pins {
>> + samsung,pins = "gpp7-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi12_cs_func: spi12-cs-func-pins {
>> + samsung,pins = "gpp7-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI13 */
>> + spi13_bus: spi13-bus-pins {
>> + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi13_cs: spi13-cs-pins {
>> + samsung,pins = "gpp7-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi13_cs_func: spi13-cs-func-pins {
>> + samsung,pins = "gpp7-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI14 */
>> + spi14_bus: spi14-bus-pins {
>> + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi14_cs: spi14-cs-pins {
>> + samsung,pins = "gpp8-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi14_cs_func: spi14-cs-func-pins {
>> + samsung,pins = "gpp8-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI15 */
>> + spi15_bus: spi15-bus-pins {
>> + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi15_cs: spi15-cs-pins {
>> + samsung,pins = "gpp11-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi15_cs_func: spi15-cs-func-pins {
>> + samsung,pins = "gpp11-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI16 */
>> + spi16_bus: spi16-bus-pins {
>> + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi16_cs: spi16-cs-pins {
>> + samsung,pins = "gpp9-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi16_cs_func: spi16-cs-func-pins {
>> + samsung,pins = "gpp9-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* SPI PERIC1 USI17 */
>> + spi17_bus: spi17-bus-pins {
>> + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi17_cs: spi17-cs-pins {
>> + samsung,pins = "gpp12-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + spi17_cs_func: spi17-cs-func-pins {
>> + samsung,pins = "gpp12-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + /* I3C PERIC1 */
>> + i3c4_bus: i3c4-bus-pins {
>> + samsung,pins = "gpp7-2", "gpp7-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c5_bus: i3c5-bus-pins {
>> + samsung,pins = "gpp7-6", "gpp7-7";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c6_bus: i3c6-bus-pins {
>> + samsung,pins = "gpp8-2", "gpp8-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +
>> + i3c7_bus: i3c7-bus-pins {
>> + samsung,pins = "gpp11-2", "gpp11-3";
>> + samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
>> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
>> new file mode 100644
>> index 000000000000..ec704fec323f
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
>> @@ -0,0 +1,318 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Samsung's ExynosAutov920 SoC device tree source
>> + *
>> + * Copyright (c) 2023 Samsung Electronics Co., Ltd.
>> + *
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/soc/samsung,exynos-usi.h>
>> +
>> +/ {
>> + compatible = "samsung,exynosautov920";
>> + #address-cells = <2>;
>> + #size-cells = <1>;
>> +
>> + interrupt-parent = <&gic>;
>> +
>> + aliases {
>> + pinctrl0 = &pinctrl_alive;
>> + pinctrl1 = &pinctrl_aud;
>> + pinctrl2 = &pinctrl_hsi0;
>> + pinctrl3 = &pinctrl_hsi1;
>> + pinctrl4 = &pinctrl_hsi2;
>> + pinctrl5 = &pinctrl_hsi2ufs;
>> + pinctrl6 = &pinctrl_peric0;
>> + pinctrl7 = &pinctrl_peric1;
>> + };
>> +
>> + arm-pmu {
>> + compatible = "arm,cortex-a78-pmu";
>> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +
>> + chosen: chosen {
>> + bootargs = "console=ttySAC0,115200n8 loglevel=3 printk.devkmsg=on log_buf_len=512K";
> Drop bootargs. Instead use stdout path for console.
>
>> + linux,initrd-start = <0x85000000>;
>> + linux,initrd-end = <0x8AFFFFFF>;
> Lowercase hex please.
>
>> + };
>> +
>> + cpus: cpus {
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> +
>> + cpu-map {
>> + cluster0 {
>> + core0 {
>> + cpu = <&cpu0>;
>> + };
>> + core1 {
>> + cpu = <&cpu1>;
>> + };
>> + core2 {
>> + cpu = <&cpu2>;
>> + };
>> + core3 {
>> + cpu = <&cpu3>;
>> + };
>> + };
>> +
>> + cluster1 {
>> + core0 {
>> + cpu = <&cpu0>;
>> + };
>> + core1 {
>> + cpu = <&cpu1>;
>> + };
>> + core2 {
>> + cpu = <&cpu2>;
>> + };
>> + core3 {
>> + cpu = <&cpu3>;
>> + };
>> + };
>> +
>> + cluster2 {
>> + core0 {
>> + cpu = <&cpu0>;
>> + };
>> + core1 {
>> + cpu = <&cpu1>;
>> + };
>> + };
>> + };
Self review : cpu property was mismatched.
I will modify it in v2.
>> +
>> + cpu0: cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x0>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu1: cpu@100 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x100>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu2: cpu@200 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x200>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu3: cpu@300 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x300>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu4: cpu@10000 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x10000>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu5: cpu@10100 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x10100>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu6: cpu@10200 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x10200>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu7: cpu@10300 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x10300>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu8: cpu@20000 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x20000>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu9: cpu@20100 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a78ae";
>> + reg = <0x0 0x20100>;
>> + enable-method = "psci";
>> + };
>> + };
>> +
>> + psci {
>> + compatible = "arm,psci-1.0";
>> + method = "smc";
>> + };
>> +
>> + timer {
> Please keep the nodes sorted alphabetically, so this goes after "soc". I
> know that not every Exynos files follows this convention, but let's try
> to keep it for new ones.
Okay, I will move it after "soc".
>> + compatible = "arm,armv8-timer";
>> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
>> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
>> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
>> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
>> + <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +
>> + fixed-rate-clocks {
> Drop the node and keep the clocks in top-level only.
Okay, I will remove "fixed-rate-clocks".
>
>> + xtcxo: clock {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-output-names = "oscclk";
>> + };
>> +
>> + /*
>> + * Keep the stub clock for serial driver, until proper clock
> Prefix with: FIXME:
Okay, I will add "FIXME:" prefix.
>
>> + * driver is implemented.
>> + */
>> + usi_clock: usi-clock {
> Node name: clock-usi
Okay, I will change it.
>
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <200000000>;
>> + clock-output-names = "usi";
>> + };
>> + };
>> +
>> + soc: soc@0 {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x0 0x0 0x20000000>;
>> +
>> + chipid@10000000 {
>> + compatible = "samsung,exynos850-chipid";
> Let's add everywhere specific compatibles. I'll fix existing sources.
Thanks to quick patchset.
I will modify it with dt-binding after merge your patch.
>
>> + reg = <0x10000000 0x24>;
>> + };
>> +
>> + gic: interrupt-controller@10400000 {
>> + compatible = "arm,gic-v3";
>> + #interrupt-cells = <3>;
>> + #address-cells = <0>;
>> + interrupt-controller;
>> + reg = <0x10400000 0x10000>,
>> + <0x10460000 0x140000>;
>> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_alive: pinctrl@11850000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x11850000 0x10000>;
>> +
>> + wakeup-interrupt-controller {
>> + compatible = "samsung,exynosautov920-wakeup-eint";
>> + };
>> + };
>> +
>> + pinctrl_aud: pinctrl@1a460000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x1a460000 0x10000>;
>> + };
>> +
>> + pinctrl_hsi0: pinctrl@16040000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x16040000 0x10000>;
>> + interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_hsi1: pinctrl@16450000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x16450000 0x10000>;
>> + interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_hsi2: pinctrl@16c10000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x16c10000 0x10000>;
>> + interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_hsi2ufs: pinctrl@16d20000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x16d20000 0x10000>;
>> + interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_peric0: pinctrl@10830000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x10830000 0x10000>;
>> + interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pinctrl_peric1: pinctrl@10c30000 {
>> + compatible = "samsung,exynosautov920-pinctrl";
>> + reg = <0x10c30000 0x10000>;
>> + interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
>> + };
>> +
>> + pmu_system_controller: system-controller@11860000 {
>> + compatible = "samsung,exynos7-pmu", "syscon";
> Specific compatible (with these fallbacks), please.
I will modify it with dt-binding after merge your patch.
>
>> + reg = <0x11860000 0x10000>;
>> + };
>> +
>> + pwm: pwm@109b0000 {
>> + compatible = "samsung,exynosautov920-pwm",
>> + "samsung,exynos4210-pwm";
>> + reg = <0x109b0000 0x100>;
>> + samsung,pwm-outputs = <0>, <1>, <2>, <3>;
>> + #pwm-cells = <3>;
>> + clocks = <&xtcxo>;
>> + clock-names = "timers";
>> + status = "disabled";
>> + };
>> +
>> + syscon_peric0: syscon@102820000 {
>> + compatible = "samsung,exynosautov920-peric0-sysreg",
>> + "samsung,exynosautov920-sysreg", "syscon";
> Drop "samsung,exynosautov920-sysreg"
Okay, i will drop it.
>
>> + reg = <0x10820000 0x2000>;
>> + };
>> +
>> + syscon_peric1: syscon@10c21000 {
>> + compatible = "samsung,exynosautov920-peric1-sysreg",
>> + "samsung,exynosautov920-sysreg", "syscon";
> Ditto
Okay, i will drop it.
>
>> + reg = <0x10c21000 0x2000>;
>> + };
>> +
>> + usi_0: usi@108800c0 {
>> + compatible = "samsung,exynosautov920-usi",
>> + "samsung,exynos850-usi";
>> + reg = <0x108800c0 0x20>;
>> + samsung,sysreg = <&syscon_peric0 0x1000>;
>> + samsung,mode = <USI_V2_UART>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> + clocks = <&usi_clock>, <&usi_clock>;
>> + clock-names = "pclk", "ipclk";
>> + status = "disabled";
>> +
>
> Best regards,
> Krzysztof
>
>
Thanks
Jaewon Kim
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible
2023-10-31 9:47 ` [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible Jaewon Kim
@ 2023-11-09 6:28 ` Uwe Kleine-König
2023-11-09 8:23 ` Krzysztof Kozlowski
0 siblings, 1 reply; 21+ messages in thread
From: Uwe Kleine-König @ 2023-11-09 6:28 UTC (permalink / raw)
To: Jaewon Kim
Cc: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Greg Kroah-Hartman, Jiri Slaby, linux-arm-kernel,
linux-samsung-soc, devicetree, linux-kernel, linux-gpio,
linux-pwm, linux-serial
[-- Attachment #1: Type: text/plain, Size: 1205 bytes --]
Hello,
On Tue, Oct 31, 2023 at 06:47:46PM +0900, Jaewon Kim wrote:
> Add samsung,exynosautov920-pwm compatible string to binding document.
>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> ---
> Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
> index 2162f661ed5a..b6beca2ae81e 100644
> --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
> +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
> @@ -30,6 +30,7 @@ properties:
> - items:
> - enum:
> - samsung,exynosautov9-pwm
> + - samsung,exynosautov920-pwm
> - const: samsung,exynos4210-pwm
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
What is the merge plan here? Should this go via the pwm tree, or can it
better go via some exynos tree together with the dts files?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible
2023-11-09 6:28 ` Uwe Kleine-König
@ 2023-11-09 8:23 ` Krzysztof Kozlowski
2023-11-09 8:36 ` Jaewon Kim
0 siblings, 1 reply; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-09 8:23 UTC (permalink / raw)
To: Uwe Kleine-König, Jaewon Kim
Cc: Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Greg Kroah-Hartman, Jiri Slaby, linux-arm-kernel,
linux-samsung-soc, devicetree, linux-kernel, linux-gpio,
linux-pwm, linux-serial
On 09/11/2023 07:28, Uwe Kleine-König wrote:
> Hello,
>
> On Tue, Oct 31, 2023 at 06:47:46PM +0900, Jaewon Kim wrote:
>> Add samsung,exynosautov920-pwm compatible string to binding document.
>>
>> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
>> ---
>> Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>> index 2162f661ed5a..b6beca2ae81e 100644
>> --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>> +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>> @@ -30,6 +30,7 @@ properties:
>> - items:
>> - enum:
>> - samsung,exynosautov9-pwm
>> + - samsung,exynosautov920-pwm
>> - const: samsung,exynos4210-pwm
>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>
> What is the merge plan here? Should this go via the pwm tree, or can it
> better go via some exynos tree together with the dts files?
I propose I will take it. I will have conflicting change and keeping
bindings with DTS together allows smooth dtbs_check.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible
2023-11-09 8:23 ` Krzysztof Kozlowski
@ 2023-11-09 8:36 ` Jaewon Kim
0 siblings, 0 replies; 21+ messages in thread
From: Jaewon Kim @ 2023-11-09 8:36 UTC (permalink / raw)
To: Krzysztof Kozlowski, Uwe Kleine-König
Cc: Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Linus Walleij, Thierry Reding,
Greg Kroah-Hartman, Jiri Slaby, linux-arm-kernel,
linux-samsung-soc, devicetree, linux-kernel, linux-gpio,
linux-pwm, linux-serial
On 23. 11. 9. 17:23, Krzysztof Kozlowski wrote:
> On 09/11/2023 07:28, Uwe Kleine-König wrote:
>> Hello,
>>
>> On Tue, Oct 31, 2023 at 06:47:46PM +0900, Jaewon Kim wrote:
>>> Add samsung,exynosautov920-pwm compatible string to binding document.
>>>
>>> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
>>> ---
>>> Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>>> index 2162f661ed5a..b6beca2ae81e 100644
>>> --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>>> +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
>>> @@ -30,6 +30,7 @@ properties:
>>> - items:
>>> - enum:
>>> - samsung,exynosautov9-pwm
>>> + - samsung,exynosautov920-pwm
>>> - const: samsung,exynos4210-pwm
>> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>>
>> What is the merge plan here? Should this go via the pwm tree, or can it
>> better go via some exynos tree together with the dts files?
> I propose I will take it. I will have conflicting change and keeping
> bindings with DTS together allows smooth dtbs_check.
>
> Best regards,
> Krzysztof
>
>
I also agree it would be better to enter the exynos tree.
Thanks Krzysztof.
Thanks,
Jaewon Kim
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board
2023-10-31 9:47 ` [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board Jaewon Kim
` (9 preceding siblings ...)
[not found] ` <CGME20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd@epcas2p3.samsung.com>
@ 2023-11-13 14:11 ` Linus Walleij
2023-11-13 19:59 ` Krzysztof Kozlowski
10 siblings, 1 reply; 21+ messages in thread
From: Linus Walleij @ 2023-11-13 14:11 UTC (permalink / raw)
To: Jaewon Kim
Cc: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Conor Dooley,
Tomasz Figa, Sylwester Nawrocki, Thierry Reding,
Uwe Kleine-König, Greg Kroah-Hartman, Jiri Slaby,
linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
linux-gpio, linux-pwm, linux-serial
Hi Jaewon,
thanks for your patches!
On Tue, Oct 31, 2023 at 10:50 AM Jaewon Kim <jaewon02.kim@samsung.com> wrote:
> dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding
> pinctrl: samsung: add exynosautv920 pinctrl
It is best if I can apply these two separately once Krzysztof is happy
with them. I hope that would work? I don't see any specific dependencies.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board
2023-11-13 14:11 ` [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board Linus Walleij
@ 2023-11-13 19:59 ` Krzysztof Kozlowski
2023-11-14 12:52 ` Linus Walleij
0 siblings, 1 reply; 21+ messages in thread
From: Krzysztof Kozlowski @ 2023-11-13 19:59 UTC (permalink / raw)
To: Linus Walleij, Jaewon Kim
Cc: Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Thierry Reding, Uwe Kleine-König,
Greg Kroah-Hartman, Jiri Slaby, linux-arm-kernel,
linux-samsung-soc, devicetree, linux-kernel, linux-gpio,
linux-pwm, linux-serial
On 13/11/2023 15:11, Linus Walleij wrote:
> Hi Jaewon,
>
> thanks for your patches!
>
> On Tue, Oct 31, 2023 at 10:50 AM Jaewon Kim <jaewon02.kim@samsung.com> wrote:
>
>> dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding
>> pinctrl: samsung: add exynosautv920 pinctrl
>
> It is best if I can apply these two separately once Krzysztof is happy
> with them. I hope that would work? I don't see any specific dependencies.
That's fine. I might have conflicting pieces in-flight, but then I'll
funnel these through you as well. I can apply these to my
samsung-pinctrl tree and send them to you as usual, unless you prefer to
apply yourself.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board
2023-11-13 19:59 ` Krzysztof Kozlowski
@ 2023-11-14 12:52 ` Linus Walleij
0 siblings, 0 replies; 21+ messages in thread
From: Linus Walleij @ 2023-11-14 12:52 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Jaewon Kim, Alim Akhtar, Rob Herring, Conor Dooley, Tomasz Figa,
Sylwester Nawrocki, Thierry Reding, Uwe Kleine-König,
Greg Kroah-Hartman, Jiri Slaby, linux-arm-kernel,
linux-samsung-soc, devicetree, linux-kernel, linux-gpio,
linux-pwm, linux-serial
On Mon, Nov 13, 2023 at 8:59 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
> On 13/11/2023 15:11, Linus Walleij wrote:
> > Hi Jaewon,
> >
> > thanks for your patches!
> >
> > On Tue, Oct 31, 2023 at 10:50 AM Jaewon Kim <jaewon02.kim@samsung.com> wrote:
> >
> >> dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding
> >> pinctrl: samsung: add exynosautv920 pinctrl
> >
> > It is best if I can apply these two separately once Krzysztof is happy
> > with them. I hope that would work? I don't see any specific dependencies.
>
> That's fine. I might have conflicting pieces in-flight, but then I'll
> funnel these through you as well. I can apply these to my
> samsung-pinctrl tree and send them to you as usual, unless you prefer to
> apply yourself.
Oh that's best of course, you take them when you think they are ready.
I was more referring to that we should be able to merge the two pin control
patches apart from the rest of the series.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2023-11-14 12:53 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
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[not found] <CGME20231031095014epcas2p2814fa2bb5f940ccb0d0951667df34f98@epcas2p2.samsung.com>
2023-10-31 9:47 ` [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board Jaewon Kim
[not found] ` <CGME20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg Jaewon Kim
2023-11-08 7:41 ` Krzysztof Kozlowski
2023-11-09 2:24 ` Jaewon Kim
[not found] ` <CGME20231031095016epcas2p341141f6354ee083be8d95d615c7a63dd@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 02/10] dt-bindings: soc: samsung: usi: add exynosautov920-usi compatible Jaewon Kim
[not found] ` <CGME20231031095016epcas2p4d975f6a3647d24da606ef168c2b234cf@epcas2p4.samsung.com>
2023-10-31 9:47 ` [PATCH 03/10] dt-bindings: serial: samsung: add exynosautov920-uart compatible Jaewon Kim
[not found] ` <CGME20231031095017epcas2p306a504619cbaf1fc260f6c46f8b75dd8@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible Jaewon Kim
2023-11-09 6:28 ` Uwe Kleine-König
2023-11-09 8:23 ` Krzysztof Kozlowski
2023-11-09 8:36 ` Jaewon Kim
[not found] ` <CGME20231031095018epcas2p2e73b59954e76b14c928b7cb94bc3ac60@epcas2p2.samsung.com>
2023-10-31 9:47 ` [PATCH 05/10] dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding Jaewon Kim
[not found] ` <CGME20231031095019epcas2p245cd178dad2d97ccb974a6ba44820a2a@epcas2p2.samsung.com>
2023-10-31 9:47 ` [PATCH 06/10] dt-bindings: arm: samsung: Document exynosautov920 SADK board binding Jaewon Kim
[not found] ` <CGME20231031095020epcas2p1b72264a38832dc2fcb9df8e6b968770f@epcas2p1.samsung.com>
2023-10-31 9:47 ` [PATCH 07/10] soc: samsung: exynos-chipid: add exynosautov920 SoC support Jaewon Kim
[not found] ` <CGME20231031095020epcas2p36f320f3609064b3c906449a2ac517f43@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 08/10] pinctrl: samsung: add exynosautv920 pinctrl Jaewon Kim
[not found] ` <CGME20231031095021epcas2p352c4ace8652d7bf1f74a9b32ab61a913@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC Jaewon Kim
2023-11-08 7:58 ` Krzysztof Kozlowski
2023-11-09 2:33 ` Jaewon Kim
[not found] ` <CGME20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd@epcas2p3.samsung.com>
2023-10-31 9:47 ` [PATCH 10/10] arm64: dts: exynos: add minimal support for exynosautov920 sadk board Jaewon Kim
2023-11-13 14:11 ` [PATCH 00/10] Introduce ExynosAutov920 SoC and SADK board Linus Walleij
2023-11-13 19:59 ` Krzysztof Kozlowski
2023-11-14 12:52 ` Linus Walleij
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