From: Jaehoon Chung <jh80.chung@samsung.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
bhelgaas@google.com, mark.rutland@arm.com, kgene@kernel.org,
krzk@kernel.org, kishon@ti.com, jingoohan1@gmail.com,
vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com,
alim.akhtar@samsung.com, cpgs@samsung.com
Subject: Re: [PATCH 2/4] Documetation: samsung-phy: add the exynos-pcie-phy binding
Date: Wed, 04 Jan 2017 17:18:56 +0900 [thread overview]
Message-ID: <a3b613a7-70e4-a14a-d5b8-f1cff325aefd@samsung.com> (raw)
In-Reply-To: <20170103180507.b7otjrfo4ye3yx42@rob-hp-laptop>
On 01/04/2017 03:05 AM, Rob Herring wrote:
> On Wed, Dec 28, 2016 at 07:34:52PM +0900, Jaehoon Chung wrote:
>> Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
>> This is for using generic PHY framework.
>>
>> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
>> ---
>> .../devicetree/bindings/phy/samsung-phy.txt | 23 ++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> index 9872ba8..1cbc15f 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> @@ -191,3 +191,26 @@ Example:
>> usbdrdphy0 = &usb3_phy0;
>> usbdrdphy1 = &usb3_phy1;
>> };
>> +
>> +Samsung Exynos SoC series PCIe PHY controller
>> +--------------------------------------------------
>> +Required properties:
>> +- compatible : Should be set to "samsung,exynos5440-pcie-phy"
>> +- #phy-cells : Must be zero
>> +- reg : a register used by phy driver.
>> +
>> +Required properies for child node:
>> +- reg : a block register used by phy driver.
>
> There's no need for this. Either just make the length 0x1040 or add a
> 2nd address to the parent reg prop.
Will use the 2nd address to the parent reg prop.
Because there are two pcie-phy for Exynos5440.
one block register is started from 0x271000, the other is started from 0x271040.
Best Regards,
Jaehoon Chung
>
>> +
>> +Example:
>> + pcie_phy0: pcie-phy@270000 {
>> + #phy-cells = <0>;
>> + compatible = "samsung,exynos5440-pcie-phy";
>> + reg = <0x270000 0x1000>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> + block@271000 {
>> + reg = <0x271000 0x40>;
>> + };
>> + };
>> --
>> 2.10.2
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
next prev parent reply other threads:[~2017-01-04 8:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20161228103455epcas1p1c762bc59add0011beff1d4ff697b5c8d@epcas1p1.samsung.com>
2016-12-28 10:34 ` [PATCH 0/4] PCI: exynos: use the PHY generic framework Jaehoon Chung
[not found] ` <CGME20161228103455epcas1p118b44f5a1644ce90eeaa7331f9c4a41c@epcas1p1.samsung.com>
[not found] ` <20161228103454.26467-1-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-28 10:34 ` [PATCH 1/4] phy: exynos-pcie: Add support for Exynos PCIe phy Jaehoon Chung
[not found] ` <CGME20161228103455epcas5p2acc54945d70ac45b2ce2cd4f6ad4b875@epcas5p2.samsung.com>
2016-12-28 10:34 ` [PATCH 2/4] Documetation: samsung-phy: add the exynos-pcie-phy binding Jaehoon Chung
2017-01-03 18:05 ` Rob Herring
2017-01-04 8:18 ` Jaehoon Chung [this message]
[not found] ` <CGME20161228103455epcas5p2b3ea563efc00c776e77477ab3c778bb1@epcas5p2.samsung.com>
2016-12-28 10:34 ` [PATCH 3/4] Documetation: binding: modify the exynos5440 pcie binding Jaehoon Chung
[not found] ` <20161228103454.26467-4-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-01-03 19:51 ` Rob Herring
2017-01-04 8:23 ` Jaehoon Chung
[not found] ` <CGME20161228103455epcas5p2cd50c2389ac3dd49eecb3218ff1dbb16@epcas5p2.samsung.com>
2016-12-28 10:34 ` [PATCH 4/4] ARM: dts: exynos5440: support the phy-pcie node for pcie Jaehoon Chung
2016-12-30 15:56 ` [PATCH 0/4] PCI: exynos: use the PHY generic framework Krzysztof Kozlowski
2017-01-02 9:45 ` Jaehoon Chung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a3b613a7-70e4-a14a-d5b8-f1cff325aefd@samsung.com \
--to=jh80.chung@samsung.com \
--cc=alim.akhtar@samsung.com \
--cc=bhelgaas@google.com \
--cc=cpgs@samsung.com \
--cc=devicetree@vger.kernel.org \
--cc=jingoohan1@gmail.com \
--cc=kgene@kernel.org \
--cc=kishon@ti.com \
--cc=krzk@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=pankaj.dubey@samsung.com \
--cc=robh@kernel.org \
--cc=vivek.gautam@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).