[PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[Matthew Howell]

From: Matthew Howell <matthew.howell@sealevel.com>

FIXES: 7dea8165f1d("serial: exar: Preconfigure xr17v35x MPIOs as output")

Sealevel XR17V35X based devices became inoperable on kernel versions above
4.11 due to the GPIO preconfiguration change introduced in commit
7dea8165f1d. This patch fixes this by preconfiguring the GPIO on Sealevel
cards to the value (0x00) used prior to commit 7dea8165f1d

Signed-off-by: Matthew Howell <matthew.howell@sealevel.com>
---

With GPIOs preconfigured as per commit 7dea8165f1d all ports on Sealevel
XR17V35X based devices become stuck in high impedance mode, regardless of
dip-switch or software configuration. This causes the device to become
effectively unusable. This patch (in various forms) has been distributed
to our customers and no issues related to it have been reported.

This is the first patch I have submitted so please let me know if anything
is incorrect, unclear, or if any changes to the patch are needed and I will
be happy to fix it.

--- linux/drivers/tty/serial/8250/8250_exar.c.orig    2020-07-09 11:05:03.920060577 -0400
+++ linux/drivers/tty/serial/8250/8250_exar.c    2020-07-09 11:05:25.275891627 -0400
@@ -326,7 +326,7 @@ static void setup_gpio(struct pci_dev *p
      * devices will export them as GPIOs, so we pre-configure them safely
      * as inputs.
      */
-    u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
+    u8 dir = (pcidev->vendor == PCI_VENDOR_ID_EXAR && pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL) ? 0xff : 0x00;

     writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
     writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);

Confidentiality Notice This message is intended exclusively for the individual or entity to which it is addressed. This communication may contain information that is PROPRIETARY, TRADE SECRET, PRIVILEGED, CONFIDENTIAL or otherwise legally exempt from disclosure. If you are not the named addressee, you are not authorized to read, print, retain, copy or disseminate this message or any part of it. If you have received this message in error, please notify the sender immediately either by phone (864.843.4343) or reply to this e-mail and delete all copies of this message.

Re: [PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[Greg KH]

On Thu, Jul 09, 2020 at 03:23:37PM -0400, Matthew Howell wrote:
> 
> From: Matthew Howell <matthew.howell@sealevel.com>
> 
> FIXES: 7dea8165f1d("serial: exar: Preconfigure xr17v35x MPIOs as output")

Nit, this should look like:

Fixes: 7dea8165f1d ("serial: exar: Preconfigure xr17v35x MPIOs as output")

and placed down in the signed-off-by area.  I'll fix it up this time...

Re: [PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[Greg KH]

On Thu, Jul 09, 2020 at 03:23:37PM -0400, Matthew Howell wrote:
> 
> From: Matthew Howell <matthew.howell@sealevel.com>
> 
> FIXES: 7dea8165f1d("serial: exar: Preconfigure xr17v35x MPIOs as output")
> 
> Sealevel XR17V35X based devices became inoperable on kernel versions above
> 4.11 due to the GPIO preconfiguration change introduced in commit
> 7dea8165f1d. This patch fixes this by preconfiguring the GPIO on Sealevel
> cards to the value (0x00) used prior to commit 7dea8165f1d
> 
> Signed-off-by: Matthew Howell <matthew.howell@sealevel.com>
> ---
> 
> With GPIOs preconfigured as per commit 7dea8165f1d all ports on Sealevel
> XR17V35X based devices become stuck in high impedance mode, regardless of
> dip-switch or software configuration. This causes the device to become
> effectively unusable. This patch (in various forms) has been distributed
> to our customers and no issues related to it have been reported.
> 
> This is the first patch I have submitted so please let me know if anything
> is incorrect, unclear, or if any changes to the patch are needed and I will
> be happy to fix it.
> 
> --- linux/drivers/tty/serial/8250/8250_exar.c.orig    2020-07-09 11:05:03.920060577 -0400
> +++ linux/drivers/tty/serial/8250/8250_exar.c    2020-07-09 11:05:25.275891627 -0400
> @@ -326,7 +326,7 @@ static void setup_gpio(struct pci_dev *p
>       * devices will export them as GPIOs, so we pre-configure them safely
>       * as inputs.
>       */
> -    u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
> +    u8 dir = (pcidev->vendor == PCI_VENDOR_ID_EXAR && pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL) ? 0xff : 0x00;
> 
>      writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
>      writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
> 
> Confidentiality Notice This message is intended exclusively for the individual or entity to which it is addressed. This communication may contain information that is PROPRIETARY, TRADE SECRET, PRIVILEGED, CONFIDENTIAL or otherwise legally exempt from disclosure. If you are not the named addressee, you are not authorized to read, print, retain, copy or disseminate this message or any part of it. If you have received this message in error, please notify the sender immediately either by phone (864.843.4343) or reply to this e-mail and delete all copies of this message.


Oops, nope, can't take patches with that info in it, sorry, now
deleted...

Re: [PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[Matthew Howell]

Could you clarify what info was not acceptable? And was the whole patch deleted/rejected, or just the
info removed?

Thanks,
Matthew Howell

On 7/10/20 8:41 AM, Greg KH wrote:
> On Thu, Jul 09, 2020 at 03:23:37PM -0400, Matthew Howell wrote:
>>
>> From: Matthew Howell <matthew.howell@sealevel.com>
>>
>> FIXES: 7dea8165f1d("serial: exar: Preconfigure xr17v35x MPIOs as output")
>>
>> Sealevel XR17V35X based devices became inoperable on kernel versions above
>> 4.11 due to the GPIO preconfiguration change introduced in commit
>> 7dea8165f1d. This patch fixes this by preconfiguring the GPIO on Sealevel
>> cards to the value (0x00) used prior to commit 7dea8165f1d
>>
>> Signed-off-by: Matthew Howell <matthew.howell@sealevel.com>
>> ---
>>
>> With GPIOs preconfigured as per commit 7dea8165f1d all ports on Sealevel
>> XR17V35X based devices become stuck in high impedance mode, regardless of
>> dip-switch or software configuration. This causes the device to become
>> effectively unusable. This patch (in various forms) has been distributed
>> to our customers and no issues related to it have been reported.
>>
>> This is the first patch I have submitted so please let me know if anything
>> is incorrect, unclear, or if any changes to the patch are needed and I will
>> be happy to fix it.
>>
>> --- linux/drivers/tty/serial/8250/8250_exar.c.orig    2020-07-09 11:05:03.920060577 -0400
>> +++ linux/drivers/tty/serial/8250/8250_exar.c    2020-07-09 11:05:25.275891627 -0400
>> @@ -326,7 +326,7 @@ static void setup_gpio(struct pci_dev *p
>>       * devices will export them as GPIOs, so we pre-configure them safely
>>       * as inputs.
>>       */
>> -    u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
>> +    u8 dir = (pcidev->vendor == PCI_VENDOR_ID_EXAR && pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL) ? 0xff : 0x00;
>>
>>      writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
>>      writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
>
>
> Oops, nope, can't take patches with that info in it, sorry, now
> deleted...

Confidentiality Notice This message is intended exclusively for the individual or entity to which it is addressed. This communication may contain information that is PROPRIETARY, TRADE SECRET, PRIVILEGED, CONFIDENTIAL or otherwise legally exempt from disclosure. If you are not the named addressee, you are not authorized to read, print, retain, copy or disseminate this message or any part of it. If you have received this message in error, please notify the sender immediately either by phone (864.843.4343) or reply to this e-mail and delete all copies of this message.

Re: [PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

[Greg KH]

On Fri, Jul 10, 2020 at 09:13:19AM -0400, Matthew Howell wrote:
> 
> Could you clarify what info was not acceptable? And was the whole patch deleted/rejected, or just the
> info removed?

Your email footer is not compatible with public kernel development.