From: Akash Asthana <akashast@codeaurora.org>
To: Matthias Kaehlcke <mka@chromium.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, swboyd@chromium.org,
mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, dianders@chromium.org,
evgreen@chromium.org, msavaliy@codeaurora.org
Subject: Re: [PATCH V7 RESEND 0/7] Add interconnect support to QSPI and QUP drivers
Date: Wed, 10 Jun 2020 17:16:59 +0530 [thread overview]
Message-ID: <24d41d90-9bb8-28ec-e6b5-0b5a770bba21@codeaurora.org> (raw)
In-Reply-To: <20200609153802.GS4525@google.com>
Hi Matthias,
On 6/9/2020 9:08 PM, Matthias Kaehlcke wrote:
> Hi Akash,
>
> On Tue, Jun 09, 2020 at 11:26:27AM +0530, Akash Asthana wrote:
>> This patch series is based on tag "next-20200608" of linux-next tree.
> Great, I was concerned there would be conflicts without a rebase.
>
>> Resending V7 patch with minor change in patch 6/7 (QSPI).
> It's not a pure resend, since it has changes in "spi:
> spi-qcom-qspi: Add interconnect support":
>
> Changes in Resend V7:
> - As per Matthias comment removed "unsigned int avg_bw_cpu" from
> struct qcom_qspi as we are using that variable only once.
>
> Please increase the version number whenever you make changes or rebase.
Ok sure.
>
> Maintainers tend to be busy, before doing actual resends folks often
> send a ping/inquiry on the original patch/series, and only resend it when
> they didn't receive a response after some time.
Ok, I was under impression that resending patches is always a better
approach@https://lore.kernel.org/patchwork/patch/1235198/.
Although it vary for every subsystem, I resend the series here to get
approvals on SPI patches.
Regards,
Akash
>
> Thanks
>
> Matthias
>
>> dt-binding patch for QUP drivers.
>> - https://patchwork.kernel.org/patch/11534149/ [Convert QUP bindings
>> to YAML and add ICC, pin swap doc]
>>
>> High level design:
>> - QUP wrapper/common driver.
>> Vote for QUP core on behalf of earlycon from probe.
>> Remove BW vote during earlycon exit call
>>
>> - SERIAL driver.
>> Vote only for CPU/CORE path because driver is in FIFO mode only
>> Vote/unvote from qcom_geni_serial_pm func.
>> Bump up the CPU vote from set_termios call based on real time need
>>
>> - I2C driver.
>> Vote for CORE/CPU/DDR path
>> Vote/unvote from runtime resume/suspend callback
>> As bus speed for I2C is fixed from probe itself no need for bump up.
>>
>> - SPI QUP driver.
>> Vote only for CPU/CORE path because driver is in FIFO mode only
>> Vote/unvote from runtime resume/suspend callback
>> Bump up CPU vote based on real time need per transfer.
>>
>> - QSPI driver.
>> Vote only for CPU path
>> Vote/unvote from runtime resume/suspend callback
>> Bump up CPU vote based on real time need per transfer.
>>
>> Changes in V2:
>> - Add devm_of_icc_get() API interconnect core.
>> - Add ICC support to common driver to fix earlyconsole crash.
>>
>> Changes in V3:
>> - Define common ICC APIs in geni-se driver and use it across geni based
>> I2C,SPI and UART driver.
>>
>> Changes in V4:
>> - Add a patch to ICC core to scale peak requirement
>> as twice of average if it is not mentioned explicilty.
>>
>> Changes in V5:
>> - As per Georgi's suggestion removed patch from ICC core for assuming
>> peak_bw as twice of average when it's not mentioned, instead assume it
>> equall to avg_bw and keep this assumption in ICC client itself.
>> - As per Matthias suggestion use enum for GENI QUP ICC paths.
>>
>> Changes in V6:
>> - No Major change
>>
>> Changes in V7:
>> - As per Matthias's comment removed usage of peak_bw variable because we don't
>> have explicit peak requirement, we were voting peak = avg and this can be
>> tracked using single variable for avg bw.
>> - As per Matthias's comment improved print log.
>>
>> Akash Asthana (7):
>> soc: qcom: geni: Support for ICC voting
>> soc: qcom-geni-se: Add interconnect support to fix earlycon crash
>> i2c: i2c-qcom-geni: Add interconnect support
>> spi: spi-geni-qcom: Add interconnect support
>> tty: serial: qcom_geni_serial: Add interconnect support
>> spi: spi-qcom-qspi: Add interconnect support
>> arm64: dts: sc7180: Add interconnect for QUP and QSPI
>>
>> arch/arm64/boot/dts/qcom/sc7180.dtsi | 127 ++++++++++++++++++++++++++++
>> drivers/i2c/busses/i2c-qcom-geni.c | 26 +++++-
>> drivers/soc/qcom/qcom-geni-se.c | 150 ++++++++++++++++++++++++++++++++++
>> drivers/spi/spi-geni-qcom.c | 29 ++++++-
>> drivers/spi/spi-qcom-qspi.c | 56 ++++++++++++-
>> drivers/tty/serial/qcom_geni_serial.c | 38 ++++++++-
>> include/linux/qcom-geni-se.h | 40 +++++++++
>> 7 files changed, 460 insertions(+), 6 deletions(-)
>>
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
>>
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
prev parent reply other threads:[~2020-06-10 11:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-09 5:56 [PATCH V7 RESEND 0/7] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 1/7] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 2/7] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 3/7] i2c: i2c-qcom-geni: Add interconnect support Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 4/7] spi: spi-geni-qcom: " Akash Asthana
2020-06-09 13:41 ` Mark Brown
2020-06-10 11:27 ` Akash Asthana
2020-06-10 13:53 ` Mark Brown
2020-06-23 5:06 ` Doug Anderson
2020-06-23 10:33 ` Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 5/7] tty: serial: qcom_geni_serial: " Akash Asthana
2020-06-09 5:56 ` [PATCH V7 RESEND 6/7] spi: spi-qcom-qspi: " Akash Asthana
2020-06-15 7:27 ` Akash Asthana
2020-06-15 12:01 ` Mark Brown
2020-06-09 5:56 ` [PATCH V7 RESEND 7/7] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
2020-06-09 15:38 ` [PATCH V7 RESEND 0/7] Add interconnect support to QSPI and QUP drivers Matthias Kaehlcke
2020-06-10 11:46 ` Akash Asthana [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=24d41d90-9bb8-28ec-e6b5-0b5a770bba21@codeaurora.org \
--to=akashast@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=evgreen@chromium.org \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mgautam@codeaurora.org \
--cc=mka@chromium.org \
--cc=msavaliy@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=swboyd@chromium.org \
--cc=wsa@the-dreams.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).