From: Jethro Beekman <jethro@fortanix.com>
To: "Dr. Greg" <greg@enjellic.com>,
Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"x86@kernel.org" <x86@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
"H. Peter Anvin" <hpa@zytor.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Andy Lutomirski <luto@amacapital.net>,
Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
Josh Triplett <josh@joshtriplett.org>,
Haitao Huang <haitao.huang@linux.intel.com>,
"linux-sgx@vger.kernel.org" <linux-sgx@vger.kernel.org>
Subject: Re: [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions
Date: Fri, 7 Dec 2018 18:19:03 +0000 [thread overview]
Message-ID: <f036e41f-8b93-cab3-07fd-641354e60b35@fortanix.com> (raw)
In-Reply-To: <20181207163127.GA23494@wind.enjellic.com>
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On 2018-12-07 22:01, Dr. Greg wrote:
> Baidu and Fortanix are working on Trusted RunTime Systems (TRTS) based
> on RUST, I believe, so this will affect them to the extent that they
> are implementing their own low level enclave runtime support or they
> may be simply building on top of the low level Intel TRTS. Perhaps
> Jethro would comment on these issues if he could.
As far as I know, Baidu merely provides Rust bindings to the Intel SDK.
As far as our requirements, I've sent those in my previous email.
> I'm assuming that in the proposed model the URTS would interrogate the
> VDSO to determine the availability of entry and exception handling
> support and then setup the appropriate infrastructure and exit
> handler? VDSO's are typically the domain of the system library.
> Given the nature of SGX I couldn't even conceive of Glibc offering
> support and, if it was acceptable to provide support, the potential
> timeframe that would be involved in seeing deployment in the field.
>
> As a result, do you anticipate the need for a 'flag day' with respect
> to URTS/PSW/SDK support for all of this?
It is my understanding that the use of the vDSO enclave entry will be
optional. i.e., if your application/library/enclave combination installs
a signal handler and calls ENCLU directly, that would still work. Of
course, using the vDSO will be very strongly recommended.
--
Jethro Beekman | Fortanix
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prev parent reply other threads:[~2018-12-07 18:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181206221922.31012-1-sean.j.christopherson@intel.com>
[not found] ` <20181206221922.31012-5-sean.j.christopherson@intel.com>
[not found] ` <CALCETrXRJ645=08fyeoMQ949fLB1TvhsgERFVx5mAHdViEjq8Q@mail.gmail.com>
2018-12-07 16:51 ` [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions Sean Christopherson
2018-12-07 17:56 ` Andy Lutomirski
2018-12-07 19:02 ` Sean Christopherson
2018-12-07 19:23 ` Andy Lutomirski
2018-12-07 20:09 ` Sean Christopherson
2018-12-07 20:16 ` Andy Lutomirski
2018-12-07 20:35 ` Sean Christopherson
2018-12-07 21:26 ` Sean Christopherson
2018-12-07 23:33 ` Andy Lutomirski
2018-12-11 19:31 ` Sean Christopherson
2018-12-11 20:04 ` Andy Lutomirski
2018-12-11 22:00 ` Sean Christopherson
2018-12-11 23:12 ` Andy Lutomirski
2018-12-07 18:15 ` Jethro Beekman
2018-12-07 18:44 ` Dave Hansen
2018-12-07 18:50 ` Andy Lutomirski
2018-12-08 8:15 ` Jethro Beekman
2018-12-14 15:04 ` Sean Christopherson
[not found] ` <20181207163127.GA23494@wind.enjellic.com>
2018-12-07 18:19 ` Jethro Beekman [this message]
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