From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: "linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"andrew.burgess@embecosm.com" <andrew.burgess@embecosm.com>,
Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
Subject: Re: [PATCH] PR 92846: [ARC] generate signaling FDCMPF for hard float comparisons
Date: Tue, 14 Jan 2020 23:49:51 +0000 [thread overview]
Message-ID: <7264f71a-9a6b-54aa-495f-04cc8702facb@synopsys.com> (raw)
In-Reply-To: <20191209190218.20544-1-vgupta@synopsys.com>
On 12/9/19 11:02 AM, Vineet Gupta wrote:
> ARC gcc generates FDCMP instructions which raises Invalid operation for
> signaling NaN only. This causes glibc iseqsig() primitives to fail (in
> the current ongoing glibc port to ARC)
>
> So split up the hard float compares into two categories and for unordered
> compares generate the FDCMPF instruction (vs. FDCMP) which raises exception
> for either NaNs.
>
> With this fix testsuite/gcc.dg/torture/pr52451.c passes for ARC.
>
> Also passes 6 additional tests in glibc testsuite (test*iseqsig) and no
> regressions
Can this be backported to gcc-9 please ?
glibc testing uses gcc-9
Thx,
-Vineet
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next prev parent reply other threads:[~2020-01-14 23:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-09 19:02 [PATCH] PR 92846: [ARC] generate signaling FDCMPF for hard float comparisons Vineet Gupta
2019-12-10 9:12 ` Claudiu Zissulescu
2019-12-10 22:46 ` Vineet Gupta
2019-12-12 9:40 ` Claudiu Zissulescu Ianculescu
2020-01-14 23:49 ` Vineet Gupta [this message]
2020-01-15 0:06 ` Vineet Gupta
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