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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Rob Herring <robh+dt@kernel.org>,
	Wolfgang Grandegger <wg@grandegger.com>,
	Marc Kleine-Budde <mkl@pengutronix.de>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>, Mark Brown <broonie@kernel.org>,
	Niklas <niklas.soderlund@ragnatech.se>,
	Zhang Rui <rui.zhang@intel.com>,
	Wim Van Sebroeck <wim@linux-watchdog.org>,
	Guenter Roeck <linux@roeck-us.net>,
	Magnus Damm <magnus.damm@gmail.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Amit Kucheria <amit.kucheria@verdurent.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-can@vger.kernel.org,
	netdev@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-watchdog@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 09/20] arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
Date: Wed, 15 Jul 2020 12:08:59 +0100	[thread overview]
Message-ID: <1594811350-14066-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <1594811350-14066-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>

Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 169 +++++++++++++++++++++-
 1 file changed, 168 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index 984ba58c12cd..6ed97187106a 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -626,10 +626,91 @@
 		};
 
 		hscif0: serial@e6540000 {
+			compatible = "renesas,hscif-r8a774e1",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
 			reg = <0 0xe6540000 0 0x60>;
+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 520>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+			       <&dmac2 0x31>, <&dmac2 0x30>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 520>;
 			status = "disabled";
+		};
 
-			/* placeholder */
+		hscif1: serial@e6550000 {
+			compatible = "renesas,hscif-r8a774e1",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe6550000 0 0x60>;
+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 519>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+			       <&dmac2 0x33>, <&dmac2 0x32>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 519>;
+			status = "disabled";
+		};
+
+		hscif2: serial@e6560000 {
+			compatible = "renesas,hscif-r8a774e1",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe6560000 0 0x60>;
+			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 518>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+			       <&dmac2 0x35>, <&dmac2 0x34>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 518>;
+			status = "disabled";
+		};
+
+		hscif3: serial@e66a0000 {
+			compatible = "renesas,hscif-r8a774e1",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe66a0000 0 0x60>;
+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 517>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 517>;
+			status = "disabled";
+		};
+
+		hscif4: serial@e66b0000 {
+			compatible = "renesas,hscif-r8a774e1",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe66b0000 0 0x60>;
+			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 516>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 516>;
+			status = "disabled";
 		};
 
 		hsusb: usb@e6590000 {
@@ -962,6 +1043,40 @@
 			/* placeholder */
 		};
 
+		scif0: serial@e6e60000 {
+			compatible = "renesas,scif-r8a774e1",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6e60000 0 0x40>;
+			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 207>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+			       <&dmac2 0x51>, <&dmac2 0x50>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 207>;
+			status = "disabled";
+		};
+
+		scif1: serial@e6e68000 {
+			compatible = "renesas,scif-r8a774e1",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6e68000 0 0x40>;
+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 206>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+			       <&dmac2 0x53>, <&dmac2 0x52>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 206>;
+			status = "disabled";
+		};
+
 		scif2: serial@e6e88000 {
 			compatible = "renesas,scif-r8a774e1",
 				     "renesas,rcar-gen3-scif", "renesas,scif";
@@ -971,11 +1086,63 @@
 				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 				 <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
+			       <&dmac2 0x13>, <&dmac2 0x12>;
+			dma-names = "tx", "rx", "tx", "rx";
 			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 			resets = <&cpg 310>;
 			status = "disabled";
 		};
 
+		scif3: serial@e6c50000 {
+			compatible = "renesas,scif-r8a774e1",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6c50000 0 0x40>;
+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 204>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 204>;
+			status = "disabled";
+		};
+
+		scif4: serial@e6c40000 {
+			compatible = "renesas,scif-r8a774e1",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6c40000 0 0x40>;
+			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 203>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 203>;
+			status = "disabled";
+		};
+
+		scif5: serial@e6f30000 {
+			compatible = "renesas,scif-r8a774e1",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6f30000 0 0x40>;
+			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 202>,
+				 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
+			       <&dmac2 0x5b>, <&dmac2 0x5a>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+			resets = <&cpg 202>;
+			status = "disabled";
+		};
+
 		rcar_sound: sound@ec500000 {
 			reg = <0 0xec500000 0 0x1000>, /* SCU */
 			      <0 0xec5a0000 0 0x100>,  /* ADG */
-- 
2.17.1


  parent reply	other threads:[~2020-07-15 11:10 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-15 11:08 [PATCH 00/20] Add support for [H]SCIF/TMU/CMT/THS/SDHI/MSIOF/CAN[FD]/I2C/IIC/RWDT on R8A774E1 Lad Prabhakar
2020-07-15 11:08 ` [PATCH 01/20] arm64: dts: renesas: r8a774e1: Add operating points Lad Prabhakar
2020-07-16 15:38   ` Geert Uytterhoeven
2020-07-15 11:08 ` [PATCH 02/20] dt-bindings: thermal: rcar-gen3-thermal: Add r8a774e1 support Lad Prabhakar
2020-07-16 14:16   ` Geert Uytterhoeven
2020-07-17 13:22   ` Niklas
2020-07-21  2:42   ` Rob Herring
2020-08-27 16:52   ` Lad, Prabhakar
2020-09-19 11:05     ` Lad, Prabhakar
2020-09-19 11:25       ` Daniel Lezcano
2020-07-15 11:08 ` [PATCH 03/20] thermal: rcar_gen3_thermal: " Lad Prabhakar
2020-07-16 14:37   ` Geert Uytterhoeven
2020-07-17  4:44   ` Daniel Lezcano
2020-07-17 13:23   ` Niklas
2020-07-15 11:08 ` [PATCH 04/20] arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support Lad Prabhakar
2020-07-16 15:38   ` Geert Uytterhoeven
2020-07-15 11:08 ` [PATCH 05/20] dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support Lad Prabhakar
2020-07-16 14:17   ` Geert Uytterhoeven
2020-07-21  2:42   ` Rob Herring
2020-08-27 17:00   ` Lad, Prabhakar
2020-09-19 11:00     ` Lad, Prabhakar
2020-09-19 11:13       ` Daniel Lezcano
2020-07-15 11:08 ` [PATCH 06/20] arm64: dts: renesas: r8a774e1: Add CMT device nodes Lad Prabhakar
2020-07-16 15:38   ` Geert Uytterhoeven
2020-07-15 11:08 ` [PATCH 07/20] dt-bindings: timer: renesas,tmu: Document r8a774e1 bindings Lad Prabhakar
2020-07-16 14:24   ` Geert Uytterhoeven
2020-07-15 11:08 ` [PATCH 08/20] arm64: dts: renesas: r8a774e1: Add TMU device nodes Lad Prabhakar
2020-07-16 15:38   ` Geert Uytterhoeven
2020-07-15 11:08 ` Lad Prabhakar [this message]
2020-07-16 15:38   ` [PATCH 09/20] arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes Geert Uytterhoeven
2020-07-15 11:09 ` [PATCH 10/20] arm64: dts: renesas: r8a774e1: Add SDHI nodes Lad Prabhakar
2020-07-16 15:39   ` Geert Uytterhoeven
2020-07-15 11:09 ` [PATCH 11/20] dt-bindings: i2c: renesas,i2c: Document r8a774e1 support Lad Prabhakar
2020-07-16 14:25   ` Geert Uytterhoeven
2020-07-21  2:44   ` Rob Herring
2020-07-26 12:35   ` Wolfram Sang
2020-07-15 11:09 ` [PATCH 12/20] dt-bindings: i2c: renesas,iic: " Lad Prabhakar
2020-07-16 14:28   ` Geert Uytterhoeven
2020-07-21  2:44   ` Rob Herring
2020-07-26 12:35   ` Wolfram Sang
2020-07-15 11:09 ` [PATCH 13/20] arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support Lad Prabhakar
2020-07-16 15:39   ` Geert Uytterhoeven
2020-07-15 11:09 ` [PATCH 14/20] dt-bindings: spi: renesas,sh-msiof: Add r8a774e1 support Lad Prabhakar
2020-07-16 14:29   ` Geert Uytterhoeven
2020-07-17 11:59   ` Mark Brown
2020-07-17 12:15     ` Lad, Prabhakar
2020-07-17 12:22       ` Mark Brown
2020-07-21  2:51         ` Rob Herring
2020-07-21  2:51   ` Rob Herring
2020-07-15 11:09 ` [PATCH 15/20] arm64: dts: renesas: r8a774e1: Add MSIOF nodes Lad Prabhakar
2020-07-16 15:39   ` Geert Uytterhoeven
2020-07-15 11:09 ` [PATCH 16/20] dt-bindings: watchdog: renesas,wdt: Document r8a774e1 support Lad Prabhakar
2020-07-16 14:30   ` Geert Uytterhoeven
2020-07-19 13:59   ` Guenter Roeck
2020-07-21  2:52   ` Rob Herring
2020-07-15 11:09 ` [PATCH 17/20] arm64: dts: renesas: r8a774e1: Add RWDT node Lad Prabhakar
2020-07-16 15:39   ` Geert Uytterhoeven
2020-07-15 11:09 ` [PATCH 18/20] dt-bindings: can: rcar_can: Document r8a774e1 support Lad Prabhakar
2020-07-16 14:34   ` Geert Uytterhoeven
2020-07-21  2:52   ` Rob Herring
2020-07-15 11:09 ` [PATCH 19/20] dt-bindings: can: rcar_canfd: " Lad Prabhakar
2020-07-16 14:35   ` Geert Uytterhoeven
2020-07-21  2:53   ` Rob Herring
2020-07-15 11:09 ` [PATCH 20/20] arm64: dts: renesas: r8a774e1: Add CAN[FD] support Lad Prabhakar
2020-07-16 15:39   ` Geert Uytterhoeven
2020-07-20 11:12 ` [PATCH 00/20] Add support for [H]SCIF/TMU/CMT/THS/SDHI/MSIOF/CAN[FD]/I2C/IIC/RWDT on R8A774E1 Mark Brown

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