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From: Vinicius Maciel <viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
Cc: viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
	wens-jdAy2FN1RRM@public.gmane.org,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	siarhei.siamashka-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH v2] ARM: spi/sun7i: Add Master Sample Data Mode for SPI
Date: Sun, 26 Feb 2017 06:10:50 -0800 (PST)	[thread overview]
Message-ID: <186c0f31-01d0-4a1b-889b-a390a57bd1d9@googlegroups.com> (raw)
In-Reply-To: <20170213125239.f5vsxrfwz5t6gqyp-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>


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Em segunda-feira, 13 de fevereiro de 2017 09:52:53 UTC-3, Mark Brown 
escreveu:
>
> This should be controlled by the SPI mode settings, different chips have 
> different requirements.  If the controller supports multiple modes then 
> it should expose that and let the drivers and system integrations 
> choose. 
>
Do you mean SPI_CPHA/SPI_CPOL, right? Well, I don't know how this mode can 
to fit in existing modes. Since this bit is to control when the data will 
be sampled, in the same clock edge or at the edge that is half cycle 
delayed. That has nothing to do with SPI_CPHA/SPI_CPOL.

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  parent reply	other threads:[~2017-02-26 14:10 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-11  3:54 [PATCH v2] ARM: spi/sun7i: Add Master Sample Data Mode for SPI Vinicius Maciel
     [not found] ` <20170211035447.3819-1-viniciusfre-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-02-13  7:12   ` Maxime Ripard
2017-02-13 12:52   ` Mark Brown
     [not found]     ` <20170213125239.f5vsxrfwz5t6gqyp-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2017-02-26 14:10       ` Vinicius Maciel [this message]
     [not found]         ` <186c0f31-01d0-4a1b-889b-a390a57bd1d9-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
2017-03-02 20:44           ` Siarhei Siamashka
2017-03-02 22:00             ` Vinicius Maciel
2017-02-11  6:58 Icenowy Zheng

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