* [PATCH v4 00/14] DMA Engine support for AM33XX
@ 2013-01-11 5:48 Matt Porter
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 5:48 ` [PATCH v4 14/14] ARM: dts: add AM33XX SPI DMA support Matt Porter
0 siblings, 2 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
Changes since v3:
- Rebased on 3.8-rc3
- No longer an RFC
- Fixed bugs in DT/pdata parsing reported by Vaibhav Bedia
- Restored all the Davinci pdata to const
- Removed max_segs hack in favor of using dma_get_channel_caps()
- Fixed extra parens, __raw_* accessors and, ioremap error checks
in xbar handling
- Removed excess license info in platform_data/edma.h
- Removed unneeded reserved channels data for AM33xx
- Removed test-specific pinmuxing from dts files
- Adjusted mmc1 node to be disabled by default in the dtsi
Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
- Added AM33XX crossbar DMA event mux support
- Added am335x-evm support
Changes since v1:
- Rebased on top of mainline from 12250d8
- Dropped the feature removal schedule patch
- Implemented dma_request_slave_channel_compat() and
converted the mmc and spi drivers to use it
- Dropped unneeded #address-cells and #size-cells from
EDMA DT support
- Moved private EDMA header to linux/platform_data/ and
removed some unneeded definitions
- Fixed parsing of optional properties
This series adds DMA Engine support for AM33xx, which uses
an EDMA DMAC. The EDMA DMAC has been previously supported by only
a private API implementation (much like the situation with OMAP
DMA) found on the DaVinci family of SoCs.
The series applies on top of 3.8-rc3 and the following patches:
- TPS65910 REGMAP_IRQ build fix:
https://patchwork.kernel.org/patch/1857701/
- dmaengine DT support from Vinod's dmaengine_dt branch in
git://git.infradead.org/users/vkoul/slave-dma.git since
027478851791df751176398be02a3b1c5f6aa824
- edma dmaengine driver fix:
https://patchwork.kernel.org/patch/1961521/
- dmaengine dma_get_channel_caps v2:
https://patchwork.kernel.org/patch/1961601/
- dmaengine edma driver channel caps support v2:
https://patchwork.kernel.org/patch/1961591/
The approach taken is similar to how OMAP DMA is being converted to
DMA Engine support. With the functional EDMA private API already
existing in mach-davinci/dma.c, we first move that to an ARM common
area so it can be shared. Adding DT and runtime PM support to the
private EDMA API implementation allows it to run on AM33xx. AM33xx
*only* boots using DT so we leverage Jon's generic DT DMA helpers to
register EDMA DMAC with the of_dma framework and then add support
for calling the dma_request_slave_channel() API to both the mmc
and spi drivers.
With this series both BeagleBone and the AM335x EVM have working
MMC and SPI support.
This is tested on BeagleBone with a SPI framebuffer driver and MMC
rootfs. A trivial gpio DMA event misc driver was used to test the
crossbar DMA event support. It is also tested on the AM335x EVM
with the onboard SPI flash and MMC rootfs. The branch at
https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v4
has the complete series, dependencies, and some test
drivers/defconfigs.
Regression testing was done on AM180x-EVM (which also makes use
of the EDMA dmaengine driver and the EDMA private API) using SD,
SPI flash, and the onboard audio supported by the ASoC Davinci
driver. Regression testing was also done on a BeagleBoard xM
booting from the legacy board file using MMC rootfs.
Matt Porter (14):
ARM: davinci: move private EDMA API to arm/common
ARM: edma: remove unused transfer controller handlers
ARM: edma: add AM33XX support to the private EDMA API
dmaengine: edma: enable build for AM33XX
dmaengine: edma: Add TI EDMA device tree binding
ARM: dts: add AM33XX EDMA support
dmaengine: add dma_request_slave_channel_compat()
mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
mmc: omap_hsmmc: set max_segs based on dma engine limitations
mmc: omap_hsmmc: add generic DMA request support to the DT binding
ARM: dts: add AM33XX MMC support
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
spi: omap2-mcspi: add generic DMA request support to the DT binding
ARM: dts: add AM33XX SPI DMA support
Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +-
Documentation/devicetree/bindings/spi/omap-spi.txt | 28 +-
arch/arm/Kconfig | 1 +
arch/arm/boot/dts/am335x-bone.dts | 7 +
arch/arm/boot/dts/am335x-evm.dts | 7 +
arch/arm/boot/dts/am335x-evmsk.dts | 7 +
arch/arm/boot/dts/am33xx.dtsi | 58 +
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/common/edma.c | 1847 ++++++++++++++++++++
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 7 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/dma.c | 1588 -----------------
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/mach-davinci/include/mach/edma.h | 267 ---
arch/arm/plat-omap/Kconfig | 1 +
drivers/dma/Kconfig | 2 +-
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
drivers/mmc/host/omap_hsmmc.c | 16 +-
drivers/spi/spi-omap2-mcspi.c | 65 +-
include/linux/dmaengine.h | 10 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
include/linux/platform_data/edma.h | 183 ++
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 6 +-
37 files changed, 2310 insertions(+), 1900 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
create mode 100644 arch/arm/common/edma.c
delete mode 100644 arch/arm/mach-davinci/dma.c
delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
create mode 100644 include/linux/platform_data/edma.h
--
1.7.9.5
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
@ 2013-01-11 5:48 ` Matt Porter
[not found] ` <1357883330-5364-2-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 5:48 ` [PATCH v4 02/14] ARM: edma: remove unused transfer controller handlers Matt Porter
` (12 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well. This just moves the
private EDMA API and enables it to build on OMAP.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
arch/arm/Kconfig | 1 +
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 7 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/mach-davinci/include/mach/edma.h | 267 ------------------------
arch/arm/plat-omap/Kconfig | 1 +
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
include/linux/platform_data/edma.h | 182 ++++++++++++++++
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 6 +-
25 files changed, 212 insertions(+), 288 deletions(-)
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
create mode 100644 include/linux/platform_data/edma.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67874b8..7637d31 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -932,6 +932,7 @@ config ARCH_DAVINCI
select GENERIC_IRQ_CHIP
select HAVE_IDE
select NEED_MACH_GPIO_H
+ select TI_PRIV_EDMA
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0..9e32d0d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -40,3 +40,6 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
+
+config TI_PRIV_EDMA
+ bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58..d09a39b 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
+obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
similarity index 99%
rename from arch/arm/mach-davinci/dma.c
rename to arch/arm/common/edma.c
index a685e97..4411087 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/slab.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/* Offsets matching "struct edmacc_param" */
#define PARM_OPT 0x00
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa..493a36b 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o psc.o \
- dma.o usb.o common.o sram.o aemif.o
+ usb.o common.o sram.o aemif.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index be30997..86f55ba 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -26,12 +26,12 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/mux.h>
#include <mach/cp_intc.h>
#include <mach/tnetv107x.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544b..d26a6bc 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,9 +23,9 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
-#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 773ab07..ba37760 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -18,10 +18,10 @@
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/platform_data/edma.h>
#include <mach/common.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/tnetv107x.h>
#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36..3bdf9f7 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <mach/edma.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
+#include <linux/platform_data/edma.h>
+
#include "davinci.h"
#include "clock.h"
@@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
},
/* DMA channels: RX, then TX */
{
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
+ .start = EDMA_CTLR_CHAN(0, 26), /* MMCRXEVT */
.flags = IORESOURCE_DMA,
}, {
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
+ .start = EDMA_CTLR_CHAN(0, 27), /* MMCTXEVT */
.flags = IORESOURCE_DMA,
},
};
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b49c3b7..53998d8 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -19,7 +19,6 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
@@ -28,6 +27,7 @@
#include <mach/common.h>
#include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
+#include <linux/platform_data/edma.h>
#include "davinci.h"
#include "clock.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c39805..9b41d33 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 11c79a3..a08910e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index ac7b431..6d52a32 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,11 +13,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 700d311..9d77f9b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
#include <linux/videodev2.h>
#include <mach/serial.h>
-#include <mach/edma.h>
#include <mach/pm.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
deleted file mode 100644
index 7e84c90..0000000
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * TI DAVINCI dma definitions
- *
- * Copyright (C) 2006-2009 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-/*
- * This EDMA3 programming framework exposes two basic kinds of resource:
- *
- * Channel Triggers transfers, usually from a hardware event but
- * also manually or by "chaining" from DMA completions.
- * Each channel is coupled to a Parameter RAM (PaRAM) slot.
- *
- * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
- * "set"), source and destination addresses, a link to a
- * next PaRAM slot (if any), options for the transfer, and
- * instructions for updating those addresses. There are
- * more than twice as many slots as event channels.
- *
- * Each PaRAM set describes a sequence of transfers, either for one large
- * buffer or for several discontiguous smaller buffers. An EDMA transfer
- * is driven only from a channel, which performs the transfers specified
- * in its PaRAM slot until there are no more transfers. When that last
- * transfer completes, the "link" field may be used to reload the channel's
- * PaRAM slot with a new transfer descriptor.
- *
- * The EDMA Channel Controller (CC) maps requests from channels into physical
- * Transfer Controller (TC) requests when the channel triggers (by hardware
- * or software events, or by chaining). The two physical DMA channels provided
- * by the TCs are thus shared by many logical channels.
- *
- * DaVinci hardware also has a "QDMA" mechanism which is not currently
- * supported through this interface. (DSP firmware uses it though.)
- */
-
-#ifndef EDMA_H_
-#define EDMA_H_
-
-/* PaRAM slots are laid out like this */
-struct edmacc_param {
- unsigned int opt;
- unsigned int src;
- unsigned int a_b_cnt;
- unsigned int dst;
- unsigned int src_dst_bidx;
- unsigned int link_bcntrld;
- unsigned int src_dst_cidx;
- unsigned int ccnt;
-};
-
-#define CCINT0_INTERRUPT 16
-#define CCERRINT_INTERRUPT 17
-#define TCERRINT0_INTERRUPT 18
-#define TCERRINT1_INTERRUPT 19
-
-/* fields in edmacc_param.opt */
-#define SAM BIT(0)
-#define DAM BIT(1)
-#define SYNCDIM BIT(2)
-#define STATIC BIT(3)
-#define EDMA_FWID (0x07 << 8)
-#define TCCMODE BIT(11)
-#define EDMA_TCC(t) ((t) << 12)
-#define TCINTEN BIT(20)
-#define ITCINTEN BIT(21)
-#define TCCHEN BIT(22)
-#define ITCCHEN BIT(23)
-
-#define TRWORD (0x7<<2)
-#define PAENTRY (0x1ff<<5)
-
-/* Drivers should avoid using these symbolic names for dm644x
- * channels, and use platform_device IORESOURCE_DMA resources
- * instead. (Other DaVinci chips have different peripherals
- * and thus have different DMA channel mappings.)
- */
-#define DAVINCI_DMA_MCBSP_TX 2
-#define DAVINCI_DMA_MCBSP_RX 3
-#define DAVINCI_DMA_VPSS_HIST 4
-#define DAVINCI_DMA_VPSS_H3A 5
-#define DAVINCI_DMA_VPSS_PRVU 6
-#define DAVINCI_DMA_VPSS_RSZ 7
-#define DAVINCI_DMA_IMCOP_IMXINT 8
-#define DAVINCI_DMA_IMCOP_VLCDINT 9
-#define DAVINCI_DMA_IMCO_PASQINT 10
-#define DAVINCI_DMA_IMCOP_DSQINT 11
-#define DAVINCI_DMA_SPI_SPIX 16
-#define DAVINCI_DMA_SPI_SPIR 17
-#define DAVINCI_DMA_UART0_URXEVT0 18
-#define DAVINCI_DMA_UART0_UTXEVT0 19
-#define DAVINCI_DMA_UART1_URXEVT1 20
-#define DAVINCI_DMA_UART1_UTXEVT1 21
-#define DAVINCI_DMA_UART2_URXEVT2 22
-#define DAVINCI_DMA_UART2_UTXEVT2 23
-#define DAVINCI_DMA_MEMSTK_MSEVT 24
-#define DAVINCI_DMA_MMCRXEVT 26
-#define DAVINCI_DMA_MMCTXEVT 27
-#define DAVINCI_DMA_I2C_ICREVT 28
-#define DAVINCI_DMA_I2C_ICXEVT 29
-#define DAVINCI_DMA_GPIO_GPINT0 32
-#define DAVINCI_DMA_GPIO_GPINT1 33
-#define DAVINCI_DMA_GPIO_GPINT2 34
-#define DAVINCI_DMA_GPIO_GPINT3 35
-#define DAVINCI_DMA_GPIO_GPINT4 36
-#define DAVINCI_DMA_GPIO_GPINT5 37
-#define DAVINCI_DMA_GPIO_GPINT6 38
-#define DAVINCI_DMA_GPIO_GPINT7 39
-#define DAVINCI_DMA_GPIO_GPBNKINT0 40
-#define DAVINCI_DMA_GPIO_GPBNKINT1 41
-#define DAVINCI_DMA_GPIO_GPBNKINT2 42
-#define DAVINCI_DMA_GPIO_GPBNKINT3 43
-#define DAVINCI_DMA_GPIO_GPBNKINT4 44
-#define DAVINCI_DMA_TIMER0_TINT0 48
-#define DAVINCI_DMA_TIMER1_TINT1 49
-#define DAVINCI_DMA_TIMER2_TINT2 50
-#define DAVINCI_DMA_TIMER3_TINT3 51
-#define DAVINCI_DMA_PWM0 52
-#define DAVINCI_DMA_PWM1 53
-#define DAVINCI_DMA_PWM2 54
-
-/* DA830 specific EDMA3 information */
-#define EDMA_DA830_NUM_DMACH 32
-#define EDMA_DA830_NUM_TCC 32
-#define EDMA_DA830_NUM_PARAMENTRY 128
-#define EDMA_DA830_NUM_EVQUE 2
-#define EDMA_DA830_NUM_TC 2
-#define EDMA_DA830_CHMAP_EXIST 0
-#define EDMA_DA830_NUM_REGIONS 4
-#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
-#define DA830_DMACH2EVENT_MAP1 0x00000000u
-#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
-
-/*ch_status paramater of callback function possible values*/
-#define DMA_COMPLETE 1
-#define DMA_CC_ERROR 2
-#define DMA_TC1_ERROR 3
-#define DMA_TC2_ERROR 4
-
-enum address_mode {
- INCR = 0,
- FIFO = 1
-};
-
-enum fifo_width {
- W8BIT = 0,
- W16BIT = 1,
- W32BIT = 2,
- W64BIT = 3,
- W128BIT = 4,
- W256BIT = 5
-};
-
-enum dma_event_q {
- EVENTQ_0 = 0,
- EVENTQ_1 = 1,
- EVENTQ_2 = 2,
- EVENTQ_3 = 3,
- EVENTQ_DEFAULT = -1
-};
-
-enum sync_dimension {
- ASYNC = 0,
- ABSYNC = 1
-};
-
-#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
-#define EDMA_CTLR(i) ((i) >> 16)
-#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
-
-#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
-#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
-#define EDMA_CONT_PARAMS_ANY 1001
-#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
-#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
-
-#define EDMA_MAX_CC 2
-
-/* alloc/free DMA channels and their dedicated parameter RAM slots */
-int edma_alloc_channel(int channel,
- void (*callback)(unsigned channel, u16 ch_status, void *data),
- void *data, enum dma_event_q);
-void edma_free_channel(unsigned channel);
-
-/* alloc/free parameter RAM slots */
-int edma_alloc_slot(unsigned ctlr, int slot);
-void edma_free_slot(unsigned slot);
-
-/* alloc/free a set of contiguous parameter RAM slots */
-int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
-int edma_free_cont_slots(unsigned slot, int count);
-
-/* calls that operate on part of a parameter RAM slot */
-void edma_set_src(unsigned slot, dma_addr_t src_port,
- enum address_mode mode, enum fifo_width);
-void edma_set_dest(unsigned slot, dma_addr_t dest_port,
- enum address_mode mode, enum fifo_width);
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
-void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
-void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
-void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
- u16 bcnt_rld, enum sync_dimension sync_mode);
-void edma_link(unsigned from, unsigned to);
-void edma_unlink(unsigned from);
-
-/* calls that operate on an entire parameter RAM slot */
-void edma_write_slot(unsigned slot, const struct edmacc_param *params);
-void edma_read_slot(unsigned slot, struct edmacc_param *params);
-
-/* channel control operations */
-int edma_start(unsigned channel);
-void edma_stop(unsigned channel);
-void edma_clean_channel(unsigned channel);
-void edma_clear_event(unsigned channel);
-void edma_pause(unsigned channel);
-void edma_resume(unsigned channel);
-
-struct edma_rsv_info {
-
- const s16 (*rsv_chans)[2];
- const s16 (*rsv_slots)[2];
-};
-
-/* platform_data for EDMA driver */
-struct edma_soc_info {
-
- /* how many dma resources of each type */
- unsigned n_channel;
- unsigned n_region;
- unsigned n_slot;
- unsigned n_tc;
- unsigned n_cc;
- /*
- * Default queue is expected to be a low-priority queue.
- * This way, long transfers on the default queue started
- * by the codec engine will not cause audio defects.
- */
- enum dma_event_q default_queue;
-
- /* Resource reservation for other cores */
- struct edma_rsv_info *rsv;
-
- const s8 (*queue_tc_mapping)[2];
- const s8 (*queue_priority_mapping)[2];
-};
-
-#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 665870d..0b81d6c 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -29,6 +29,7 @@ config ARCH_OMAP2PLUS
select PINCTRL
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
+ select TI_PRIV_EDMA
select USE_OF
help
"Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 023c8f2..e57cce3 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -24,7 +24,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#include "dmaengine.h"
#include "virt-dma.h"
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 17e186d..d1efacc 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -35,6 +35,7 @@
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/mmc-davinci.h>
/*
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab6132..7dd6524 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/*
* Register values.
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
new file mode 100644
index 0000000..2344ea2
--- /dev/null
+++ b/include/linux/platform_data/edma.h
@@ -0,0 +1,182 @@
+/*
+ * TI EDMA definitions
+ *
+ * Copyright (C) 2006-2013 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/*
+ * This EDMA3 programming framework exposes two basic kinds of resource:
+ *
+ * Channel Triggers transfers, usually from a hardware event but
+ * also manually or by "chaining" from DMA completions.
+ * Each channel is coupled to a Parameter RAM (PaRAM) slot.
+ *
+ * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
+ * "set"), source and destination addresses, a link to a
+ * next PaRAM slot (if any), options for the transfer, and
+ * instructions for updating those addresses. There are
+ * more than twice as many slots as event channels.
+ *
+ * Each PaRAM set describes a sequence of transfers, either for one large
+ * buffer or for several discontiguous smaller buffers. An EDMA transfer
+ * is driven only from a channel, which performs the transfers specified
+ * in its PaRAM slot until there are no more transfers. When that last
+ * transfer completes, the "link" field may be used to reload the channel's
+ * PaRAM slot with a new transfer descriptor.
+ *
+ * The EDMA Channel Controller (CC) maps requests from channels into physical
+ * Transfer Controller (TC) requests when the channel triggers (by hardware
+ * or software events, or by chaining). The two physical DMA channels provided
+ * by the TCs are thus shared by many logical channels.
+ *
+ * DaVinci hardware also has a "QDMA" mechanism which is not currently
+ * supported through this interface. (DSP firmware uses it though.)
+ */
+
+#ifndef EDMA_H_
+#define EDMA_H_
+
+/* PaRAM slots are laid out like this */
+struct edmacc_param {
+ unsigned int opt;
+ unsigned int src;
+ unsigned int a_b_cnt;
+ unsigned int dst;
+ unsigned int src_dst_bidx;
+ unsigned int link_bcntrld;
+ unsigned int src_dst_cidx;
+ unsigned int ccnt;
+};
+
+/* fields in edmacc_param.opt */
+#define SAM BIT(0)
+#define DAM BIT(1)
+#define SYNCDIM BIT(2)
+#define STATIC BIT(3)
+#define EDMA_FWID (0x07 << 8)
+#define TCCMODE BIT(11)
+#define EDMA_TCC(t) ((t) << 12)
+#define TCINTEN BIT(20)
+#define ITCINTEN BIT(21)
+#define TCCHEN BIT(22)
+#define ITCCHEN BIT(23)
+
+/*ch_status paramater of callback function possible values*/
+#define DMA_COMPLETE 1
+#define DMA_CC_ERROR 2
+#define DMA_TC1_ERROR 3
+#define DMA_TC2_ERROR 4
+
+enum address_mode {
+ INCR = 0,
+ FIFO = 1
+};
+
+enum fifo_width {
+ W8BIT = 0,
+ W16BIT = 1,
+ W32BIT = 2,
+ W64BIT = 3,
+ W128BIT = 4,
+ W256BIT = 5
+};
+
+enum dma_event_q {
+ EVENTQ_0 = 0,
+ EVENTQ_1 = 1,
+ EVENTQ_2 = 2,
+ EVENTQ_3 = 3,
+ EVENTQ_DEFAULT = -1
+};
+
+enum sync_dimension {
+ ASYNC = 0,
+ ABSYNC = 1
+};
+
+#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
+#define EDMA_CTLR(i) ((i) >> 16)
+#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
+
+#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
+#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
+#define EDMA_CONT_PARAMS_ANY 1001
+#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
+#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
+
+#define EDMA_MAX_CC 2
+
+/* alloc/free DMA channels and their dedicated parameter RAM slots */
+int edma_alloc_channel(int channel,
+ void (*callback)(unsigned channel, u16 ch_status, void *data),
+ void *data, enum dma_event_q);
+void edma_free_channel(unsigned channel);
+
+/* alloc/free parameter RAM slots */
+int edma_alloc_slot(unsigned ctlr, int slot);
+void edma_free_slot(unsigned slot);
+
+/* alloc/free a set of contiguous parameter RAM slots */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
+int edma_free_cont_slots(unsigned slot, int count);
+
+/* calls that operate on part of a parameter RAM slot */
+void edma_set_src(unsigned slot, dma_addr_t src_port,
+ enum address_mode mode, enum fifo_width);
+void edma_set_dest(unsigned slot, dma_addr_t dest_port,
+ enum address_mode mode, enum fifo_width);
+void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
+void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
+void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
+ u16 bcnt_rld, enum sync_dimension sync_mode);
+void edma_link(unsigned from, unsigned to);
+void edma_unlink(unsigned from);
+
+/* calls that operate on an entire parameter RAM slot */
+void edma_write_slot(unsigned slot, const struct edmacc_param *params);
+void edma_read_slot(unsigned slot, struct edmacc_param *params);
+
+/* channel control operations */
+int edma_start(unsigned channel);
+void edma_stop(unsigned channel);
+void edma_clean_channel(unsigned channel);
+void edma_clear_event(unsigned channel);
+void edma_pause(unsigned channel);
+void edma_resume(unsigned channel);
+
+struct edma_rsv_info {
+
+ const s16 (*rsv_chans)[2];
+ const s16 (*rsv_slots)[2];
+};
+
+/* platform_data for EDMA driver */
+struct edma_soc_info {
+
+ /* how many dma resources of each type */
+ unsigned n_channel;
+ unsigned n_region;
+ unsigned n_slot;
+ unsigned n_tc;
+ unsigned n_cc;
+ /*
+ * Default queue is expected to be a low-priority queue.
+ * This way, long transfers on the default queue started
+ * by the codec engine will not cause audio defects.
+ */
+ enum dma_event_q default_queue;
+
+ /* Resource reservation for other cores */
+ struct edma_rsv_info *rsv;
+
+ const s8 (*queue_tc_mapping)[2];
+ const s8 (*queue_priority_mapping)[2];
+};
+
+#endif
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b..8dc2fa47 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
#ifndef __ARCH_ARM_DAVINCI_SPI_H
#define __ARCH_ARM_DAVINCI_SPI_H
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#define SPI_INTERN_CS 0xFF
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index d55e647..591f547 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -14,6 +14,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index afab81f..9bdd71b 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -17,6 +17,7 @@
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/genalloc.h>
+#include <linux/platform_data/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index b6ef703..fbb710c 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -14,7 +14,7 @@
#include <linux/genalloc.h>
#include <linux/platform_data/davinci_asp.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */
diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
index 5be65aa..074fc5d 100644
--- a/sound/soc/davinci/davinci-sffsdr.c
+++ b/sound/soc/davinci/davinci-sffsdr.c
@@ -17,6 +17,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -28,7 +29,6 @@
#include <asm/plat-sffsdr/sffsdr-fpga.h>
#endif
-#include <mach/edma.h>
#include "../codecs/pcm3008.h"
#include "davinci-pcm.h"
@@ -123,8 +123,8 @@ static struct resource sffsdr_snd_resources[] = {
};
static struct evm_snd_platform_data sffsdr_snd_data = {
- .tx_dma_ch = DAVINCI_DMA_MCBSP_TX,
- .rx_dma_ch = DAVINCI_DMA_MCBSP_RX,
+ .tx_dma_ch = 2, /* MCBSP_TX */
+ .rx_dma_ch = 3, /* MCBSP_RX */
};
static struct platform_device *sffsdr_snd_device;
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 02/14] ARM: edma: remove unused transfer controller handlers
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 5:48 ` [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 03/14] ARM: edma: add AM33XX support to the private EDMA API Matt Porter
` (11 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
arch/arm/common/edma.c | 37 -------------------------------------
1 file changed, 37 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 4411087..a3d189d 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -494,26 +494,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
return IRQ_HANDLED;
}
-/******************************************************************************
- *
- * Transfer controller error interrupt handlers
- *
- *****************************************************************************/
-
-#define tc_errs_handled false /* disabled as long as they're NOPs */
-
-static irqreturn_t dma_tc0err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc0err_handler\n");
- return IRQ_HANDLED;
-}
-
-static irqreturn_t dma_tc1err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc1err_handler\n");
- return IRQ_HANDLED;
-}
-
static int reserve_contiguous_slots(int ctlr, unsigned int id,
unsigned int num_slots,
unsigned int start_slot)
@@ -1538,23 +1518,6 @@ static int __init edma_probe(struct platform_device *pdev)
arch_num_cc++;
}
- if (tc_errs_handled) {
- status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
- "edma_tc0", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
- IRQ_TCERRINT0, status);
- return status;
- }
- status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
- "edma_tc1", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
- IRQ_TCERRINT, status);
- return status;
- }
- }
-
return 0;
fail:
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 03/14] ARM: edma: add AM33XX support to the private EDMA API
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 5:48 ` [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common Matt Porter
2013-01-11 5:48 ` [PATCH v4 02/14] ARM: edma: remove unused transfer controller handlers Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 18:14 ` [PATCH v4,03/14] " Lars Poeschel
[not found] ` <9fda86bbbec3444393fd5a2dc5135a5e@DFLE73.ent.ti.com>
2013-01-11 5:48 ` [PATCH v4 04/14] dmaengine: edma: enable build for AM33XX Matt Porter
` (10 subsequent siblings)
13 siblings, 2 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform data. Enables runtime PM support to
initialize the EDMA hwmod. Adds AM33XX EMDA crossbar event mux
support.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
arch/arm/common/edma.c | 314 ++++++++++++++++++++++++++++++++++--
include/linux/platform_data/edma.h | 1 +
2 files changed, 306 insertions(+), 9 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a3d189d..1951d63 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -24,6 +24,13 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
+#include <linux/err.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_dma.h>
+#include <linux/of_irq.h>
+#include <linux/pm_runtime.h>
#include <linux/platform_data/edma.h>
@@ -723,6 +730,9 @@ EXPORT_SYMBOL(edma_free_channel);
*/
int edma_alloc_slot(unsigned ctlr, int slot)
{
+ if (!edma_cc[ctlr])
+ return -EINVAL;
+
if (slot >= 0)
slot = EDMA_CHAN_SLOT(slot);
@@ -1366,31 +1376,291 @@ void edma_clear_event(unsigned channel)
EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
+static int edma_of_read_u32_to_s8_array(const struct device_node *np,
+ const char *propname, s8 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+ const char *propname, s16 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_xbar_event_map(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata, int len)
+{
+ int ret = 0;
+ int i;
+ struct resource res;
+ void *xbar;
+ const s16 (*xbar_chans)[2];
+ u32 shift, offset, mux;
+
+ xbar_chans = devm_kzalloc(dev,
+ len/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!xbar_chans)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(node, 1, &res);
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ xbar = devm_ioremap(dev, res.start, resource_size(&res));
+ if (!xbar)
+ return -ENOMEM;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-xbar-event-map",
+ (s16 *)xbar_chans,
+ len/sizeof(u32));
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ for (i = 0; xbar_chans[i][0] != -1; i++) {
+ shift = (xbar_chans[i][1] % 4) * 8;
+ offset = xbar_chans[i][1] >> 2;
+ offset <<= 2;
+ mux = readl((void *)((u32)xbar + offset));
+ mux &= ~(0xff << shift);
+ mux |= xbar_chans[i][0] << shift;
+ writel(mux, (void *)((u32)xbar + offset));
+ }
+
+ pdata->xbar_chans = xbar_chans;
+
+ return 0;
+}
+
+static int edma_of_parse_dt(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata)
+{
+ int ret = 0;
+ u32 value;
+ struct property *prop;
+ size_t sz;
+ struct edma_rsv_info *rsv_info;
+ const s16 (*rsv_chans)[2], (*rsv_slots)[2];
+ const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
+
+ memset(pdata, 0, sizeof(struct edma_soc_info));
+
+ ret = of_property_read_u32(node, "dma-channels", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_channel = value;
+
+ ret = of_property_read_u32(node, "ti,edma-regions", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_region = value;
+
+ ret = of_property_read_u32(node, "ti,edma-slots", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_slot = value;
+
+ pdata->n_cc = 1;
+ pdata->n_tc = 3;
+
+ rsv_info =
+ devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
+ if (!rsv_info)
+ return -ENOMEM;
+ pdata->rsv = rsv_info;
+
+ /* Build the reserved channel/slots arrays */
+ prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
+ if (prop) {
+ rsv_chans = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_chans)
+ return -ENOMEM;
+ pdata->rsv->rsv_chans = rsv_chans;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-channels",
+ (s16 *)rsv_chans,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
+ if (prop) {
+ rsv_slots = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_slots)
+ return -ENOMEM;
+ pdata->rsv->rsv_slots = rsv_slots;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-slots",
+ (s16 *)rsv_slots,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_tc_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_tc_map)
+ return -ENOMEM;
+ pdata->queue_tc_mapping = queue_tc_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_tc_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_priority_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+ pdata->queue_priority_mapping = queue_priority_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_priority_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
+ if (ret < 0)
+ return ret;
+ pdata->default_queue = value;
+
+ prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
+ if (prop)
+ ret = edma_xbar_event_map(dev, node, pdata, sz);
+
+ return ret;
+}
+
+static struct of_dma_filter_info edma_filter_info = {
+ .filter_fn = edma_filter_fn,
+};
static int __init edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
+ struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
+ struct edma_soc_info tmpinfo;
const s8 (*queue_priority_mapping)[2];
const s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
const s16 (*rsv_chans)[2];
const s16 (*rsv_slots)[2];
+ const s16 (*xbar_chans)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
- struct resource *r[EDMA_MAX_CC] = {NULL};
+ struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
+ struct resource res[EDMA_MAX_CC];
resource_size_t len[EDMA_MAX_CC];
char res_name[10];
char irq_name[10];
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ if (node) {
+ info = ninfo;
+ edma_of_parse_dt(dev, node, &tmpinfo);
+ info[0] = &tmpinfo;
+
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev->of_node,
+ of_dma_simple_xlate,
+ &edma_filter_info);
+ }
if (!info)
return -ENODEV;
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ return ret;
+ }
+
for (j = 0; j < EDMA_MAX_CC; j++) {
- sprintf(res_name, "edma_cc%d", j);
- r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ if (!info[j]) {
+ if (!found)
+ return -ENODEV;
+ break;
+ }
+ if (node) {
+ ret = of_address_to_resource(node, j, &res[j]);
+ if (!IS_ERR_VALUE(ret))
+ r[j] = &res[j];
+ } else {
+ sprintf(res_name, "edma_cc%d", j);
+ r[j] = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
res_name);
- if (!r[j] || !info[j]) {
+ }
+ if (!r[j]) {
if (found)
break;
else
@@ -1465,8 +1735,22 @@ static int __init edma_probe(struct platform_device *pdev)
}
}
- sprintf(irq_name, "edma%d", j);
- irq[j] = platform_get_irq_byname(pdev, irq_name);
+ /* Clear the xbar mapped channels in unused list */
+ xbar_chans = info[j]->xbar_chans;
+ if (xbar_chans) {
+ for (i = 0; xbar_chans[i][1] != -1; i++) {
+ off = xbar_chans[i][1];
+ clear_bits(off, 1,
+ edma_cc[j]->edma_unused);
+ }
+ }
+
+ if (node)
+ irq[j] = irq_of_parse_and_map(node, 0);
+ else {
+ sprintf(irq_name, "edma%d", j);
+ irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_start = irq[j];
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
&pdev->dev);
@@ -1476,8 +1760,12 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- sprintf(irq_name, "edma%d_err", j);
- err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ err_irq[j] = irq_of_parse_and_map(node, 2);
+ else {
+ sprintf(irq_name, "edma%d_err", j);
+ err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_end = err_irq[j];
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
"edma_error", &pdev->dev);
@@ -1538,9 +1826,17 @@ fail1:
return status;
}
+static const struct of_device_id edma_of_ids[] = {
+ { .compatible = "ti,edma3", },
+ {}
+};
static struct platform_driver edma_driver = {
- .driver.name = "edma",
+ .driver = {
+ .name = "edma",
+ .of_match_table = edma_of_ids,
+ },
+ .probe = edma_probe,
};
static int __init edma_init(void)
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 2344ea2..ffc1fb2 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -177,6 +177,7 @@ struct edma_soc_info {
const s8 (*queue_tc_mapping)[2];
const s8 (*queue_priority_mapping)[2];
+ const s16 (*xbar_chans)[2];
};
#endif
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 04/14] dmaengine: edma: enable build for AM33XX
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (2 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 03/14] ARM: edma: add AM33XX support to the private EDMA API Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding Matt Porter
` (9 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d4c1218..20ef955 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -221,7 +221,7 @@ config SIRF_DMA
config TI_EDMA
tristate "TI EDMA support"
- depends on ARCH_DAVINCI
+ depends on ARCH_DAVINCI || ARCH_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
default n
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
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http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (3 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 04/14] dmaengine: edma: enable build for AM33XX Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
[not found] ` <1357883330-5364-6-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
[not found] ` <06e6ba0bd8984e1797c84d2926584909@DFLE72.ent.ti.com>
2013-01-11 5:48 ` [PATCH v4 06/14] ARM: dts: add AM33XX EDMA support Matt Porter
` (8 subsequent siblings)
13 siblings, 2 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
new file mode 100644
index 0000000..3344345
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
@@ -0,0 +1,51 @@
+TI EDMA
+
+Required properties:
+- compatible : "ti,edma3"
+- ti,hwmods: Name of the hwmods associated to the EDMA
+- ti,edma-regions: Number of regions
+- ti,edma-slots: Number of slots
+- ti,edma-queue-tc-map: List of transfer control to queue mappings
+- ti,edma-queue-priority-map: List of queue priority mappings
+- ti,edma-default-queue: Default queue value
+
+Optional properties:
+- ti,edma-reserved-channels: List of reserved channel regions
+- ti,edma-reserved-slots: List of reserved slot regions
+- ti,edma-xbar-event-map: Crossbar event to channel map
+
+Example:
+
+edma: edma@49000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x49000000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-reserved-channels = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8>;
+ ti,edma-reserved-slots = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8
+ 64 127>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ ti,edma-xbar-event-map = <1 12
+ 2 13>;
+};
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 06/14] ARM: dts: add AM33XX EDMA support
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (4 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat() Matt Porter
` (7 subsequent siblings)
13 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/am33xx.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index c2f14e8..e711ffb 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -87,6 +87,26 @@
reg = <0x48200000 0x1000>;
};
+ edma: edma@49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ };
+
gpio1: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat()
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (5 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 06/14] ARM: dts: add AM33XX EDMA support Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 17:52 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat() Matt Porter
` (6 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
instantiated via DT, the appropriate channel request call will be
made.
This allows for a much cleaner migration of drivers to the
dmaengine DT API as platforms continue to be mixed between those
that boot using DT and those that do not.
Suggested-by: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
include/linux/dmaengine.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 9fd0c5b..64f9f69 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -1047,6 +1047,16 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
struct dma_chan *net_dma_find_channel(void);
#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
+static inline struct dma_chan
+*dma_request_slave_channel_compat(dma_cap_mask_t mask, dma_filter_fn fn,
+ void *fn_param, struct device *dev,
+ char *name)
+{
+ if (dev->of_node)
+ return dma_request_slave_channel(dev, name);
+ else
+ return dma_request_channel(mask, fn, fn_param);
+}
/* --- Helper iov-locking functions --- */
--
1.7.9.5
------------------------------------------------------------------------------
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much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (6 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat() Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 17:52 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations Matt Porter
` (5 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
drivers/mmc/host/omap_hsmmc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index bc58078..e79b12d 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1915,14 +1915,20 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
- host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &rx_req);
+ host->rx_chan =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &rx_req, &pdev->dev, "rx");
+
if (!host->rx_chan) {
dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req);
ret = -ENXIO;
goto err_irq;
}
- host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &tx_req);
+ host->tx_chan =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &tx_req, &pdev->dev, "tx");
+
if (!host->tx_chan) {
dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req);
ret = -ENXIO;
--
1.7.9.5
------------------------------------------------------------------------------
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much more. Get web development skills now with LearnDevNow -
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (7 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat() Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 17:53 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding Matt Porter
` (4 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
The EDMA DMAC has a hardware limitation that prevents supporting
scatter gather lists with any number of segments. The DMA Engine
API reports the maximum number of segments a channel can support
via the optional dma_get_channel_caps() API. If the nr_segs
capability is present, the value is used to configure mmc->max_segs
appropriately.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
drivers/mmc/host/omap_hsmmc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e79b12d..f74bd69 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1769,6 +1769,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
const struct of_device_id *match;
dma_cap_mask_t mask;
unsigned tx_req, rx_req;
+ struct dmaengine_chan_caps *dma_chan_caps;
struct pinctrl *pinctrl;
match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
@@ -1935,6 +1936,11 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
goto err_irq;
}
+ /* Some DMA Engines only handle a limited number of SG segments */
+ dma_chan_caps = dma_get_channel_caps(host->rx_chan, DMA_DEV_TO_MEM);
+ if (dma_chan_caps && dma_chan_caps->seg_nr)
+ mmc->max_segs = dma_chan_caps->seg_nr;
+
/* Request IRQ for MMC operations */
ret = request_irq(host->irq, omap_hsmmc_irq, 0,
mmc_hostname(mmc), host);
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (8 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 17:54 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 11/14] ARM: dts: add AM33XX MMC support Matt Porter
` (3 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
The binding definition is based on the generic DMA request binding.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index ed271fc..826cc51 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -20,8 +20,28 @@ ti,dual-volt: boolean, supports dual voltage cards
ti,non-removable: non-removable slot (like eMMC)
ti,needs-special-reset: Requires a special softreset sequence
ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
+dmas: DMA controller phandle and DMA request value ordered pair
+One tx and one rx pair is required.
+dma-names: DMA request names. These strings correspond 1:1 with
+the ordered pairs in dmas. The RX request must be "rx" and the
+TX request must be "tx".
+
+Examples:
+
+[hwmod populated DMA resources]
+
+ mmc1: mmc@0x4809c000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x4809c000 0x400>;
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ bus-width = <4>;
+ vmmc-supply = <&vmmc>; /* phandle to regulator node */
+ ti,non-removable;
+ };
+
+[generic DMA request binding]
-Example:
mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
@@ -30,4 +50,7 @@ Example:
bus-width = <4>;
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
+ dmas = <&edma 24
+ &edma 25>;
+ dma-names = "tx", "rx";
};
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 11/14] ARM: dts: add AM33XX MMC support
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (9 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 17:55 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 12/14] spi: omap2-mcspi: convert to dma_request_slave_channel_compat() Matt Porter
` (2 subsequent siblings)
13 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Adds AM33XX MMC support for am335x-bone, am335x-evm, and
am335x-evmsk..
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/am335x-bone.dts | 7 +++++++
arch/arm/boot/dts/am335x-evm.dts | 7 +++++++
arch/arm/boot/dts/am335x-evmsk.dts | 7 +++++++
arch/arm/boot/dts/am33xx.dtsi | 28 ++++++++++++++++++++++++++++
4 files changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 11b240c..a154ce0 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -120,6 +120,8 @@
};
ldo3_reg: regulator@5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
@@ -136,3 +138,8 @@
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&ldo3_reg>;
+};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d649644..2907da6 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -232,6 +232,8 @@
};
vmmc_reg: regulator@12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
@@ -244,3 +246,8 @@
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&vmmc_reg>;
+};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index f5a6162..f050c46 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -244,7 +244,14 @@
};
vmmc_reg: regulator@12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&vmmc_reg>;
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index e711ffb..278b75d 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -235,6 +235,34 @@
status = "disabled";
};
+ mmc1: mmc@48060000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ ti,needs-special-reset;
+ dmas = <&edma 24
+ &edma 25>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ mmc2: mmc@481d8000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc2";
+ ti,needs-special-reset;
+ dmas = <&edma 2
+ &edma 3>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ mmc3: mmc@47810000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc3";
+ ti,needs-special-reset;
+ status = "disabled";
+ };
+
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 12/14] spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (10 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 11/14] ARM: dts: add AM33XX MMC support Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 13/14] spi: omap2-mcspi: add generic DMA request support to the DT binding Matt Porter
2013-01-11 11:40 ` [PATCH v4 00/14] DMA Engine support for AM33XX Arnd Bergmann
13 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
drivers/spi/spi-omap2-mcspi.c | 65 ++++++++++++++++++++++++++++-------------
1 file changed, 45 insertions(+), 20 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index b610f52..2c02c02 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -102,6 +102,9 @@ struct omap2_mcspi_dma {
struct completion dma_tx_completion;
struct completion dma_rx_completion;
+
+ char dma_rx_ch_name[14];
+ char dma_tx_ch_name[14];
};
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
@@ -822,14 +825,23 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = mcspi_dma->dma_rx_sync_dev;
- mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+
+ mcspi_dma->dma_rx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_rx_ch_name);
+
if (!mcspi_dma->dma_rx) {
dev_err(&spi->dev, "no RX DMA engine channel for McSPI\n");
return -EAGAIN;
}
sig = mcspi_dma->dma_tx_sync_dev;
- mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ mcspi_dma->dma_tx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_tx_ch_name);
+
if (!mcspi_dma->dma_tx) {
dev_err(&spi->dev, "no TX DMA engine channel for McSPI\n");
dma_release_channel(mcspi_dma->dma_rx);
@@ -1223,29 +1235,42 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
for (i = 0; i < master->num_chipselect; i++) {
- char dma_ch_name[14];
+ char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
+ char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name;
struct resource *dma_res;
- sprintf(dma_ch_name, "rx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
- status = -ENODEV;
- break;
- }
+ sprintf(dma_rx_ch_name, "rx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_rx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA RX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
- sprintf(dma_ch_name, "tx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
- status = -ENODEV;
- break;
+ mcspi->dma_channels[i].dma_rx_sync_dev =
+ dma_res->start;
}
+ sprintf(dma_tx_ch_name, "tx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_tx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA TX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
+ mcspi->dma_channels[i].dma_tx_sync_dev =
+ dma_res->start;
+ }
}
if (status < 0)
--
1.7.9.5
------------------------------------------------------------------------------
Master HTML5, CSS3, ASP.NET, MVC, AJAX, Knockout.js, Web API and
much more. Get web development skills now with LearnDevNow -
350+ hours of step-by-step video tutorials by Microsoft MVPs and experts.
SALE $99.99 this month only -- learn more at:
http://p.sf.net/sfu/learnmore_122812
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 13/14] spi: omap2-mcspi: add generic DMA request support to the DT binding
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (11 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 12/14] spi: omap2-mcspi: convert to dma_request_slave_channel_compat() Matt Porter
@ 2013-01-11 5:48 ` Matt Porter
2013-01-11 11:40 ` [PATCH v4 00/14] DMA Engine support for AM33XX Arnd Bergmann
13 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List
The binding definition is based on the generic DMA request binding.
Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 28 +++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
index 938809c..3bd8eed 100644
--- a/Documentation/devicetree/bindings/spi/omap-spi.txt
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -10,7 +10,18 @@ Required properties:
input. The default is D0 as input and
D1 as output.
-Example:
+Optional properties:
+- dmas: List of DMA controller phandle and DMA request ordered
+ pairs. One tx and one rx pair is required for each chip
+ select.
+- dma-names: List of DMA request names. These strings correspond
+ 1:1 with the ordered pairs in dmas. The string naming is
+ to be "rxN" and "txN" for RX and TX requests,
+ respectively, where N equals the chip select number.
+
+Examples:
+
+[hwmod populated DMA resources]
mcspi1: mcspi@1 {
#address-cells = <1>;
@@ -20,3 +31,18 @@ mcspi1: mcspi@1 {
ti,spi-num-cs = <4>;
};
+[generic DMA request binding]
+
+mcspi1: mcspi@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <2>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+};
+
--
1.7.9.5
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v4 14/14] ARM: dts: add AM33XX SPI DMA support
2013-01-11 5:48 [PATCH v4 00/14] DMA Engine support for AM33XX Matt Porter
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
@ 2013-01-11 5:48 ` Matt Porter
1 sibling, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 5:48 UTC (permalink / raw)
To: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball
Cc: Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
Adds DMA resources to the AM33XX SPI nodes.
Signed-off-by: Matt Porter <mporter@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 278b75d..8fd3648 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -356,6 +356,11 @@
interrupt = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@@ -367,6 +372,11 @@
interrupt = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 29+ messages in thread
* RE: [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common
[not found] ` <1357883330-5364-2-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
@ 2013-01-11 6:15 ` Hebbar, Gururaja
2013-01-11 14:27 ` Matt Porter
0 siblings, 1 reply; 29+ messages in thread
From: Hebbar, Gururaja @ 2013-01-11 6:15 UTC (permalink / raw)
To: Porter, Matt
Cc: Linux DaVinci Kernel List, Chris Ball, Russell King, Cousson,
Benoit, Arnd Bergmann, Linux Documentation List, Vinod Koul,
Devicetree Discuss, Mark Brown, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Grant Likely,
Tony Lindgren, Rob Landley, Dan Williams, Linux SPI Devel List,
Linux OMAP List
On Fri, Jan 11, 2013 at 11:18:37, Porter, Matt wrote:
> Move mach-davinci/dma.c to common/edma.c so it can be used
> by OMAP (specifically AM33xx) as well. This just moves the
> private EDMA API and enables it to build on OMAP.
>
> Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/common/Kconfig | 3 +
> arch/arm/common/Makefile | 1 +
> arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
> arch/arm/mach-davinci/Makefile | 2 +-
> arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
> arch/arm/mach-davinci/davinci.h | 2 +-
> arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
> arch/arm/mach-davinci/devices.c | 7 +-
> arch/arm/mach-davinci/dm355.c | 2 +-
> arch/arm/mach-davinci/dm365.c | 2 +-
> arch/arm/mach-davinci/dm644x.c | 2 +-
> arch/arm/mach-davinci/dm646x.c | 2 +-
> arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
> arch/arm/mach-davinci/include/mach/edma.h | 267 ------------------------
> arch/arm/plat-omap/Kconfig | 1 +
> drivers/dma/edma.c | 2 +-
> drivers/mmc/host/davinci_mmc.c | 1 +
> include/linux/mfd/davinci_voicecodec.h | 3 +-
> include/linux/platform_data/edma.h | 182 ++++++++++++++++
Headers file are just moved here. So "git mv file1 flie2; and the git
format-patch -C" on commit should just generate few lines of patch.
> include/linux/platform_data/spi-davinci.h | 2 +-
> sound/soc/davinci/davinci-evm.c | 1 +
> sound/soc/davinci/davinci-pcm.c | 1 +
> sound/soc/davinci/davinci-pcm.h | 2 +-
> sound/soc/davinci/davinci-sffsdr.c | 6 +-
> 25 files changed, 212 insertions(+), 288 deletions(-)
> rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
> delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
> create mode 100644 include/linux/platform_data/edma.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 67874b8..7637d31 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -932,6 +932,7 @@ config ARCH_DAVINCI
> select GENERIC_IRQ_CHIP
> select HAVE_IDE
> select NEED_MACH_GPIO_H
> + select TI_PRIV_EDMA
> select USE_OF
> select ZONE_DMA
> help
> diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
> index 45ceeb0..9e32d0d 100644
> --- a/arch/arm/common/Kconfig
> +++ b/arch/arm/common/Kconfig
> @@ -40,3 +40,6 @@ config SHARP_PARAM
>
> config SHARP_SCOOP
> bool
> +
> +config TI_PRIV_EDMA
> + bool
> diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
> index e8a4e58..d09a39b 100644
> --- a/arch/arm/common/Makefile
> +++ b/arch/arm/common/Makefile
> @@ -13,3 +13,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
> obj-$(CONFIG_SHARP_SCOOP) += scoop.o
> obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
> obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
> +obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
> diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
> similarity index 99%
> rename from arch/arm/mach-davinci/dma.c
> rename to arch/arm/common/edma.c
> index a685e97..4411087 100644
> --- a/arch/arm/mach-davinci/dma.c
> +++ b/arch/arm/common/edma.c
> @@ -25,7 +25,7 @@
> #include <linux/io.h>
> #include <linux/slab.h>
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> /* Offsets matching "struct edmacc_param" */
> #define PARM_OPT 0x00
> diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
> index fb5c1aa..493a36b 100644
> --- a/arch/arm/mach-davinci/Makefile
> +++ b/arch/arm/mach-davinci/Makefile
> @@ -5,7 +5,7 @@
>
> # Common objects
> obj-y := time.o clock.o serial.o psc.o \
> - dma.o usb.o common.o sram.o aemif.o
> + usb.o common.o sram.o aemif.o
>
> obj-$(CONFIG_DAVINCI_MUX) += mux.o
>
> diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> index be30997..86f55ba 100644
> --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
> +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> @@ -26,12 +26,12 @@
> #include <linux/input.h>
> #include <linux/input/matrix_keypad.h>
> #include <linux/spi/spi.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/arch.h>
> #include <asm/mach-types.h>
>
> #include <mach/irqs.h>
> -#include <mach/edma.h>
> #include <mach/mux.h>
> #include <mach/cp_intc.h>
> #include <mach/tnetv107x.h>
> diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
> index 12d544b..d26a6bc 100644
> --- a/arch/arm/mach-davinci/davinci.h
> +++ b/arch/arm/mach-davinci/davinci.h
> @@ -23,9 +23,9 @@
> #include <linux/platform_device.h>
> #include <linux/spi/spi.h>
> #include <linux/platform_data/davinci_asp.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/keyscan-davinci.h>
> #include <mach/hardware.h>
> -#include <mach/edma.h>
>
> #include <media/davinci/vpfe_capture.h>
> #include <media/davinci/vpif_types.h>
> diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
> index 773ab07..ba37760 100644
> --- a/arch/arm/mach-davinci/devices-tnetv107x.c
> +++ b/arch/arm/mach-davinci/devices-tnetv107x.c
> @@ -18,10 +18,10 @@
> #include <linux/dma-mapping.h>
> #include <linux/clk.h>
> #include <linux/slab.h>
> +#include <linux/platform_data/edma.h>
>
> #include <mach/common.h>
> #include <mach/irqs.h>
> -#include <mach/edma.h>
> #include <mach/tnetv107x.h>
>
> #include "clock.h"
> diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> index 4c48a36..3bdf9f7 100644
> --- a/arch/arm/mach-davinci/devices.c
> +++ b/arch/arm/mach-davinci/devices.c
> @@ -19,9 +19,10 @@
> #include <mach/irqs.h>
> #include <mach/cputype.h>
> #include <mach/mux.h>
> -#include <mach/edma.h>
> #include <linux/platform_data/mmc-davinci.h>
> #include <mach/time.h>
> +#include <linux/platform_data/edma.h>
> +
>
> #include "davinci.h"
> #include "clock.h"
> @@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
> },
> /* DMA channels: RX, then TX */
> {
> - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
> + .start = EDMA_CTLR_CHAN(0, 26), /* MMCRXEVT */
> .flags = IORESOURCE_DMA,
> }, {
> - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
> + .start = EDMA_CTLR_CHAN(0, 27), /* MMCTXEVT */
> .flags = IORESOURCE_DMA,
> },
> };
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index b49c3b7..53998d8 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -19,7 +19,6 @@
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> #include <mach/irqs.h>
> @@ -28,6 +27,7 @@
> #include <mach/common.h>
> #include <linux/platform_data/spi-davinci.h>
> #include <mach/gpio-davinci.h>
> +#include <linux/platform_data/edma.h>
>
> #include "davinci.h"
> #include "clock.h"
> diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
> index 6c39805..9b41d33 100644
> --- a/arch/arm/mach-davinci/dm365.c
> +++ b/arch/arm/mach-davinci/dm365.c
> @@ -18,11 +18,11 @@
> #include <linux/platform_device.h>
> #include <linux/dma-mapping.h>
> #include <linux/spi/spi.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> #include <mach/irqs.h>
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 11c79a3..a08910e 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -12,11 +12,11 @@
> #include <linux/clk.h>
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/irqs.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index ac7b431..6d52a32 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -13,11 +13,11 @@
> #include <linux/clk.h>
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/irqs.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> index 700d311..9d77f9b 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> @@ -20,8 +20,8 @@
> #include <linux/videodev2.h>
>
> #include <mach/serial.h>
> -#include <mach/edma.h>
> #include <mach/pm.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/i2c-davinci.h>
> #include <linux/platform_data/mmc-davinci.h>
> #include <linux/platform_data/usb-davinci.h>
> diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
> deleted file mode 100644
> index 7e84c90..0000000
> --- a/arch/arm/mach-davinci/include/mach/edma.h
> +++ /dev/null
> @@ -1,267 +0,0 @@
> -/*
> - * TI DAVINCI dma definitions
> - *
> - * Copyright (C) 2006-2009 Texas Instruments.
> - *
> - * This program is free software; you can redistribute it and/or modify it
> - * under the terms of the GNU General Public License as published by the
> - * Free Software Foundation; either version 2 of the License, or (at your
> - * option) any later version.
> - *
> - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
> - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
> - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
> - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
> - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
> - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
> - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> - *
> - * You should have received a copy of the GNU General Public License along
> - * with this program; if not, write to the Free Software Foundation, Inc.,
> - * 675 Mass Ave, Cambridge, MA 02139, USA.
> - *
> - */
> -
> -/*
> - * This EDMA3 programming framework exposes two basic kinds of resource:
> - *
> - * Channel Triggers transfers, usually from a hardware event but
> - * also manually or by "chaining" from DMA completions.
> - * Each channel is coupled to a Parameter RAM (PaRAM) slot.
> - *
> - * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
> - * "set"), source and destination addresses, a link to a
> - * next PaRAM slot (if any), options for the transfer, and
> - * instructions for updating those addresses. There are
> - * more than twice as many slots as event channels.
> - *
> - * Each PaRAM set describes a sequence of transfers, either for one large
> - * buffer or for several discontiguous smaller buffers. An EDMA transfer
> - * is driven only from a channel, which performs the transfers specified
> - * in its PaRAM slot until there are no more transfers. When that last
> - * transfer completes, the "link" field may be used to reload the channel's
> - * PaRAM slot with a new transfer descriptor.
> - *
> - * The EDMA Channel Controller (CC) maps requests from channels into physical
> - * Transfer Controller (TC) requests when the channel triggers (by hardware
> - * or software events, or by chaining). The two physical DMA channels provided
> - * by the TCs are thus shared by many logical channels.
> - *
> - * DaVinci hardware also has a "QDMA" mechanism which is not currently
> - * supported through this interface. (DSP firmware uses it though.)
> - */
> -
> -#ifndef EDMA_H_
> -#define EDMA_H_
> -
> -/* PaRAM slots are laid out like this */
> -struct edmacc_param {
> - unsigned int opt;
> - unsigned int src;
> - unsigned int a_b_cnt;
> - unsigned int dst;
> - unsigned int src_dst_bidx;
> - unsigned int link_bcntrld;
> - unsigned int src_dst_cidx;
> - unsigned int ccnt;
> -};
> -
> -#define CCINT0_INTERRUPT 16
> -#define CCERRINT_INTERRUPT 17
> -#define TCERRINT0_INTERRUPT 18
> -#define TCERRINT1_INTERRUPT 19
> -
> -/* fields in edmacc_param.opt */
> -#define SAM BIT(0)
> -#define DAM BIT(1)
> -#define SYNCDIM BIT(2)
> -#define STATIC BIT(3)
> -#define EDMA_FWID (0x07 << 8)
> -#define TCCMODE BIT(11)
> -#define EDMA_TCC(t) ((t) << 12)
> -#define TCINTEN BIT(20)
> -#define ITCINTEN BIT(21)
> -#define TCCHEN BIT(22)
> -#define ITCCHEN BIT(23)
> -
> -#define TRWORD (0x7<<2)
> -#define PAENTRY (0x1ff<<5)
> -
> -/* Drivers should avoid using these symbolic names for dm644x
> - * channels, and use platform_device IORESOURCE_DMA resources
> - * instead. (Other DaVinci chips have different peripherals
> - * and thus have different DMA channel mappings.)
> - */
> -#define DAVINCI_DMA_MCBSP_TX 2
> -#define DAVINCI_DMA_MCBSP_RX 3
> -#define DAVINCI_DMA_VPSS_HIST 4
> -#define DAVINCI_DMA_VPSS_H3A 5
> -#define DAVINCI_DMA_VPSS_PRVU 6
> -#define DAVINCI_DMA_VPSS_RSZ 7
> -#define DAVINCI_DMA_IMCOP_IMXINT 8
> -#define DAVINCI_DMA_IMCOP_VLCDINT 9
> -#define DAVINCI_DMA_IMCO_PASQINT 10
> -#define DAVINCI_DMA_IMCOP_DSQINT 11
> -#define DAVINCI_DMA_SPI_SPIX 16
> -#define DAVINCI_DMA_SPI_SPIR 17
> -#define DAVINCI_DMA_UART0_URXEVT0 18
> -#define DAVINCI_DMA_UART0_UTXEVT0 19
> -#define DAVINCI_DMA_UART1_URXEVT1 20
> -#define DAVINCI_DMA_UART1_UTXEVT1 21
> -#define DAVINCI_DMA_UART2_URXEVT2 22
> -#define DAVINCI_DMA_UART2_UTXEVT2 23
> -#define DAVINCI_DMA_MEMSTK_MSEVT 24
> -#define DAVINCI_DMA_MMCRXEVT 26
> -#define DAVINCI_DMA_MMCTXEVT 27
> -#define DAVINCI_DMA_I2C_ICREVT 28
> -#define DAVINCI_DMA_I2C_ICXEVT 29
> -#define DAVINCI_DMA_GPIO_GPINT0 32
> -#define DAVINCI_DMA_GPIO_GPINT1 33
> -#define DAVINCI_DMA_GPIO_GPINT2 34
> -#define DAVINCI_DMA_GPIO_GPINT3 35
> -#define DAVINCI_DMA_GPIO_GPINT4 36
> -#define DAVINCI_DMA_GPIO_GPINT5 37
> -#define DAVINCI_DMA_GPIO_GPINT6 38
> -#define DAVINCI_DMA_GPIO_GPINT7 39
> -#define DAVINCI_DMA_GPIO_GPBNKINT0 40
> -#define DAVINCI_DMA_GPIO_GPBNKINT1 41
> -#define DAVINCI_DMA_GPIO_GPBNKINT2 42
> -#define DAVINCI_DMA_GPIO_GPBNKINT3 43
> -#define DAVINCI_DMA_GPIO_GPBNKINT4 44
> -#define DAVINCI_DMA_TIMER0_TINT0 48
> -#define DAVINCI_DMA_TIMER1_TINT1 49
> -#define DAVINCI_DMA_TIMER2_TINT2 50
> -#define DAVINCI_DMA_TIMER3_TINT3 51
> -#define DAVINCI_DMA_PWM0 52
> -#define DAVINCI_DMA_PWM1 53
> -#define DAVINCI_DMA_PWM2 54
> -
> -/* DA830 specific EDMA3 information */
> -#define EDMA_DA830_NUM_DMACH 32
> -#define EDMA_DA830_NUM_TCC 32
> -#define EDMA_DA830_NUM_PARAMENTRY 128
> -#define EDMA_DA830_NUM_EVQUE 2
> -#define EDMA_DA830_NUM_TC 2
> -#define EDMA_DA830_CHMAP_EXIST 0
> -#define EDMA_DA830_NUM_REGIONS 4
> -#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
> -#define DA830_DMACH2EVENT_MAP1 0x00000000u
> -#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
> -
> -/*ch_status paramater of callback function possible values*/
> -#define DMA_COMPLETE 1
> -#define DMA_CC_ERROR 2
> -#define DMA_TC1_ERROR 3
> -#define DMA_TC2_ERROR 4
> -
> -enum address_mode {
> - INCR = 0,
> - FIFO = 1
> -};
> -
> -enum fifo_width {
> - W8BIT = 0,
> - W16BIT = 1,
> - W32BIT = 2,
> - W64BIT = 3,
> - W128BIT = 4,
> - W256BIT = 5
> -};
> -
> -enum dma_event_q {
> - EVENTQ_0 = 0,
> - EVENTQ_1 = 1,
> - EVENTQ_2 = 2,
> - EVENTQ_3 = 3,
> - EVENTQ_DEFAULT = -1
> -};
> -
> -enum sync_dimension {
> - ASYNC = 0,
> - ABSYNC = 1
> -};
> -
> -#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
> -#define EDMA_CTLR(i) ((i) >> 16)
> -#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
> -
> -#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
> -#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
> -#define EDMA_CONT_PARAMS_ANY 1001
> -#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
> -#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
> -
> -#define EDMA_MAX_CC 2
> -
> -/* alloc/free DMA channels and their dedicated parameter RAM slots */
> -int edma_alloc_channel(int channel,
> - void (*callback)(unsigned channel, u16 ch_status, void *data),
> - void *data, enum dma_event_q);
> -void edma_free_channel(unsigned channel);
> -
> -/* alloc/free parameter RAM slots */
> -int edma_alloc_slot(unsigned ctlr, int slot);
> -void edma_free_slot(unsigned slot);
> -
> -/* alloc/free a set of contiguous parameter RAM slots */
> -int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
> -int edma_free_cont_slots(unsigned slot, int count);
> -
> -/* calls that operate on part of a parameter RAM slot */
> -void edma_set_src(unsigned slot, dma_addr_t src_port,
> - enum address_mode mode, enum fifo_width);
> -void edma_set_dest(unsigned slot, dma_addr_t dest_port,
> - enum address_mode mode, enum fifo_width);
> -void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
> -void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
> -void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
> -void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
> - u16 bcnt_rld, enum sync_dimension sync_mode);
> -void edma_link(unsigned from, unsigned to);
> -void edma_unlink(unsigned from);
> -
> -/* calls that operate on an entire parameter RAM slot */
> -void edma_write_slot(unsigned slot, const struct edmacc_param *params);
> -void edma_read_slot(unsigned slot, struct edmacc_param *params);
> -
> -/* channel control operations */
> -int edma_start(unsigned channel);
> -void edma_stop(unsigned channel);
> -void edma_clean_channel(unsigned channel);
> -void edma_clear_event(unsigned channel);
> -void edma_pause(unsigned channel);
> -void edma_resume(unsigned channel);
> -
> -struct edma_rsv_info {
> -
> - const s16 (*rsv_chans)[2];
> - const s16 (*rsv_slots)[2];
> -};
> -
> -/* platform_data for EDMA driver */
> -struct edma_soc_info {
> -
> - /* how many dma resources of each type */
> - unsigned n_channel;
> - unsigned n_region;
> - unsigned n_slot;
> - unsigned n_tc;
> - unsigned n_cc;
> - /*
> - * Default queue is expected to be a low-priority queue.
> - * This way, long transfers on the default queue started
> - * by the codec engine will not cause audio defects.
> - */
> - enum dma_event_q default_queue;
> -
> - /* Resource reservation for other cores */
> - struct edma_rsv_info *rsv;
> -
> - const s8 (*queue_tc_mapping)[2];
> - const s8 (*queue_priority_mapping)[2];
> -};
> -
> -#endif
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 665870d..0b81d6c 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -29,6 +29,7 @@ config ARCH_OMAP2PLUS
> select PINCTRL
> select PROC_DEVICETREE if PROC_FS
> select SPARSE_IRQ
> + select TI_PRIV_EDMA
> select USE_OF
> help
> "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
> index 023c8f2..e57cce3 100644
> --- a/drivers/dma/edma.c
> +++ b/drivers/dma/edma.c
> @@ -24,7 +24,7 @@
> #include <linux/slab.h>
> #include <linux/spinlock.h>
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> #include "dmaengine.h"
> #include "virt-dma.h"
> diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
> index 17e186d..d1efacc 100644
> --- a/drivers/mmc/host/davinci_mmc.c
> +++ b/drivers/mmc/host/davinci_mmc.c
> @@ -35,6 +35,7 @@
> #include <linux/edma.h>
> #include <linux/mmc/mmc.h>
>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/mmc-davinci.h>
>
> /*
> diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
> index 0ab6132..7dd6524 100644
> --- a/include/linux/mfd/davinci_voicecodec.h
> +++ b/include/linux/mfd/davinci_voicecodec.h
> @@ -26,8 +26,7 @@
> #include <linux/kernel.h>
> #include <linux/platform_device.h>
> #include <linux/mfd/core.h>
> -
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> /*
> * Register values.
> diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> new file mode 100644
> index 0000000..2344ea2
> --- /dev/null
> +++ b/include/linux/platform_data/edma.h
> @@ -0,0 +1,182 @@
> +/*
> + * TI EDMA definitions
> + *
> + * Copyright (C) 2006-2013 Texas Instruments.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +/*
> + * This EDMA3 programming framework exposes two basic kinds of resource:
> + *
> + * Channel Triggers transfers, usually from a hardware event but
> + * also manually or by "chaining" from DMA completions.
> + * Each channel is coupled to a Parameter RAM (PaRAM) slot.
> + *
> + * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
> + * "set"), source and destination addresses, a link to a
> + * next PaRAM slot (if any), options for the transfer, and
> + * instructions for updating those addresses. There are
> + * more than twice as many slots as event channels.
> + *
> + * Each PaRAM set describes a sequence of transfers, either for one large
> + * buffer or for several discontiguous smaller buffers. An EDMA transfer
> + * is driven only from a channel, which performs the transfers specified
> + * in its PaRAM slot until there are no more transfers. When that last
> + * transfer completes, the "link" field may be used to reload the channel's
> + * PaRAM slot with a new transfer descriptor.
> + *
> + * The EDMA Channel Controller (CC) maps requests from channels into physical
> + * Transfer Controller (TC) requests when the channel triggers (by hardware
> + * or software events, or by chaining). The two physical DMA channels provided
> + * by the TCs are thus shared by many logical channels.
> + *
> + * DaVinci hardware also has a "QDMA" mechanism which is not currently
> + * supported through this interface. (DSP firmware uses it though.)
> + */
> +
> +#ifndef EDMA_H_
> +#define EDMA_H_
> +
> +/* PaRAM slots are laid out like this */
> +struct edmacc_param {
> + unsigned int opt;
> + unsigned int src;
> + unsigned int a_b_cnt;
> + unsigned int dst;
> + unsigned int src_dst_bidx;
> + unsigned int link_bcntrld;
> + unsigned int src_dst_cidx;
> + unsigned int ccnt;
> +};
> +
> +/* fields in edmacc_param.opt */
> +#define SAM BIT(0)
> +#define DAM BIT(1)
> +#define SYNCDIM BIT(2)
> +#define STATIC BIT(3)
> +#define EDMA_FWID (0x07 << 8)
> +#define TCCMODE BIT(11)
> +#define EDMA_TCC(t) ((t) << 12)
> +#define TCINTEN BIT(20)
> +#define ITCINTEN BIT(21)
> +#define TCCHEN BIT(22)
> +#define ITCCHEN BIT(23)
> +
> +/*ch_status paramater of callback function possible values*/
> +#define DMA_COMPLETE 1
> +#define DMA_CC_ERROR 2
> +#define DMA_TC1_ERROR 3
> +#define DMA_TC2_ERROR 4
> +
> +enum address_mode {
> + INCR = 0,
> + FIFO = 1
> +};
> +
> +enum fifo_width {
> + W8BIT = 0,
> + W16BIT = 1,
> + W32BIT = 2,
> + W64BIT = 3,
> + W128BIT = 4,
> + W256BIT = 5
> +};
> +
> +enum dma_event_q {
> + EVENTQ_0 = 0,
> + EVENTQ_1 = 1,
> + EVENTQ_2 = 2,
> + EVENTQ_3 = 3,
> + EVENTQ_DEFAULT = -1
> +};
> +
> +enum sync_dimension {
> + ASYNC = 0,
> + ABSYNC = 1
> +};
> +
> +#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
> +#define EDMA_CTLR(i) ((i) >> 16)
> +#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
> +
> +#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
> +#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
> +#define EDMA_CONT_PARAMS_ANY 1001
> +#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
> +#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
> +
> +#define EDMA_MAX_CC 2
> +
> +/* alloc/free DMA channels and their dedicated parameter RAM slots */
> +int edma_alloc_channel(int channel,
> + void (*callback)(unsigned channel, u16 ch_status, void *data),
> + void *data, enum dma_event_q);
> +void edma_free_channel(unsigned channel);
> +
> +/* alloc/free parameter RAM slots */
> +int edma_alloc_slot(unsigned ctlr, int slot);
> +void edma_free_slot(unsigned slot);
> +
> +/* alloc/free a set of contiguous parameter RAM slots */
> +int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
> +int edma_free_cont_slots(unsigned slot, int count);
> +
> +/* calls that operate on part of a parameter RAM slot */
> +void edma_set_src(unsigned slot, dma_addr_t src_port,
> + enum address_mode mode, enum fifo_width);
> +void edma_set_dest(unsigned slot, dma_addr_t dest_port,
> + enum address_mode mode, enum fifo_width);
> +void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
> +void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
> +void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
> +void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
> + u16 bcnt_rld, enum sync_dimension sync_mode);
> +void edma_link(unsigned from, unsigned to);
> +void edma_unlink(unsigned from);
> +
> +/* calls that operate on an entire parameter RAM slot */
> +void edma_write_slot(unsigned slot, const struct edmacc_param *params);
> +void edma_read_slot(unsigned slot, struct edmacc_param *params);
> +
> +/* channel control operations */
> +int edma_start(unsigned channel);
> +void edma_stop(unsigned channel);
> +void edma_clean_channel(unsigned channel);
> +void edma_clear_event(unsigned channel);
> +void edma_pause(unsigned channel);
> +void edma_resume(unsigned channel);
> +
> +struct edma_rsv_info {
> +
> + const s16 (*rsv_chans)[2];
> + const s16 (*rsv_slots)[2];
> +};
> +
> +/* platform_data for EDMA driver */
> +struct edma_soc_info {
> +
> + /* how many dma resources of each type */
> + unsigned n_channel;
> + unsigned n_region;
> + unsigned n_slot;
> + unsigned n_tc;
> + unsigned n_cc;
> + /*
> + * Default queue is expected to be a low-priority queue.
> + * This way, long transfers on the default queue started
> + * by the codec engine will not cause audio defects.
> + */
> + enum dma_event_q default_queue;
> +
> + /* Resource reservation for other cores */
> + struct edma_rsv_info *rsv;
> +
> + const s8 (*queue_tc_mapping)[2];
> + const s8 (*queue_priority_mapping)[2];
> +};
> +
> +#endif
> diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
> index 7af305b..8dc2fa47 100644
> --- a/include/linux/platform_data/spi-davinci.h
> +++ b/include/linux/platform_data/spi-davinci.h
> @@ -19,7 +19,7 @@
> #ifndef __ARCH_ARM_DAVINCI_SPI_H
> #define __ARCH_ARM_DAVINCI_SPI_H
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> #define SPI_INTERN_CS 0xFF
>
> diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
> index d55e647..591f547 100644
> --- a/sound/soc/davinci/davinci-evm.c
> +++ b/sound/soc/davinci/davinci-evm.c
> @@ -14,6 +14,7 @@
> #include <linux/timer.h>
> #include <linux/interrupt.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/i2c.h>
> #include <sound/core.h>
> #include <sound/pcm.h>
> diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
> index afab81f..9bdd71b 100644
> --- a/sound/soc/davinci/davinci-pcm.c
> +++ b/sound/soc/davinci/davinci-pcm.c
> @@ -17,6 +17,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/kernel.h>
> #include <linux/genalloc.h>
> +#include <linux/platform_data/edma.h>
>
> #include <sound/core.h>
> #include <sound/pcm.h>
> diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
> index b6ef703..fbb710c 100644
> --- a/sound/soc/davinci/davinci-pcm.h
> +++ b/sound/soc/davinci/davinci-pcm.h
> @@ -14,7 +14,7 @@
>
> #include <linux/genalloc.h>
> #include <linux/platform_data/davinci_asp.h>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> struct davinci_pcm_dma_params {
> int channel; /* sync dma channel ID */
> diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
> index 5be65aa..074fc5d 100644
> --- a/sound/soc/davinci/davinci-sffsdr.c
> +++ b/sound/soc/davinci/davinci-sffsdr.c
> @@ -17,6 +17,7 @@
> #include <linux/timer.h>
> #include <linux/interrupt.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/gpio.h>
> #include <sound/core.h>
> #include <sound/pcm.h>
> @@ -28,7 +29,6 @@
> #include <asm/plat-sffsdr/sffsdr-fpga.h>
> #endif
>
> -#include <mach/edma.h>
>
> #include "../codecs/pcm3008.h"
> #include "davinci-pcm.h"
> @@ -123,8 +123,8 @@ static struct resource sffsdr_snd_resources[] = {
> };
>
> static struct evm_snd_platform_data sffsdr_snd_data = {
> - .tx_dma_ch = DAVINCI_DMA_MCBSP_TX,
> - .rx_dma_ch = DAVINCI_DMA_MCBSP_RX,
> + .tx_dma_ch = 2, /* MCBSP_TX */
> + .rx_dma_ch = 3, /* MCBSP_RX */
> };
>
> static struct platform_device *sffsdr_snd_device;
> --
> 1.7.9.5
>
> _______________________________________________
> Davinci-linux-open-source mailing list
> Davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
>
Regards,
Gururaja
^ permalink raw reply [flat|nested] 29+ messages in thread
* RE: [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding
[not found] ` <1357883330-5364-6-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
@ 2013-01-11 7:54 ` Hebbar, Gururaja
0 siblings, 0 replies; 29+ messages in thread
From: Hebbar, Gururaja @ 2013-01-11 7:54 UTC (permalink / raw)
To: Porter, Matt
Cc: Linux DaVinci Kernel List, Chris Ball, Russell King,
Linux Documentation List, Nori, Sekhar, Devicetree Discuss,
Mark Brown, Linux MMC List, Linux Kernel Mailing List,
Rob Herring, Vinod Koul, Dan Williams, Linux SPI Devel List,
Linux OMAP List, Linux ARM Kernel List
On Fri, Jan 11, 2013 at 11:18:41, Porter, Matt wrote:
> The binding definition is based on the generic DMA controller
> binding.
>
> Signed-off-by: Matt Porter <mporter-l0cyMroinI0@public.gmane.org>
> ---
> Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +++++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> new file mode 100644
> index 0000000..3344345
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> @@ -0,0 +1,51 @@
> +TI EDMA
> +
> +Required properties:
> +- compatible : "ti,edma3"
> +- ti,hwmods: Name of the hwmods associated to the EDMA
> +- ti,edma-regions: Number of regions
> +- ti,edma-slots: Number of slots
> +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> +- ti,edma-queue-priority-map: List of queue priority mappings
> +- ti,edma-default-queue: Default queue value
> +
> +Optional properties:
> +- ti,edma-reserved-channels: List of reserved channel regions
> +- ti,edma-reserved-slots: List of reserved slot regions
> +- ti,edma-xbar-event-map: Crossbar event to channel map
> +
> +Example:
> +
> +edma: edma@49000000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
address-cells & size-cells are only required when current node is a parent
node & it has sibling/child nodes (that too if the child node uses "reg"
property).
> + reg = <0x49000000 0x10000>;
> + interrupt-parent = <&intc>;
> + interrupts = <12 13 14>;
> + compatible = "ti,edma3";
> + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
> + #dma-cells = <1>;
> + dma-channels = <64>;
> + ti,edma-regions = <4>;
> + ti,edma-slots = <256>;
> + ti,edma-reserved-channels = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8>;
> + ti,edma-reserved-slots = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8
> + 64 127>;
> + ti,edma-queue-tc-map = <0 0
> + 1 1
> + 2 2>;
> + ti,edma-queue-priority-map = <0 0
> + 1 1
> + 2 2>;
> + ti,edma-default-queue = <0>;
> + ti,edma-xbar-event-map = <1 12
> + 2 13>;
> +};
> --
> 1.7.9.5
>
> _______________________________________________
> Davinci-linux-open-source mailing list
> Davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
>
Regards,
Gururaja
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 00/14] DMA Engine support for AM33XX
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
` (12 preceding siblings ...)
2013-01-11 5:48 ` [PATCH v4 13/14] spi: omap2-mcspi: add generic DMA request support to the DT binding Matt Porter
@ 2013-01-11 11:40 ` Arnd Bergmann
2013-01-11 18:33 ` Matt Porter
13 siblings, 1 reply; 29+ messages in thread
From: Arnd Bergmann @ 2013-01-11 11:40 UTC (permalink / raw)
To: Matt Porter
Cc: Linux DaVinci Kernel List, Linux OMAP List, Russell King,
Linux Documentation List, Linux MMC List, Devicetree Discuss,
Mark Brown, Sekhar Nori, Linux Kernel Mailing List, Rob Herring,
Vinod Koul, Dan Williams, Linux SPI Devel List, Chris Ball,
Linux ARM Kernel List
On Friday 11 January 2013, Matt Porter wrote:
> The approach taken is similar to how OMAP DMA is being converted to
> DMA Engine support. With the functional EDMA private API already
> existing in mach-davinci/dma.c, we first move that to an ARM common
> area so it can be shared. Adding DT and runtime PM support to the
> private EDMA API implementation allows it to run on AM33xx. AM33xx
> only boots using DT so we leverage Jon's generic DT DMA helpers to
> register EDMA DMAC with the of_dma framework and then add support
> for calling the dma_request_slave_channel() API to both the mmc
> and spi drivers.
I think this looks very good. What I wonder is whether we should
make the non-DT parts of the dmaengine driver compile-time
conditional on CONFIG_ATAGS though, so the slave drivers don't
have a link-time dependency on the dmaengine driver's
omap_dma_filter_fn symbol when building without ATAGS support.
Arnd
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common
2013-01-11 6:15 ` Hebbar, Gururaja
@ 2013-01-11 14:27 ` Matt Porter
0 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 14:27 UTC (permalink / raw)
To: Hebbar, Gururaja
Cc: Linux DaVinci Kernel List, Chris Ball, Russell King, Cousson,
Benoit, Arnd Bergmann, Linux Documentation List, Vinod Koul,
Devicetree Discuss, Mark Brown, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Grant Likely,
Tony Lindgren, Rob Landley, Dan Williams, Linux SPI Devel List,
Linux OMAP List, Linux ARM Kernel List
On Fri, Jan 11, 2013 at 06:15:06AM +0000, Hebbar, Gururaja wrote:
> On Fri, Jan 11, 2013 at 11:18:37, Porter, Matt wrote:
> > Move mach-davinci/dma.c to common/edma.c so it can be used
> > by OMAP (specifically AM33xx) as well. This just moves the
> > private EDMA API and enables it to build on OMAP.
> >
> > Signed-off-by: Matt Porter <mporter@ti.com>
> > ---
> > arch/arm/Kconfig | 1 +
> > arch/arm/common/Kconfig | 3 +
> > arch/arm/common/Makefile | 1 +
> > arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
> > arch/arm/mach-davinci/Makefile | 2 +-
> > arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
> > arch/arm/mach-davinci/davinci.h | 2 +-
> > arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
> > arch/arm/mach-davinci/devices.c | 7 +-
> > arch/arm/mach-davinci/dm355.c | 2 +-
> > arch/arm/mach-davinci/dm365.c | 2 +-
> > arch/arm/mach-davinci/dm644x.c | 2 +-
> > arch/arm/mach-davinci/dm646x.c | 2 +-
> > arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
> > arch/arm/mach-davinci/include/mach/edma.h | 267 ------------------------
> > arch/arm/plat-omap/Kconfig | 1 +
> > drivers/dma/edma.c | 2 +-
> > drivers/mmc/host/davinci_mmc.c | 1 +
> > include/linux/mfd/davinci_voicecodec.h | 3 +-
> > include/linux/platform_data/edma.h | 182 ++++++++++++++++
>
> Headers file are just moved here. So "git mv file1 flie2; and the git
> format-patch -C" on commit should just generate few lines of patch.
Ok, good catch.
>
> > include/linux/platform_data/spi-davinci.h | 2 +-
> > sound/soc/davinci/davinci-evm.c | 1 +
> > sound/soc/davinci/davinci-pcm.c | 1 +
> > sound/soc/davinci/davinci-pcm.h | 2 +-
> > sound/soc/davinci/davinci-sffsdr.c | 6 +-
> > 25 files changed, 212 insertions(+), 288 deletions(-)
> > rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
> > delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
> > create mode 100644 include/linux/platform_data/edma.h
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index 67874b8..7637d31 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -932,6 +932,7 @@ config ARCH_DAVINCI
> > select GENERIC_IRQ_CHIP
> > select HAVE_IDE
> > select NEED_MACH_GPIO_H
> > + select TI_PRIV_EDMA
> > select USE_OF
> > select ZONE_DMA
> > help
> > diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
> > index 45ceeb0..9e32d0d 100644
> > --- a/arch/arm/common/Kconfig
> > +++ b/arch/arm/common/Kconfig
> > @@ -40,3 +40,6 @@ config SHARP_PARAM
> >
> > config SHARP_SCOOP
> > bool
> > +
> > +config TI_PRIV_EDMA
> > + bool
> > diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
> > index e8a4e58..d09a39b 100644
> > --- a/arch/arm/common/Makefile
> > +++ b/arch/arm/common/Makefile
> > @@ -13,3 +13,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
> > obj-$(CONFIG_SHARP_SCOOP) += scoop.o
> > obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
> > obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
> > +obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
> > diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
> > similarity index 99%
> > rename from arch/arm/mach-davinci/dma.c
> > rename to arch/arm/common/edma.c
> > index a685e97..4411087 100644
> > --- a/arch/arm/mach-davinci/dma.c
> > +++ b/arch/arm/common/edma.c
> > @@ -25,7 +25,7 @@
> > #include <linux/io.h>
> > #include <linux/slab.h>
> >
> > -#include <mach/edma.h>
> > +#include <linux/platform_data/edma.h>
> >
> > /* Offsets matching "struct edmacc_param" */
> > #define PARM_OPT 0x00
> > diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
> > index fb5c1aa..493a36b 100644
> > --- a/arch/arm/mach-davinci/Makefile
> > +++ b/arch/arm/mach-davinci/Makefile
> > @@ -5,7 +5,7 @@
> >
> > # Common objects
> > obj-y := time.o clock.o serial.o psc.o \
> > - dma.o usb.o common.o sram.o aemif.o
> > + usb.o common.o sram.o aemif.o
> >
> > obj-$(CONFIG_DAVINCI_MUX) += mux.o
> >
> > diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> > index be30997..86f55ba 100644
> > --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
> > +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> > @@ -26,12 +26,12 @@
> > #include <linux/input.h>
> > #include <linux/input/matrix_keypad.h>
> > #include <linux/spi/spi.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <asm/mach/arch.h>
> > #include <asm/mach-types.h>
> >
> > #include <mach/irqs.h>
> > -#include <mach/edma.h>
> > #include <mach/mux.h>
> > #include <mach/cp_intc.h>
> > #include <mach/tnetv107x.h>
> > diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
> > index 12d544b..d26a6bc 100644
> > --- a/arch/arm/mach-davinci/davinci.h
> > +++ b/arch/arm/mach-davinci/davinci.h
> > @@ -23,9 +23,9 @@
> > #include <linux/platform_device.h>
> > #include <linux/spi/spi.h>
> > #include <linux/platform_data/davinci_asp.h>
> > +#include <linux/platform_data/edma.h>
> > #include <linux/platform_data/keyscan-davinci.h>
> > #include <mach/hardware.h>
> > -#include <mach/edma.h>
> >
> > #include <media/davinci/vpfe_capture.h>
> > #include <media/davinci/vpif_types.h>
> > diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
> > index 773ab07..ba37760 100644
> > --- a/arch/arm/mach-davinci/devices-tnetv107x.c
> > +++ b/arch/arm/mach-davinci/devices-tnetv107x.c
> > @@ -18,10 +18,10 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/clk.h>
> > #include <linux/slab.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <mach/common.h>
> > #include <mach/irqs.h>
> > -#include <mach/edma.h>
> > #include <mach/tnetv107x.h>
> >
> > #include "clock.h"
> > diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> > index 4c48a36..3bdf9f7 100644
> > --- a/arch/arm/mach-davinci/devices.c
> > +++ b/arch/arm/mach-davinci/devices.c
> > @@ -19,9 +19,10 @@
> > #include <mach/irqs.h>
> > #include <mach/cputype.h>
> > #include <mach/mux.h>
> > -#include <mach/edma.h>
> > #include <linux/platform_data/mmc-davinci.h>
> > #include <mach/time.h>
> > +#include <linux/platform_data/edma.h>
> > +
> >
> > #include "davinci.h"
> > #include "clock.h"
> > @@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
> > },
> > /* DMA channels: RX, then TX */
> > {
> > - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
> > + .start = EDMA_CTLR_CHAN(0, 26), /* MMCRXEVT */
> > .flags = IORESOURCE_DMA,
> > }, {
> > - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
> > + .start = EDMA_CTLR_CHAN(0, 27), /* MMCTXEVT */
> > .flags = IORESOURCE_DMA,
> > },
> > };
> > diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> > index b49c3b7..53998d8 100644
> > --- a/arch/arm/mach-davinci/dm355.c
> > +++ b/arch/arm/mach-davinci/dm355.c
> > @@ -19,7 +19,6 @@
> > #include <asm/mach/map.h>
> >
> > #include <mach/cputype.h>
> > -#include <mach/edma.h>
> > #include <mach/psc.h>
> > #include <mach/mux.h>
> > #include <mach/irqs.h>
> > @@ -28,6 +27,7 @@
> > #include <mach/common.h>
> > #include <linux/platform_data/spi-davinci.h>
> > #include <mach/gpio-davinci.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include "davinci.h"
> > #include "clock.h"
> > diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
> > index 6c39805..9b41d33 100644
> > --- a/arch/arm/mach-davinci/dm365.c
> > +++ b/arch/arm/mach-davinci/dm365.c
> > @@ -18,11 +18,11 @@
> > #include <linux/platform_device.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/spi/spi.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <asm/mach/map.h>
> >
> > #include <mach/cputype.h>
> > -#include <mach/edma.h>
> > #include <mach/psc.h>
> > #include <mach/mux.h>
> > #include <mach/irqs.h>
> > diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> > index 11c79a3..a08910e 100644
> > --- a/arch/arm/mach-davinci/dm644x.c
> > +++ b/arch/arm/mach-davinci/dm644x.c
> > @@ -12,11 +12,11 @@
> > #include <linux/clk.h>
> > #include <linux/serial_8250.h>
> > #include <linux/platform_device.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <asm/mach/map.h>
> >
> > #include <mach/cputype.h>
> > -#include <mach/edma.h>
> > #include <mach/irqs.h>
> > #include <mach/psc.h>
> > #include <mach/mux.h>
> > diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> > index ac7b431..6d52a32 100644
> > --- a/arch/arm/mach-davinci/dm646x.c
> > +++ b/arch/arm/mach-davinci/dm646x.c
> > @@ -13,11 +13,11 @@
> > #include <linux/clk.h>
> > #include <linux/serial_8250.h>
> > #include <linux/platform_device.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <asm/mach/map.h>
> >
> > #include <mach/cputype.h>
> > -#include <mach/edma.h>
> > #include <mach/irqs.h>
> > #include <mach/psc.h>
> > #include <mach/mux.h>
> > diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> > index 700d311..9d77f9b 100644
> > --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> > +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> > @@ -20,8 +20,8 @@
> > #include <linux/videodev2.h>
> >
> > #include <mach/serial.h>
> > -#include <mach/edma.h>
> > #include <mach/pm.h>
> > +#include <linux/platform_data/edma.h>
> > #include <linux/platform_data/i2c-davinci.h>
> > #include <linux/platform_data/mmc-davinci.h>
> > #include <linux/platform_data/usb-davinci.h>
> > diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
> > deleted file mode 100644
> > index 7e84c90..0000000
> > --- a/arch/arm/mach-davinci/include/mach/edma.h
> > +++ /dev/null
> > @@ -1,267 +0,0 @@
> > -/*
> > - * TI DAVINCI dma definitions
> > - *
> > - * Copyright (C) 2006-2009 Texas Instruments.
> > - *
> > - * This program is free software; you can redistribute it and/or modify it
> > - * under the terms of the GNU General Public License as published by the
> > - * Free Software Foundation; either version 2 of the License, or (at your
> > - * option) any later version.
> > - *
> > - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
> > - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
> > - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
> > - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
> > - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
> > - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
> > - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> > - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> > - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> > - *
> > - * You should have received a copy of the GNU General Public License along
> > - * with this program; if not, write to the Free Software Foundation, Inc.,
> > - * 675 Mass Ave, Cambridge, MA 02139, USA.
> > - *
> > - */
> > -
> > -/*
> > - * This EDMA3 programming framework exposes two basic kinds of resource:
> > - *
> > - * Channel Triggers transfers, usually from a hardware event but
> > - * also manually or by "chaining" from DMA completions.
> > - * Each channel is coupled to a Parameter RAM (PaRAM) slot.
> > - *
> > - * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
> > - * "set"), source and destination addresses, a link to a
> > - * next PaRAM slot (if any), options for the transfer, and
> > - * instructions for updating those addresses. There are
> > - * more than twice as many slots as event channels.
> > - *
> > - * Each PaRAM set describes a sequence of transfers, either for one large
> > - * buffer or for several discontiguous smaller buffers. An EDMA transfer
> > - * is driven only from a channel, which performs the transfers specified
> > - * in its PaRAM slot until there are no more transfers. When that last
> > - * transfer completes, the "link" field may be used to reload the channel's
> > - * PaRAM slot with a new transfer descriptor.
> > - *
> > - * The EDMA Channel Controller (CC) maps requests from channels into physical
> > - * Transfer Controller (TC) requests when the channel triggers (by hardware
> > - * or software events, or by chaining). The two physical DMA channels provided
> > - * by the TCs are thus shared by many logical channels.
> > - *
> > - * DaVinci hardware also has a "QDMA" mechanism which is not currently
> > - * supported through this interface. (DSP firmware uses it though.)
> > - */
> > -
> > -#ifndef EDMA_H_
> > -#define EDMA_H_
> > -
> > -/* PaRAM slots are laid out like this */
> > -struct edmacc_param {
> > - unsigned int opt;
> > - unsigned int src;
> > - unsigned int a_b_cnt;
> > - unsigned int dst;
> > - unsigned int src_dst_bidx;
> > - unsigned int link_bcntrld;
> > - unsigned int src_dst_cidx;
> > - unsigned int ccnt;
> > -};
> > -
> > -#define CCINT0_INTERRUPT 16
> > -#define CCERRINT_INTERRUPT 17
> > -#define TCERRINT0_INTERRUPT 18
> > -#define TCERRINT1_INTERRUPT 19
> > -
> > -/* fields in edmacc_param.opt */
> > -#define SAM BIT(0)
> > -#define DAM BIT(1)
> > -#define SYNCDIM BIT(2)
> > -#define STATIC BIT(3)
> > -#define EDMA_FWID (0x07 << 8)
> > -#define TCCMODE BIT(11)
> > -#define EDMA_TCC(t) ((t) << 12)
> > -#define TCINTEN BIT(20)
> > -#define ITCINTEN BIT(21)
> > -#define TCCHEN BIT(22)
> > -#define ITCCHEN BIT(23)
> > -
> > -#define TRWORD (0x7<<2)
> > -#define PAENTRY (0x1ff<<5)
> > -
> > -/* Drivers should avoid using these symbolic names for dm644x
> > - * channels, and use platform_device IORESOURCE_DMA resources
> > - * instead. (Other DaVinci chips have different peripherals
> > - * and thus have different DMA channel mappings.)
> > - */
> > -#define DAVINCI_DMA_MCBSP_TX 2
> > -#define DAVINCI_DMA_MCBSP_RX 3
> > -#define DAVINCI_DMA_VPSS_HIST 4
> > -#define DAVINCI_DMA_VPSS_H3A 5
> > -#define DAVINCI_DMA_VPSS_PRVU 6
> > -#define DAVINCI_DMA_VPSS_RSZ 7
> > -#define DAVINCI_DMA_IMCOP_IMXINT 8
> > -#define DAVINCI_DMA_IMCOP_VLCDINT 9
> > -#define DAVINCI_DMA_IMCO_PASQINT 10
> > -#define DAVINCI_DMA_IMCOP_DSQINT 11
> > -#define DAVINCI_DMA_SPI_SPIX 16
> > -#define DAVINCI_DMA_SPI_SPIR 17
> > -#define DAVINCI_DMA_UART0_URXEVT0 18
> > -#define DAVINCI_DMA_UART0_UTXEVT0 19
> > -#define DAVINCI_DMA_UART1_URXEVT1 20
> > -#define DAVINCI_DMA_UART1_UTXEVT1 21
> > -#define DAVINCI_DMA_UART2_URXEVT2 22
> > -#define DAVINCI_DMA_UART2_UTXEVT2 23
> > -#define DAVINCI_DMA_MEMSTK_MSEVT 24
> > -#define DAVINCI_DMA_MMCRXEVT 26
> > -#define DAVINCI_DMA_MMCTXEVT 27
> > -#define DAVINCI_DMA_I2C_ICREVT 28
> > -#define DAVINCI_DMA_I2C_ICXEVT 29
> > -#define DAVINCI_DMA_GPIO_GPINT0 32
> > -#define DAVINCI_DMA_GPIO_GPINT1 33
> > -#define DAVINCI_DMA_GPIO_GPINT2 34
> > -#define DAVINCI_DMA_GPIO_GPINT3 35
> > -#define DAVINCI_DMA_GPIO_GPINT4 36
> > -#define DAVINCI_DMA_GPIO_GPINT5 37
> > -#define DAVINCI_DMA_GPIO_GPINT6 38
> > -#define DAVINCI_DMA_GPIO_GPINT7 39
> > -#define DAVINCI_DMA_GPIO_GPBNKINT0 40
> > -#define DAVINCI_DMA_GPIO_GPBNKINT1 41
> > -#define DAVINCI_DMA_GPIO_GPBNKINT2 42
> > -#define DAVINCI_DMA_GPIO_GPBNKINT3 43
> > -#define DAVINCI_DMA_GPIO_GPBNKINT4 44
> > -#define DAVINCI_DMA_TIMER0_TINT0 48
> > -#define DAVINCI_DMA_TIMER1_TINT1 49
> > -#define DAVINCI_DMA_TIMER2_TINT2 50
> > -#define DAVINCI_DMA_TIMER3_TINT3 51
> > -#define DAVINCI_DMA_PWM0 52
> > -#define DAVINCI_DMA_PWM1 53
> > -#define DAVINCI_DMA_PWM2 54
> > -
> > -/* DA830 specific EDMA3 information */
> > -#define EDMA_DA830_NUM_DMACH 32
> > -#define EDMA_DA830_NUM_TCC 32
> > -#define EDMA_DA830_NUM_PARAMENTRY 128
> > -#define EDMA_DA830_NUM_EVQUE 2
> > -#define EDMA_DA830_NUM_TC 2
> > -#define EDMA_DA830_CHMAP_EXIST 0
> > -#define EDMA_DA830_NUM_REGIONS 4
> > -#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
> > -#define DA830_DMACH2EVENT_MAP1 0x00000000u
> > -#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
> > -
> > -/*ch_status paramater of callback function possible values*/
> > -#define DMA_COMPLETE 1
> > -#define DMA_CC_ERROR 2
> > -#define DMA_TC1_ERROR 3
> > -#define DMA_TC2_ERROR 4
> > -
> > -enum address_mode {
> > - INCR = 0,
> > - FIFO = 1
> > -};
> > -
> > -enum fifo_width {
> > - W8BIT = 0,
> > - W16BIT = 1,
> > - W32BIT = 2,
> > - W64BIT = 3,
> > - W128BIT = 4,
> > - W256BIT = 5
> > -};
> > -
> > -enum dma_event_q {
> > - EVENTQ_0 = 0,
> > - EVENTQ_1 = 1,
> > - EVENTQ_2 = 2,
> > - EVENTQ_3 = 3,
> > - EVENTQ_DEFAULT = -1
> > -};
> > -
> > -enum sync_dimension {
> > - ASYNC = 0,
> > - ABSYNC = 1
> > -};
> > -
> > -#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
> > -#define EDMA_CTLR(i) ((i) >> 16)
> > -#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
> > -
> > -#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
> > -#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
> > -#define EDMA_CONT_PARAMS_ANY 1001
> > -#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
> > -#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
> > -
> > -#define EDMA_MAX_CC 2
> > -
> > -/* alloc/free DMA channels and their dedicated parameter RAM slots */
> > -int edma_alloc_channel(int channel,
> > - void (*callback)(unsigned channel, u16 ch_status, void *data),
> > - void *data, enum dma_event_q);
> > -void edma_free_channel(unsigned channel);
> > -
> > -/* alloc/free parameter RAM slots */
> > -int edma_alloc_slot(unsigned ctlr, int slot);
> > -void edma_free_slot(unsigned slot);
> > -
> > -/* alloc/free a set of contiguous parameter RAM slots */
> > -int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
> > -int edma_free_cont_slots(unsigned slot, int count);
> > -
> > -/* calls that operate on part of a parameter RAM slot */
> > -void edma_set_src(unsigned slot, dma_addr_t src_port,
> > - enum address_mode mode, enum fifo_width);
> > -void edma_set_dest(unsigned slot, dma_addr_t dest_port,
> > - enum address_mode mode, enum fifo_width);
> > -void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
> > -void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
> > -void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
> > -void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
> > - u16 bcnt_rld, enum sync_dimension sync_mode);
> > -void edma_link(unsigned from, unsigned to);
> > -void edma_unlink(unsigned from);
> > -
> > -/* calls that operate on an entire parameter RAM slot */
> > -void edma_write_slot(unsigned slot, const struct edmacc_param *params);
> > -void edma_read_slot(unsigned slot, struct edmacc_param *params);
> > -
> > -/* channel control operations */
> > -int edma_start(unsigned channel);
> > -void edma_stop(unsigned channel);
> > -void edma_clean_channel(unsigned channel);
> > -void edma_clear_event(unsigned channel);
> > -void edma_pause(unsigned channel);
> > -void edma_resume(unsigned channel);
> > -
> > -struct edma_rsv_info {
> > -
> > - const s16 (*rsv_chans)[2];
> > - const s16 (*rsv_slots)[2];
> > -};
> > -
> > -/* platform_data for EDMA driver */
> > -struct edma_soc_info {
> > -
> > - /* how many dma resources of each type */
> > - unsigned n_channel;
> > - unsigned n_region;
> > - unsigned n_slot;
> > - unsigned n_tc;
> > - unsigned n_cc;
> > - /*
> > - * Default queue is expected to be a low-priority queue.
> > - * This way, long transfers on the default queue started
> > - * by the codec engine will not cause audio defects.
> > - */
> > - enum dma_event_q default_queue;
> > -
> > - /* Resource reservation for other cores */
> > - struct edma_rsv_info *rsv;
> > -
> > - const s8 (*queue_tc_mapping)[2];
> > - const s8 (*queue_priority_mapping)[2];
> > -};
> > -
> > -#endif
> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> > index 665870d..0b81d6c 100644
> > --- a/arch/arm/plat-omap/Kconfig
> > +++ b/arch/arm/plat-omap/Kconfig
> > @@ -29,6 +29,7 @@ config ARCH_OMAP2PLUS
> > select PINCTRL
> > select PROC_DEVICETREE if PROC_FS
> > select SPARSE_IRQ
> > + select TI_PRIV_EDMA
> > select USE_OF
> > help
> > "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
> > diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
> > index 023c8f2..e57cce3 100644
> > --- a/drivers/dma/edma.c
> > +++ b/drivers/dma/edma.c
> > @@ -24,7 +24,7 @@
> > #include <linux/slab.h>
> > #include <linux/spinlock.h>
> >
> > -#include <mach/edma.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include "dmaengine.h"
> > #include "virt-dma.h"
> > diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
> > index 17e186d..d1efacc 100644
> > --- a/drivers/mmc/host/davinci_mmc.c
> > +++ b/drivers/mmc/host/davinci_mmc.c
> > @@ -35,6 +35,7 @@
> > #include <linux/edma.h>
> > #include <linux/mmc/mmc.h>
> >
> > +#include <linux/platform_data/edma.h>
> > #include <linux/platform_data/mmc-davinci.h>
> >
> > /*
> > diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
> > index 0ab6132..7dd6524 100644
> > --- a/include/linux/mfd/davinci_voicecodec.h
> > +++ b/include/linux/mfd/davinci_voicecodec.h
> > @@ -26,8 +26,7 @@
> > #include <linux/kernel.h>
> > #include <linux/platform_device.h>
> > #include <linux/mfd/core.h>
> > -
> > -#include <mach/edma.h>
> > +#include <linux/platform_data/edma.h>
> >
> > /*
> > * Register values.
> > diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> > new file mode 100644
> > index 0000000..2344ea2
> > --- /dev/null
> > +++ b/include/linux/platform_data/edma.h
> > @@ -0,0 +1,182 @@
> > +/*
> > + * TI EDMA definitions
> > + *
> > + * Copyright (C) 2006-2013 Texas Instruments.
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > + * Free Software Foundation; either version 2 of the License, or (at your
> > + * option) any later version.
> > + */
> > +
> > +/*
> > + * This EDMA3 programming framework exposes two basic kinds of resource:
> > + *
> > + * Channel Triggers transfers, usually from a hardware event but
> > + * also manually or by "chaining" from DMA completions.
> > + * Each channel is coupled to a Parameter RAM (PaRAM) slot.
> > + *
> > + * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
> > + * "set"), source and destination addresses, a link to a
> > + * next PaRAM slot (if any), options for the transfer, and
> > + * instructions for updating those addresses. There are
> > + * more than twice as many slots as event channels.
> > + *
> > + * Each PaRAM set describes a sequence of transfers, either for one large
> > + * buffer or for several discontiguous smaller buffers. An EDMA transfer
> > + * is driven only from a channel, which performs the transfers specified
> > + * in its PaRAM slot until there are no more transfers. When that last
> > + * transfer completes, the "link" field may be used to reload the channel's
> > + * PaRAM slot with a new transfer descriptor.
> > + *
> > + * The EDMA Channel Controller (CC) maps requests from channels into physical
> > + * Transfer Controller (TC) requests when the channel triggers (by hardware
> > + * or software events, or by chaining). The two physical DMA channels provided
> > + * by the TCs are thus shared by many logical channels.
> > + *
> > + * DaVinci hardware also has a "QDMA" mechanism which is not currently
> > + * supported through this interface. (DSP firmware uses it though.)
> > + */
> > +
> > +#ifndef EDMA_H_
> > +#define EDMA_H_
> > +
> > +/* PaRAM slots are laid out like this */
> > +struct edmacc_param {
> > + unsigned int opt;
> > + unsigned int src;
> > + unsigned int a_b_cnt;
> > + unsigned int dst;
> > + unsigned int src_dst_bidx;
> > + unsigned int link_bcntrld;
> > + unsigned int src_dst_cidx;
> > + unsigned int ccnt;
> > +};
> > +
> > +/* fields in edmacc_param.opt */
> > +#define SAM BIT(0)
> > +#define DAM BIT(1)
> > +#define SYNCDIM BIT(2)
> > +#define STATIC BIT(3)
> > +#define EDMA_FWID (0x07 << 8)
> > +#define TCCMODE BIT(11)
> > +#define EDMA_TCC(t) ((t) << 12)
> > +#define TCINTEN BIT(20)
> > +#define ITCINTEN BIT(21)
> > +#define TCCHEN BIT(22)
> > +#define ITCCHEN BIT(23)
> > +
> > +/*ch_status paramater of callback function possible values*/
> > +#define DMA_COMPLETE 1
> > +#define DMA_CC_ERROR 2
> > +#define DMA_TC1_ERROR 3
> > +#define DMA_TC2_ERROR 4
> > +
> > +enum address_mode {
> > + INCR = 0,
> > + FIFO = 1
> > +};
> > +
> > +enum fifo_width {
> > + W8BIT = 0,
> > + W16BIT = 1,
> > + W32BIT = 2,
> > + W64BIT = 3,
> > + W128BIT = 4,
> > + W256BIT = 5
> > +};
> > +
> > +enum dma_event_q {
> > + EVENTQ_0 = 0,
> > + EVENTQ_1 = 1,
> > + EVENTQ_2 = 2,
> > + EVENTQ_3 = 3,
> > + EVENTQ_DEFAULT = -1
> > +};
> > +
> > +enum sync_dimension {
> > + ASYNC = 0,
> > + ABSYNC = 1
> > +};
> > +
> > +#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
> > +#define EDMA_CTLR(i) ((i) >> 16)
> > +#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
> > +
> > +#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
> > +#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
> > +#define EDMA_CONT_PARAMS_ANY 1001
> > +#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
> > +#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
> > +
> > +#define EDMA_MAX_CC 2
> > +
> > +/* alloc/free DMA channels and their dedicated parameter RAM slots */
> > +int edma_alloc_channel(int channel,
> > + void (*callback)(unsigned channel, u16 ch_status, void *data),
> > + void *data, enum dma_event_q);
> > +void edma_free_channel(unsigned channel);
> > +
> > +/* alloc/free parameter RAM slots */
> > +int edma_alloc_slot(unsigned ctlr, int slot);
> > +void edma_free_slot(unsigned slot);
> > +
> > +/* alloc/free a set of contiguous parameter RAM slots */
> > +int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
> > +int edma_free_cont_slots(unsigned slot, int count);
> > +
> > +/* calls that operate on part of a parameter RAM slot */
> > +void edma_set_src(unsigned slot, dma_addr_t src_port,
> > + enum address_mode mode, enum fifo_width);
> > +void edma_set_dest(unsigned slot, dma_addr_t dest_port,
> > + enum address_mode mode, enum fifo_width);
> > +void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
> > +void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
> > +void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
> > +void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
> > + u16 bcnt_rld, enum sync_dimension sync_mode);
> > +void edma_link(unsigned from, unsigned to);
> > +void edma_unlink(unsigned from);
> > +
> > +/* calls that operate on an entire parameter RAM slot */
> > +void edma_write_slot(unsigned slot, const struct edmacc_param *params);
> > +void edma_read_slot(unsigned slot, struct edmacc_param *params);
> > +
> > +/* channel control operations */
> > +int edma_start(unsigned channel);
> > +void edma_stop(unsigned channel);
> > +void edma_clean_channel(unsigned channel);
> > +void edma_clear_event(unsigned channel);
> > +void edma_pause(unsigned channel);
> > +void edma_resume(unsigned channel);
> > +
> > +struct edma_rsv_info {
> > +
> > + const s16 (*rsv_chans)[2];
> > + const s16 (*rsv_slots)[2];
> > +};
> > +
> > +/* platform_data for EDMA driver */
> > +struct edma_soc_info {
> > +
> > + /* how many dma resources of each type */
> > + unsigned n_channel;
> > + unsigned n_region;
> > + unsigned n_slot;
> > + unsigned n_tc;
> > + unsigned n_cc;
> > + /*
> > + * Default queue is expected to be a low-priority queue.
> > + * This way, long transfers on the default queue started
> > + * by the codec engine will not cause audio defects.
> > + */
> > + enum dma_event_q default_queue;
> > +
> > + /* Resource reservation for other cores */
> > + struct edma_rsv_info *rsv;
> > +
> > + const s8 (*queue_tc_mapping)[2];
> > + const s8 (*queue_priority_mapping)[2];
> > +};
> > +
> > +#endif
> > diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
> > index 7af305b..8dc2fa47 100644
> > --- a/include/linux/platform_data/spi-davinci.h
> > +++ b/include/linux/platform_data/spi-davinci.h
> > @@ -19,7 +19,7 @@
> > #ifndef __ARCH_ARM_DAVINCI_SPI_H
> > #define __ARCH_ARM_DAVINCI_SPI_H
> >
> > -#include <mach/edma.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #define SPI_INTERN_CS 0xFF
> >
> > diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
> > index d55e647..591f547 100644
> > --- a/sound/soc/davinci/davinci-evm.c
> > +++ b/sound/soc/davinci/davinci-evm.c
> > @@ -14,6 +14,7 @@
> > #include <linux/timer.h>
> > #include <linux/interrupt.h>
> > #include <linux/platform_device.h>
> > +#include <linux/platform_data/edma.h>
> > #include <linux/i2c.h>
> > #include <sound/core.h>
> > #include <sound/pcm.h>
> > diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
> > index afab81f..9bdd71b 100644
> > --- a/sound/soc/davinci/davinci-pcm.c
> > +++ b/sound/soc/davinci/davinci-pcm.c
> > @@ -17,6 +17,7 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/kernel.h>
> > #include <linux/genalloc.h>
> > +#include <linux/platform_data/edma.h>
> >
> > #include <sound/core.h>
> > #include <sound/pcm.h>
> > diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
> > index b6ef703..fbb710c 100644
> > --- a/sound/soc/davinci/davinci-pcm.h
> > +++ b/sound/soc/davinci/davinci-pcm.h
> > @@ -14,7 +14,7 @@
> >
> > #include <linux/genalloc.h>
> > #include <linux/platform_data/davinci_asp.h>
> > -#include <mach/edma.h>
> > +#include <linux/platform_data/edma.h>
> >
> > struct davinci_pcm_dma_params {
> > int channel; /* sync dma channel ID */
> > diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
> > index 5be65aa..074fc5d 100644
> > --- a/sound/soc/davinci/davinci-sffsdr.c
> > +++ b/sound/soc/davinci/davinci-sffsdr.c
> > @@ -17,6 +17,7 @@
> > #include <linux/timer.h>
> > #include <linux/interrupt.h>
> > #include <linux/platform_device.h>
> > +#include <linux/platform_data/edma.h>
> > #include <linux/gpio.h>
> > #include <sound/core.h>
> > #include <sound/pcm.h>
> > @@ -28,7 +29,6 @@
> > #include <asm/plat-sffsdr/sffsdr-fpga.h>
> > #endif
> >
> > -#include <mach/edma.h>
> >
> > #include "../codecs/pcm3008.h"
> > #include "davinci-pcm.h"
> > @@ -123,8 +123,8 @@ static struct resource sffsdr_snd_resources[] = {
> > };
> >
> > static struct evm_snd_platform_data sffsdr_snd_data = {
> > - .tx_dma_ch = DAVINCI_DMA_MCBSP_TX,
> > - .rx_dma_ch = DAVINCI_DMA_MCBSP_RX,
> > + .tx_dma_ch = 2, /* MCBSP_TX */
> > + .rx_dma_ch = 3, /* MCBSP_RX */
> > };
> >
> > static struct platform_device *sffsdr_snd_device;
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Davinci-linux-open-source mailing list
> > Davinci-linux-open-source@linux.davincidsp.com
> > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
> >
>
>
> Regards,
> Gururaja
> _______________________________________________
> Davinci-linux-open-source mailing list
> Davinci-linux-open-source@linux.davincidsp.com
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding
[not found] ` <06e6ba0bd8984e1797c84d2926584909@DFLE72.ent.ti.com>
@ 2013-01-11 14:30 ` Matt Porter
0 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 14:30 UTC (permalink / raw)
To: Hebbar, Gururaja
Cc: Linux DaVinci Kernel List, Arnd Bergmann,
Linux Documentation List, Devicetree Discuss, Linux MMC List,
Linux Kernel Mailing List, Rob Herring, Dan Williams,
Linux SPI Devel List, Linux OMAP List, Linux ARM Kernel List,
Tony Lindgren, Nori, Sekhar, Grant Likely, Mark Brown, Cousson,
Benoit, Russell King, Vinod Koul, Rob Landley, Chris Ball
On Fri, Jan 11, 2013 at 07:54:05AM +0000, Hebbar, Gururaja wrote:
> On Fri, Jan 11, 2013 at 11:18:41, Porter, Matt wrote:
> > The binding definition is based on the generic DMA controller
> > binding.
> >
> > Signed-off-by: Matt Porter <mporter@ti.com>
> > ---
> > Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +++++++++++++++++++++
> > 1 file changed, 51 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
> >
> > diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> > new file mode 100644
> > index 0000000..3344345
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> > @@ -0,0 +1,51 @@
> > +TI EDMA
> > +
> > +Required properties:
> > +- compatible : "ti,edma3"
> > +- ti,hwmods: Name of the hwmods associated to the EDMA
> > +- ti,edma-regions: Number of regions
> > +- ti,edma-slots: Number of slots
> > +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> > +- ti,edma-queue-priority-map: List of queue priority mappings
> > +- ti,edma-default-queue: Default queue value
> > +
> > +Optional properties:
> > +- ti,edma-reserved-channels: List of reserved channel regions
> > +- ti,edma-reserved-slots: List of reserved slot regions
> > +- ti,edma-xbar-event-map: Crossbar event to channel map
> > +
> > +Example:
> > +
> > +edma: edma@49000000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
>
> address-cells & size-cells are only required when current node is a parent
> node & it has sibling/child nodes (that too if the child node uses "reg"
> property).
Yes, agreed. I addressed this in the actual dts but failed to update the
binding itself. Will update.
>
> > + reg = <0x49000000 0x10000>;
> > + interrupt-parent = <&intc>;
> > + interrupts = <12 13 14>;
> > + compatible = "ti,edma3";
> > + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
> > + #dma-cells = <1>;
> > + dma-channels = <64>;
> > + ti,edma-regions = <4>;
> > + ti,edma-slots = <256>;
> > + ti,edma-reserved-channels = <0 2
> > + 14 2
> > + 26 6
> > + 48 4
> > + 56 8>;
> > + ti,edma-reserved-slots = <0 2
> > + 14 2
> > + 26 6
> > + 48 4
> > + 56 8
> > + 64 127>;
> > + ti,edma-queue-tc-map = <0 0
> > + 1 1
> > + 2 2>;
> > + ti,edma-queue-priority-map = <0 0
> > + 1 1
> > + 2 2>;
> > + ti,edma-default-queue = <0>;
> > + ti,edma-xbar-event-map = <1 12
> > + 2 13>;
> > +};
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Davinci-linux-open-source mailing list
> > Davinci-linux-open-source@linux.davincidsp.com
> > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
> >
>
>
> Regards,
> Gururaja
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat()
2013-01-11 5:48 ` [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat() Matt Porter
@ 2013-01-11 17:52 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2013-01-11 17:52 UTC (permalink / raw)
To: Matt Porter
Cc: Sekhar Nori, Grant Likely, Mark Brown, Benoit Cousson,
Russell King, Vinod Koul, Rob Landley, Chris Ball,
Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
* Matt Porter <mporter@ti.com> [130110 21:47]:
> Adds a dma_request_slave_channel_compat() wrapper which accepts
> both the arguments from dma_request_channel() and
> dma_request_slave_channel(). Based on whether the driver is
> instantiated via DT, the appropriate channel request call will be
> made.
>
> This allows for a much cleaner migration of drivers to the
> dmaengine DT API as platforms continue to be mixed between those
> that boot using DT and those that do not.
Cool, looks like the driver changes are quite minimal after this:
Acked-by: Tony Lindgren <tony@atomide.com>
>
> Suggested-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> include/linux/dmaengine.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index 9fd0c5b..64f9f69 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -1047,6 +1047,16 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
> struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
> struct dma_chan *net_dma_find_channel(void);
> #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
> +static inline struct dma_chan
> +*dma_request_slave_channel_compat(dma_cap_mask_t mask, dma_filter_fn fn,
> + void *fn_param, struct device *dev,
> + char *name)
> +{
> + if (dev->of_node)
> + return dma_request_slave_channel(dev, name);
> + else
> + return dma_request_channel(mask, fn, fn_param);
> +}
>
> /* --- Helper iov-locking functions --- */
>
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
2013-01-11 5:48 ` [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat() Matt Porter
@ 2013-01-11 17:52 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2013-01-11 17:52 UTC (permalink / raw)
To: Matt Porter
Cc: Sekhar Nori, Grant Likely, Mark Brown, Benoit Cousson,
Russell King, Vinod Koul, Rob Landley, Chris Ball,
Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
* Matt Porter <mporter@ti.com> [130110 21:47]:
> Convert dmaengine channel requests to use
> dma_request_slave_channel_compat(). This supports the DT case of
> platforms requiring channel selection from either the OMAP DMA or
> the EDMA engine. AM33xx only boots from DT and is the only user
> implementing EDMA so in the !DT case we can default to the OMAP DMA
> filter.
Acked-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> drivers/mmc/host/omap_hsmmc.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index bc58078..e79b12d 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -1915,14 +1915,20 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
> dma_cap_zero(mask);
> dma_cap_set(DMA_SLAVE, mask);
>
> - host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &rx_req);
> + host->rx_chan =
> + dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
> + &rx_req, &pdev->dev, "rx");
> +
> if (!host->rx_chan) {
> dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req);
> ret = -ENXIO;
> goto err_irq;
> }
>
> - host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &tx_req);
> + host->tx_chan =
> + dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
> + &tx_req, &pdev->dev, "tx");
> +
> if (!host->tx_chan) {
> dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req);
> ret = -ENXIO;
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations
2013-01-11 5:48 ` [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations Matt Porter
@ 2013-01-11 17:53 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2013-01-11 17:53 UTC (permalink / raw)
To: Matt Porter
Cc: Sekhar Nori, Grant Likely, Mark Brown, Benoit Cousson,
Russell King, Vinod Koul, Rob Landley, Chris Ball,
Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
* Matt Porter <mporter@ti.com> [130110 21:47]:
> The EDMA DMAC has a hardware limitation that prevents supporting
> scatter gather lists with any number of segments. The DMA Engine
> API reports the maximum number of segments a channel can support
> via the optional dma_get_channel_caps() API. If the nr_segs
> capability is present, the value is used to configure mmc->max_segs
> appropriately.
Acked-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> drivers/mmc/host/omap_hsmmc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index e79b12d..f74bd69 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -1769,6 +1769,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
> const struct of_device_id *match;
> dma_cap_mask_t mask;
> unsigned tx_req, rx_req;
> + struct dmaengine_chan_caps *dma_chan_caps;
> struct pinctrl *pinctrl;
>
> match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
> @@ -1935,6 +1936,11 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
> goto err_irq;
> }
>
> + /* Some DMA Engines only handle a limited number of SG segments */
> + dma_chan_caps = dma_get_channel_caps(host->rx_chan, DMA_DEV_TO_MEM);
> + if (dma_chan_caps && dma_chan_caps->seg_nr)
> + mmc->max_segs = dma_chan_caps->seg_nr;
> +
> /* Request IRQ for MMC operations */
> ret = request_irq(host->irq, omap_hsmmc_irq, 0,
> mmc_hostname(mmc), host);
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding
2013-01-11 5:48 ` [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding Matt Porter
@ 2013-01-11 17:54 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2013-01-11 17:54 UTC (permalink / raw)
To: Matt Porter
Cc: Sekhar Nori, Grant Likely, Mark Brown, Benoit Cousson,
Russell King, Vinod Koul, Rob Landley, Chris Ball,
Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
* Matt Porter <mporter@ti.com> [130110 21:47]:
> The binding definition is based on the generic DMA request binding.
Acked-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> .../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> index ed271fc..826cc51 100644
> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> @@ -20,8 +20,28 @@ ti,dual-volt: boolean, supports dual voltage cards
> ti,non-removable: non-removable slot (like eMMC)
> ti,needs-special-reset: Requires a special softreset sequence
> ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
> +dmas: DMA controller phandle and DMA request value ordered pair
> +One tx and one rx pair is required.
> +dma-names: DMA request names. These strings correspond 1:1 with
> +the ordered pairs in dmas. The RX request must be "rx" and the
> +TX request must be "tx".
> +
> +Examples:
> +
> +[hwmod populated DMA resources]
> +
> + mmc1: mmc@0x4809c000 {
> + compatible = "ti,omap4-hsmmc";
> + reg = <0x4809c000 0x400>;
> + ti,hwmods = "mmc1";
> + ti,dual-volt;
> + bus-width = <4>;
> + vmmc-supply = <&vmmc>; /* phandle to regulator node */
> + ti,non-removable;
> + };
> +
> +[generic DMA request binding]
>
> -Example:
> mmc1: mmc@0x4809c000 {
> compatible = "ti,omap4-hsmmc";
> reg = <0x4809c000 0x400>;
> @@ -30,4 +50,7 @@ Example:
> bus-width = <4>;
> vmmc-supply = <&vmmc>; /* phandle to regulator node */
> ti,non-removable;
> + dmas = <&edma 24
> + &edma 25>;
> + dma-names = "tx", "rx";
> };
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 11/14] ARM: dts: add AM33XX MMC support
2013-01-11 5:48 ` [PATCH v4 11/14] ARM: dts: add AM33XX MMC support Matt Porter
@ 2013-01-11 17:55 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2013-01-11 17:55 UTC (permalink / raw)
To: Matt Porter
Cc: Sekhar Nori, Grant Likely, Mark Brown, Benoit Cousson,
Russell King, Vinod Koul, Rob Landley, Chris Ball,
Devicetree Discuss, Linux OMAP List, Linux ARM Kernel List,
Linux DaVinci Kernel List, Linux Kernel Mailing List,
Linux Documentation List, Linux MMC List, Linux SPI Devel List,
Arnd Bergmann, Dan Williams, Rob Herring
* Matt Porter <mporter@ti.com> [130110 21:47]:
> Adds AM33XX MMC support for am335x-bone, am335x-evm, and
> am335x-evmsk..
This one should be queued separately by Benoit:
Acked-by: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Matt Porter <mporter@ti.com>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 7 +++++++
> arch/arm/boot/dts/am335x-evm.dts | 7 +++++++
> arch/arm/boot/dts/am335x-evmsk.dts | 7 +++++++
> arch/arm/boot/dts/am33xx.dtsi | 28 ++++++++++++++++++++++++++++
> 4 files changed, 49 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 11b240c..a154ce0 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -120,6 +120,8 @@
> };
>
> ldo3_reg: regulator@5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> regulator-always-on;
> };
>
> @@ -136,3 +138,8 @@
> &cpsw_emac1 {
> phy_id = <&davinci_mdio>, <1>;
> };
> +
> +&mmc1 {
> + status = "okay";
> + vmmc-supply = <&ldo3_reg>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> index d649644..2907da6 100644
> --- a/arch/arm/boot/dts/am335x-evm.dts
> +++ b/arch/arm/boot/dts/am335x-evm.dts
> @@ -232,6 +232,8 @@
> };
>
> vmmc_reg: regulator@12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> regulator-always-on;
> };
> };
> @@ -244,3 +246,8 @@
> &cpsw_emac1 {
> phy_id = <&davinci_mdio>, <1>;
> };
> +
> +&mmc1 {
> + status = "okay";
> + vmmc-supply = <&vmmc_reg>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
> index f5a6162..f050c46 100644
> --- a/arch/arm/boot/dts/am335x-evmsk.dts
> +++ b/arch/arm/boot/dts/am335x-evmsk.dts
> @@ -244,7 +244,14 @@
> };
>
> vmmc_reg: regulator@12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> regulator-always-on;
> };
> };
> };
> +
> +&mmc1 {
> + status = "okay";
> + vmmc-supply = <&vmmc_reg>;
> +};
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index e711ffb..278b75d 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -235,6 +235,34 @@
> status = "disabled";
> };
>
> + mmc1: mmc@48060000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc1";
> + ti,dual-volt;
> + ti,needs-special-reset;
> + dmas = <&edma 24
> + &edma 25>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> + mmc2: mmc@481d8000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc2";
> + ti,needs-special-reset;
> + dmas = <&edma 2
> + &edma 3>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> + mmc3: mmc@47810000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc3";
> + ti,needs-special-reset;
> + status = "disabled";
> + };
> +
> wdt2: wdt@44e35000 {
> compatible = "ti,omap3-wdt";
> ti,hwmods = "wd_timer2";
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4,03/14] ARM: edma: add AM33XX support to the private EDMA API
2013-01-11 5:48 ` [PATCH v4 03/14] ARM: edma: add AM33XX support to the private EDMA API Matt Porter
@ 2013-01-11 18:14 ` Lars Poeschel
[not found] ` <9fda86bbbec3444393fd5a2dc5135a5e@DFLE73.ent.ti.com>
1 sibling, 0 replies; 29+ messages in thread
From: Lars Poeschel @ 2013-01-11 18:14 UTC (permalink / raw)
To: Matt Porter
Cc: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball, Devicetree Discuss, Linux OMAP List,
Linux ARM Kernel List, Linux DaVinci Kernel List,
Linux Kernel Mailing List, Linux Documentation List,
Linux MMC List, Linux SPI Devel List, Arnd Bergmann,
Dan Williams, Rob Herring
Hi Matt,
On Friday 11 January 2013 at 06:48:39, Matt Porter wrote:
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index a3d189d..1951d63 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -24,6 +24,13 @@
> #include <linux/platform_device.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> +#include <linux/edma.h>
> +#include <linux/err.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_dma.h>
> +#include <linux/of_irq.h>
> +#include <linux/pm_runtime.h>
You add the include linux/of_dma.h here, but maybe you missed to add the file
itself. It is not in Linus v3.8-rc3 tree, not in the patches yours depend on
listed and not in your patchset.
Regards,
Lars
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4,03/14] ARM: edma: add AM33XX support to the private EDMA API
[not found] ` <9fda86bbbec3444393fd5a2dc5135a5e-jplQ/0hSbXKIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
@ 2013-01-11 18:21 ` Matt Porter
0 siblings, 0 replies; 29+ messages in thread
From: Matt Porter @ 2013-01-11 18:21 UTC (permalink / raw)
To: Lars Poeschel
Cc: Linux DaVinci Kernel List, Linux OMAP List, Russell King,
Cousson, Benoit, Arnd Bergmann, Linux Documentation List,
Tony Lindgren, Linux MMC List, Devicetree Discuss, Mark Brown,
Nori, Sekhar, Linux Kernel Mailing List, Rob Herring, Vinod Koul,
Rob Landley, Dan Williams, Linux SPI Devel List, Chris Ball,
Linux ARM Kernel List
On Fri, Jan 11, 2013 at 06:14:27PM +0000, Lars Poeschel wrote:
> Hi Matt,
>
> On Friday 11 January 2013 at 06:48:39, Matt Porter wrote:
>
> > diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> > index a3d189d..1951d63 100644
> > --- a/arch/arm/common/edma.c
> > +++ b/arch/arm/common/edma.c
> > @@ -24,6 +24,13 @@
> > #include <linux/platform_device.h>
> > #include <linux/io.h>
> > #include <linux/slab.h>
> > +#include <linux/edma.h>
> > +#include <linux/err.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_dma.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/pm_runtime.h>
>
> You add the include linux/of_dma.h here, but maybe you missed to add the file
> itself. It is not in Linus v3.8-rc3 tree, not in the patches yours depend on
> listed and not in your patchset.
of_dma.h comes in with the dependencies listed in the cover letter.
Particularly, Vinod's dt_dmaengine branch in slave-dma.git contains Jon
Hunter's OF DMA helpers series.
-Matt
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 00/14] DMA Engine support for AM33XX
2013-01-11 11:40 ` [PATCH v4 00/14] DMA Engine support for AM33XX Arnd Bergmann
@ 2013-01-11 18:33 ` Matt Porter
2013-01-11 20:12 ` Arnd Bergmann
0 siblings, 1 reply; 29+ messages in thread
From: Matt Porter @ 2013-01-11 18:33 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Tony Lindgren, Sekhar Nori, Grant Likely, Mark Brown,
Benoit Cousson, Russell King, Vinod Koul, Rob Landley,
Chris Ball, Devicetree Discuss, Linux OMAP List,
Linux ARM Kernel List, Linux DaVinci Kernel List,
Linux Kernel Mailing List, Linux Documentation List,
Linux MMC List, Linux SPI Devel List, Dan Williams, Rob Herring
On Fri, Jan 11, 2013 at 11:40:41AM +0000, Arnd Bergmann wrote:
> On Friday 11 January 2013, Matt Porter wrote:
> > The approach taken is similar to how OMAP DMA is being converted to
> > DMA Engine support. With the functional EDMA private API already
> > existing in mach-davinci/dma.c, we first move that to an ARM common
> > area so it can be shared. Adding DT and runtime PM support to the
> > private EDMA API implementation allows it to run on AM33xx. AM33xx
> > only boots using DT so we leverage Jon's generic DT DMA helpers to
> > register EDMA DMAC with the of_dma framework and then add support
> > for calling the dma_request_slave_channel() API to both the mmc
> > and spi drivers.
>
> I think this looks very good. What I wonder is whether we should
> make the non-DT parts of the dmaengine driver compile-time
> conditional on CONFIG_ATAGS though, so the slave drivers don't
> have a link-time dependency on the dmaengine driver's
> omap_dma_filter_fn symbol when building without ATAGS support.
We have tightly coupled the link-time dependency for
omap_dma_filter_fn by going down the path of using
dma_request_slave_channel_compat() as Tony suggested to avoid extra
ifdefry.
That dependency will go away naturally if all the "legacy" OMAP platforms
were required to only boot from DT...just as a newly added SoCs are.
Are you suggesting unwinding the _compat() approach?
-Matt
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v4 00/14] DMA Engine support for AM33XX
2013-01-11 18:33 ` Matt Porter
@ 2013-01-11 20:12 ` Arnd Bergmann
0 siblings, 0 replies; 29+ messages in thread
From: Arnd Bergmann @ 2013-01-11 20:12 UTC (permalink / raw)
To: Matt Porter
Cc: Linux DaVinci Kernel List, Linux OMAP List, Russell King,
Linux Documentation List, Linux MMC List, Devicetree Discuss,
Mark Brown, Sekhar Nori, Linux Kernel Mailing List, Rob Herring,
Vinod Koul, Dan Williams, Linux SPI Devel List, Chris Ball,
Linux ARM Kernel List
On Friday 11 January 2013, Matt Porter wrote:
> We have tightly coupled the link-time dependency for
> omap_dma_filter_fn by going down the path of using
> dma_request_slave_channel_compat() as Tony suggested to avoid extra
> ifdefry.
>
> That dependency will go away naturally if all the "legacy" OMAP platforms
> were required to only boot from DT...just as a newly added SoCs are.
>
> Are you suggesting unwinding the _compat() approach?
No, I was thinking we could define omap_dma_filter_fn to NULL
for the DT-only case.
Arnd
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2013-01-11 20:12 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-01-11 5:48 [PATCH v4 00/14] DMA Engine support for AM33XX Matt Porter
[not found] ` <1357883330-5364-1-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 5:48 ` [PATCH v4 01/14] ARM: davinci: move private EDMA API to arm/common Matt Porter
[not found] ` <1357883330-5364-2-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 6:15 ` Hebbar, Gururaja
2013-01-11 14:27 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 02/14] ARM: edma: remove unused transfer controller handlers Matt Porter
2013-01-11 5:48 ` [PATCH v4 03/14] ARM: edma: add AM33XX support to the private EDMA API Matt Porter
2013-01-11 18:14 ` [PATCH v4,03/14] " Lars Poeschel
[not found] ` <9fda86bbbec3444393fd5a2dc5135a5e@DFLE73.ent.ti.com>
[not found] ` <9fda86bbbec3444393fd5a2dc5135a5e-jplQ/0hSbXKIQmiDNMet8wC/G2K4zDHf@public.gmane.org>
2013-01-11 18:21 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 04/14] dmaengine: edma: enable build for AM33XX Matt Porter
2013-01-11 5:48 ` [PATCH v4 05/14] dmaengine: edma: Add TI EDMA device tree binding Matt Porter
[not found] ` <1357883330-5364-6-git-send-email-mporter-l0cyMroinI0@public.gmane.org>
2013-01-11 7:54 ` Hebbar, Gururaja
[not found] ` <06e6ba0bd8984e1797c84d2926584909@DFLE72.ent.ti.com>
2013-01-11 14:30 ` Matt Porter
2013-01-11 5:48 ` [PATCH v4 06/14] ARM: dts: add AM33XX EDMA support Matt Porter
2013-01-11 5:48 ` [PATCH v4 07/14] dmaengine: add dma_request_slave_channel_compat() Matt Porter
2013-01-11 17:52 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 08/14] mmc: omap_hsmmc: convert to dma_request_slave_channel_compat() Matt Porter
2013-01-11 17:52 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations Matt Porter
2013-01-11 17:53 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 10/14] mmc: omap_hsmmc: add generic DMA request support to the DT binding Matt Porter
2013-01-11 17:54 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 11/14] ARM: dts: add AM33XX MMC support Matt Porter
2013-01-11 17:55 ` Tony Lindgren
2013-01-11 5:48 ` [PATCH v4 12/14] spi: omap2-mcspi: convert to dma_request_slave_channel_compat() Matt Porter
2013-01-11 5:48 ` [PATCH v4 13/14] spi: omap2-mcspi: add generic DMA request support to the DT binding Matt Porter
2013-01-11 11:40 ` [PATCH v4 00/14] DMA Engine support for AM33XX Arnd Bergmann
2013-01-11 18:33 ` Matt Porter
2013-01-11 20:12 ` Arnd Bergmann
2013-01-11 5:48 ` [PATCH v4 14/14] ARM: dts: add AM33XX SPI DMA support Matt Porter
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